公开(公告)号：US07095619B2

公开(公告)日：2006-08-22

申请号：US10383028

申请日：2003-02-25

Applicant: Augusto P. Panella ,  John E. Lopata ,  James L. McGrath ,  Arindum Dutta

Inventor： Augusto P. Panella ,  John E. Lopata ,  James L. McGrath ,  Arindum Dutta

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K1/0262 ,  H05K1/141 ,  H05K2201/10189 ,  H05K2201/10325 ,  H05K2201/10545 ,  H05K2201/10704 ,  H05K2201/10719 ,  H05K2201/10734

Abstract: A processor mounted to a circuit board is provided with regulated voltage through lower-inductance circuit board traces by mounting a voltage regulator module for the processor, on the side of the circuit opposite to the processor. Current from the voltage regulator is provided to the processor by way of one or more conductors between the regulator and processor that extend through the circuit board from one side to the other. Inductance attributable to lead length is reduced by locating the voltage regulator close to its load. Circuit board space on the processor side of the circuit board is increased by moving the voltage regulator to the opposite side.

公开(公告)号：US20060133820A1

公开(公告)日：2006-06-22

申请号：US11350432

申请日：2006-02-09

Applicant: William Wang ,  Hengju Cheng ,  WeiZen Lo

Inventor： William Wang ,  Hengju Cheng ,  WeiZen Lo

IPC: H04B10/00 ,  H01R12/16

CPC classification number: G02B6/4292 ,  H05K1/114 ,  H05K1/148 ,  H05K1/181 ,  H05K3/429 ,  H05K2201/09227 ,  H05K2201/10189 ,  H05K2201/10545 ,  H05K2201/10734 ,  Y02P70/611

Abstract: A transponder assembly for use with fiber optic digital communication cables having multiple parallel optic fiber elements. The transponder assembly features a transmitter port and receiver port for connection with separate parallel optic cables for separately transmitting and receiving data and an electrical connector for connecting with computer or communication systems. The transponder assembly includes a parallel optic transmitter module and a parallel optic receiver module having pluggable edge connectors. The assembly also includes a circuit board on which a semiconductor chip useful for signal processing and the electrical connector are mounted. A flex circuit is used in connecting the circuit board to the parallel optic modules. The semiconductor chip and electrical connector are mounted directly across from one another on opposite surfaces of the circuit board.

公开(公告)号：US20060072368A1

公开(公告)日：2006-04-06

申请号：US10952891

申请日：2004-09-30

Applicant: Wei Koh ,  David Chen

Inventor： Wei Koh ,  David Chen

IPC: G11C8/02

CPC classification number: H05K1/182 ,  G11C5/02 ,  H01L25/0652 ,  H01L25/105 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H05K2201/10515 ,  H05K2201/10545 ,  H05K2201/10689 ,  H01L2924/00

Abstract: A high density memory card assembly having application for USB drive storage, flash and ROM memory cards, and similar memory card formats. A cavity is formed through a rigid laminate substrate. First and second digital memory devices (e.g., TSOP packages or bare semiconductor dies) are located within the cavity so as to be recessed relative to the top and bottom of the substrate. The recessed first and second memory devices are arranged in spaced, face-to-face alignment with one another within the cavity. The first and second memory devices are covered and protected by respective first and second memory packages that are located on the top and bottom of the substrate. By virtue of the foregoing, the memory package density of the assembly can be increased without increasing the height or area consumed by the assembly for receipt within an existing external housing.

Abstract translation: 适用于USB驱动器存储，闪存和ROM存储卡以及类似存储卡格式的高密度存储卡组件。 通过刚性层压基板形成空腔。 第一和第二数字存储器件（例如，TSOP封装或裸半导体管芯）位于空腔内，以便相对于衬底的顶部和底部凹陷。 凹陷的第一和第二存储器件在空腔内彼此间隔开地面对面地排列。 第一和第二存储器件被位于衬底顶部和底部的相应的第一和第二存储器封装覆盖和保护。 由于上述原因，可以增加组件的存储器封装密度，而不会增加组件消耗的高度或面积，以便在现有的外部外壳内接收。

公开(公告)号：US07023719B1

公开(公告)日：2006-04-04

申请号：US10692091

申请日：2003-10-23

Applicant: Eric Hung ,  Norman Sai

Inventor： Eric Hung ,  Norman Sai

IPC: G11C5/06

CPC classification number: H05K1/181 ,  G11C5/04 ,  G11C5/063 ,  H05K2201/10545 ,  Y02P70/611

Abstract: A memory module is provided as well as a method for forming a memory module. The memory module includes a printed circuit board having opposed first and second outside surfaces. At least one via can extend through the printed circuit board and couples a conductor on one outside surface to a conductor on another outside surface. A semiconductor memory device on one of those outside surfaces can thereby be connected to one end of the via, with another semiconductor memory device on the opposing outside surface connected to the other end of the via. Preferably, the pair of memory devices are placed on a portion of each respective outside surface so that they essentially align in mirrored fashion with each other. Accordingly, any vias which extend from the footprint of one memory device will take the shortest path to the footprint of the other memory device, with the stubs between the footprint and the via being of essentially the same length and relatively short. The printed circuit board preferably has no more than four conductive layers dielectrically spaced from each other. Two layers are reserved for the opposing outer surfaces, and two layers carrying power and ground signals are embedded within the board. The memory devices are preferably DDR SDRAMs connected to each other as well as a memory controller, each of are placed and maintained upon a single printed circuit board.

Abstract translation: 提供存储器模块以及用于形成存储器模块的方法。 存储器模块包括具有相对的第一和第二外表面的印刷电路板。 至少一个通孔可以延伸穿过印刷电路板，并将一个外表面上的导体连接到另一个外表面上的导体。 因此，其中一个外表面上的半导体存储器件可以连接到通孔的一端，另一半导体存储器件在相对的外表面上连接到通孔的另一端。 优选地，一对存储器件被放置在每个相应的外表面的一部分上，使得它们基本上以镜像方式彼此对准。 因此，从一个存储器件的占位面延伸的任何通孔将采取到另一存储器件的覆盖区的最短路径，其中覆盖区和通孔之间的短截线基本上相同的长度并且相对较短。 印刷电路板优选地具有不超过四个彼此介电间隔的导电层。 为相对的外表面预留两层，并且承载电力和接地信号的两层嵌入在电路板内。 存储器件优选地彼此连接的DDR SDRAM以及存储器控制器，每个存储器控制器被放置并保持在单个印刷电路板上。

公开(公告)号：US06992899B2

公开(公告)日：2006-01-31

申请号：US10394841

申请日：2003-03-21

Applicant: William Alger ,  Gary Long ,  Gary Brist ,  Carlos Mejia

Inventor： William Alger ,  Gary Long ,  Gary Brist ,  Carlos Mejia

IPC: H05K7/06

CPC classification number: H05K1/141 ,  H01L2224/73253 ,  H01L2924/15192 ,  H05K1/0263 ,  H05K3/222 ,  H05K3/3447 ,  H05K2201/10303 ,  H05K2201/10545 ,  H05K2201/10734

Abstract: An apparatus and system, as well as fabrication methods therefor, may include a conductor attached to a carrier to bridge a contact field defined by a circuit that can be mounted to a circuit board.

Abstract translation: 装置和系统及其制造方法可以包括附接到载体的导体，以桥接由可以安装到电路板的电路限定的接触场。

公开(公告)号：US20060012395A1

公开(公告)日：2006-01-19

申请号：US11222417

申请日：2005-09-08

Applicant: Jon Huppenthal ,  Denis Kellam

Inventor： Jon Huppenthal ,  Denis Kellam

IPC: H03K19/177

CPC classification number: G06F15/7867 ,  H05K1/0286 ,  H05K1/181 ,  H05K2201/10212 ,  H05K2201/10545 ,  H05K2201/10734 ,  Y02P70/611

Abstract: A reconfigurable processor element incorporating both course and fine grained reconfigurable elements. In alternative implementations, the present invention may comprise a reconfigurable processor comprising both reconfigurable devices with fine grained logic elements and reconfigurable devices with course grained logic elements or a reconfigurable processor comprising both reconfigurable devices with fine grained elements and non-reconfigurable devices with course grained elements.

Abstract translation: 一种可重构的处理器元件，其结合了过程和细粒度可重构元件。 在替代实现中，本发明可以包括可重构处理器，其包括具有细粒度逻辑元件的可重新配置设备和具有过程粒度逻辑元件的可重新配置设备或包括具有细粒度元素的可重新配置设备和具有当然粒度元素的不可重新配置设备的可重配置处理器 。

公开(公告)号：US06982876B1

公开(公告)日：2006-01-03

申请号：US10070742

申请日：2000-09-13

Applicant: George Young

Inventor： George Young

IPC: H05K7/20

CPC classification number: H05K1/0203 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K1/141 ,  H05K1/165 ,  H05K1/182 ,  H05K3/368 ,  H05K2201/086 ,  H05K2201/09063 ,  H05K2201/1003 ,  H05K2201/10166 ,  H05K2201/10333 ,  H05K2201/10515 ,  H05K2201/10545 ,  H01L2924/00

Abstract: A PCB assembly (1) in this case a DC-DC converter comprising a single layer board (2), mounts power semi-conductor devices forming high heat generating components (3) and various cores of magnetic material forming heat dissipating components (4). Tracks of heat conductive coupling material (6) lie above or below each heat generating component (3) and project into one of the heat dissipating components (4) and beside the others. In one embodiment, the heat generating components (3) are housed within a heat dissipating component (3). In another PCB assembly, there is an additional plug-in PCB which may itself carry heat generating components (3) or only heat dissipating components (4). In the latter case, the heat generating components (3) are mounted on the PCB assembly below the additional plug-in PCB.

Abstract translation: 在这种情况下，PCB组件（1）是包括单层板（2）的DC-DC转换器，安装形成高发热部件（3）的功率半导体器件和形成散热部件（4）的各种磁性材料芯， 。 导热耦合材料（6）的轨道位于每个发热部件（3）的上方或下方，并且投射到其中一个散热部件（4）中。 在一个实施例中，发热部件（3）容纳在散热部件（3）内。 在另一个PCB组件中，还有一个额外的插入式PCB，其本身可以携带发热部件（3）或仅散热部件（4）。 在后一种情况下，发热部件（3）安装在附加插入式PCB下面的PCB组件上。

公开(公告)号：US20050275078A1

公开(公告)日：2005-12-15

申请号：US11147332

申请日：2005-06-08

Applicant: Ryota Suzuki ,  Taihei Nakada ,  Tsuyoshi Kumamoto ,  Yuusuke Yamashita

Inventor： Ryota Suzuki ,  Taihei Nakada ,  Tsuyoshi Kumamoto ,  Yuusuke Yamashita

IPC: H01L23/12 ,  H01L23/02 ,  H01L23/50 ,  H01L23/552 ,  H01L23/66 ,  H05K1/00 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/46

CPC classification number: H01L23/50 ,  H01L23/552 ,  H01L2924/0002 ,  H01L2924/15153 ,  H01L2924/1517 ,  H05K1/0218 ,  H05K1/0243 ,  H05K1/0298 ,  H05K1/113 ,  H05K1/115 ,  H05K1/182 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/09336 ,  H05K2201/10545 ,  H01L2924/00

Abstract: A high frequency multilayer integrated circuit is provided with: a multilayer board including n earth conductor layers (n: integer of two or more than two) and (n-1) dielectric layers each arranged between adjacent earth conductor layers; a first high frequency circuit disposed in one of the most outside earth conductor layers of the multilayer board; a first power-supply/control circuit disposed in this most outside earth conductor layer; a second high frequency circuit disposed in at least one of the dielectric layers and connected to the first high frequency circuit in the multilayer board; a second power-supply/control circuit disposed in another one of the most outside earth conductor layers of the multilayer board; and a third power-supply/control circuit disposed in at least one of the dielectric layers at a portion at which the second high frequency circuit does not exist, the third power-supply/control circuit being connected to the first and second power-supply/control circuits.

Abstract translation: 高频多层集成电路具备：分别配置在相邻的接地导体层之间的n个接地导体层（n为2以上的整数）和（n-1）个电介质层的多层基板; 设置在所述多层板的最外侧的接地导体层之一中的第一高频电路; 设置在该最外部接地导体层中的第一电源/控制电路; 设置在所述电介质层中的至少一个并连接到所述多层板中的所述第一高频电路的第二高频电路; 第二电源/控制电路，设置在所述多层板的最外部的接地导体层中的另一个中; 以及第三电源/控制电路，设置在所述第二高频电路不存在的部分的所述电介质层中的至少一个中，所述第三电源/控制电路连接到所述第一和第二电源 /控制电路。

公开(公告)号：US20050248024A1

公开(公告)日：2005-11-10

申请号：US10840764

申请日：2004-05-06

Applicant: Brian Costello

Inventor： Brian Costello

IPC: H01L23/34 ,  H01R13/66 ,  H05K1/14 ,  H05K7/10

CPC classification number: H05K7/1092 ,  H01L2924/0002 ,  H05K1/0262 ,  H05K1/141 ,  H05K2201/10189 ,  H05K2201/10545 ,  H05K2201/10689 ,  H01L2924/00

Abstract: A system for delivering power to an integrated circuit (IC) component mounted on a circuit board includes a circuit board having a first side and an opposite second side. An IC component is mounted on the first side of the circuit board, and the IC component has a plurality of power contacts. A voltage regulator module (VRM) is coupled to the second side of the circuit board. The VRM reduces a voltage supplied to the IC component from a first voltage to a second voltage. An interface connector is mounted on the VRM. The interface connector is in mating engagement with the IC component, thereby delivering power at the second voltage directly to the IC component.

Abstract translation: 用于向安装在电路板上的集成电路（IC）部件供电的系统包括具有第一侧和相对的第二侧的电路板。 IC元件安装在电路板的第一面上，IC元件具有多个电源触点。 电压调节器模块（VRM）耦合到电路板的第二侧。 VRM将提供给IC部件的电压从第一电压降低到第二电压。 接口连接器安装在VRM上。 接口连接器与IC部件配合接合，从而将第二电压的功率直接传递给IC部件。

公开(公告)号：US20050231890A1

公开(公告)日：2005-10-20

申请号：US10826605

申请日：2004-04-16

Applicant: John Prymak

Inventor： John Prymak

IPC: C03B29/00 ,  H01G2/06 ,  H01G4/228 ,  H01G4/232 ,  H01L23/50 ,  H05K1/02

CPC classification number: H01G4/232 ,  H01G2/065 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K1/0231 ,  H05K2201/10545 ,  H01L2924/00

Abstract: An electrical component with a printed circuit board. The printed circuit board has an upper face and a lower face. A microprocessor is mounted to the upper face. A capacitor is mounted to the lower face. The capacitor has a first face parallel to the printed circuit board and a second face opposite to the first face. First plates and second plates are in alternating planar relationship with a dielectric therebetween and arranged in a plane perpendicular to the plane created by the circuit board. Each first plate has a first coupling tab and a power tab on opposing edges wherein the first coupling tab terminates at the first face and the power tab terminates at the second face. Each second plate of the second plates comprises a second coupling tab and a ground tab on opposing edges wherein the second coupling tab terminates at the first face and the ground tab terminates at the second face. The first coupling tab and the second coupling tab are in electrical contact with the microprocessor.

Abstract translation: 具有印刷电路板的电气部件。 印刷电路板具有上表面和下表面。 微处理器安装在上面。 电容器安装在下表面。 电容器具有平行于印刷电路板的第一面和与第一面相对的第二面。 第一板和第二板与它们之间的电介质处于交替的平面关系，并且布置在与由电路板产生的平面垂直的平面中。 每个第一板具有在相对边缘上的第一联接接头和电源接头，其中第一连接接头在第一面处终止，并且电源接头在第二面处终止。 第二板的每个第二板包括在相对边缘上的第二联接片和接地片，其中第二连接片在第一面终止并且接地片终止于第二面。 第一耦合片和第二耦合片与微处理器电接触。