METHOD AND SYSTEM FOR ASYNCHRONOUS SUCCESSIVE APPROXIMATION REGISTER (SAR) ANALOG-TO-DIGITAL CONVERTERS (ADCS)

    公开(公告)号:US20180013442A1

    公开(公告)日:2018-01-11

    申请号:US15711177

    申请日:2017-09-21

    Abstract: An asynchronous successive approximation register analog-to-digital converter (SAR ADC), which utilizes one or more overlapping redundant bits in each digital-to-analog converter (DAC) code word, is operable to generate an indication signal that indicates completion of each comparison step and indicates that an output decision for each comparison step is valid. A timer may be initiated based on the generated indication signal. A timeout signal may be generated that preempts the indication signal and forces a preemptive decision, where the preemptive decision sets one or more remaining bits up to, but not including, the one or more overlapping redundant bits in a corresponding digital-to-analog converter code word for a current comparison step to a particular value. For example, the one or more remaining bits may be set to a value that is derived from a value of a bit that was determined in an immediately preceding decision.

    Method And System For I/Q Mismatch Calibration And Compensation For Wideband Communication Receivers

    公开(公告)号:US20170373912A1

    公开(公告)日:2017-12-28

    申请号:US15682446

    申请日:2017-08-21

    Abstract: Methods and systems for I/Q mismatch calibration and compensation for wideband communication receivers may comprise receiving a plurality of radio frequency (RF) channels, downconverting the received plurality of received RF channels to baseband frequencies, determining and removing average in-phase (I) and quadrature (Q) gain and phase mismatch of the downconverted channels, determining a phase and amplitude tilt of the downconverted channels with removed average I and Q gain and phase mismatch, and compensating for said phase and amplitude tilt I and Q gain and phase mismatch of the downconverted channels. The determined phase tilt may be compensated utilizing a phase tilt correction filter, which may comprise one or more all-pass filters. The average I and Q gain and phase mismatch may be determined utilizing a blind source separation (BSS) estimation algorithm.

    DIGITAL-TO-ANALOG CONVERTER (DAC) WITH DIGITAL OFFSETS

    公开(公告)号:US20170359080A1

    公开(公告)日:2017-12-14

    申请号:US15633157

    申请日:2017-06-26

    CPC classification number: H03M1/1023 H03M1/0607 H03M1/68

    Abstract: Systems and methods are provided for digital-to-analog conversions with adaptive digital offsets. A digital offset may be determined and applied to a digital input to a digital-to-analog converter (DAC), and digital-to-analog conversions are then applied via the DAC to the digital input with the digital offset. The digital offset may be set to account for one or more conditions relating to inputs to the DAC, with the one or more conditions affecting switching characteristics of one or more of a plurality of conversion elements in the DAC. The digital offset may be determined dynamically and adaptively, such as based on the input and/or conditions relating to the input. The adjustments may be selectively applied to the digital offset for particular input conditions.

    TRANSCEIVER ARRAY
    126.
    发明申请
    TRANSCEIVER ARRAY 审中-公开

    公开(公告)号:US20170331566A1

    公开(公告)日:2017-11-16

    申请号:US15668883

    申请日:2017-08-04

    Abstract: Each of a plurality of modules comprises a respective one of a plurality of antenna elements, and each of a subset of the plurality of modules comprising a respective one of a plurality of transceivers, wherein the plurality of modules are interconnected via one or more communication links. The circuitry may be operable to receive a calibration signal via the plurality of antenna elements, determine, for each one of the antenna elements, a time and/or phase of arrival of the calibration signal, calculate, based on the time and/or phase of arrival of the calibration signal at each of the plurality of antenna elements, electrical distances between the plurality of antenna elements on the one or more communication links, and calculate beamforming coefficients for use with the plurality of antenna elements based on the electrical distances.

    Method and apparatus for MoCA network with protected set-up

    公开(公告)号:US09819698B2

    公开(公告)日:2017-11-14

    申请号:US14921667

    申请日:2015-10-23

    CPC classification number: H04L63/20 H04L9/0841 H04L9/3239

    Abstract: Systems and methods are disclosed for securing a network, for admitting new nodes into an existing network, and/or for securely forming a new network. As a non-limiting example, an existing node may be triggered by a user, in response to which the existing node communicates with a network coordinator node. Thereafter, if a new node attempts to enter the network, and also for example has been triggered by a user, the network coordinator may determine, based at least in part on parameters within the new node and the network coordinator, whether the new node can enter the network.

    SUCCESSIVE-APPROXIMATION REGISTER (SAR) ANALOG-TO-DIGITAL CONVERTER (ADC) WITH ULTRA LOW BURST ERROR RATE

    公开(公告)号:US20170272091A1

    公开(公告)日:2017-09-21

    申请号:US15478397

    申请日:2017-04-04

    Inventor: Yongjian Tang

    CPC classification number: H03M1/466 H03M1/00 H03M1/0695 H03M1/12 H03M1/125

    Abstract: Systems and methods are provided for a successive approximation register (SAR) analog-to-digital converter (ADC) with an ultra-low burst error rate. Analog-to-digital conversions may be applied via a plurality of successive conversion cycles, with each conversion cycle corresponding to a particular bit in a corresponding digital output. Meta-stability may be detected during each one of the plurality of successive conversion cycles, and for each one of the plurality of successive conversion cycles, a next one of the plurality of successive conversion cycles may be triggered based on a cycle termination event. After completion of all of the plurality of successive conversion cycles, a meta-stability state of each of the plurality of successive conversion cycles may be assessed, and the digital output may be controlled based on the assessment.

    Dynamically calibrated pre-distortion

    公开(公告)号:US09768987B2

    公开(公告)日:2017-09-19

    申请号:US14595896

    申请日:2015-01-13

    Abstract: Systems and methods are provided for dynamic calibration of pre-distortion modification in transmitters. The pre-distortion modification may be applied during processing of an input signal for transmission, and feedback data, relating to the transmitter and/or processing performed after application of the pre-distortion modification in the transmitter, may be obtained. Adjustments to the pre-distortion modification may be determined based on the feedback data, and the adjustments to the pre-distortion modification may be applied in loop-back manner, thus enabling adjustment of pre-distortion modification dynamically based on real-time and current data. The pre-distortion modification may comprise modifying one or more signal characteristics, such as phase, frequency, and/or amplitude. Determining and/or applying the adjustments to the pre-distortion modification may be done periodically, based on one or more particular events, or conditionally.

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