公开(公告)号：US20060250781A1

公开(公告)日：2006-11-09

申请号：US10562252

申请日：2004-06-04

Applicant: Michael Bauer ,  Wolfram Eurskens ,  Rudolf Kerter ,  Heinz Pape ,  Peter Strobe ,  Stephan Stoeckl

Inventor： Michael Bauer ,  Wolfram Eurskens ,  Rudolf Kerter ,  Heinz Pape ,  Peter Strobe ,  Stephan Stoeckl

IPC: H05K1/09

CPC classification number: H05K1/184 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/15192 ,  H01L2924/15311 ,  H05K1/0284 ,  H05K3/105 ,  H05K3/46 ,  H05K2201/0215 ,  H05K2201/0257 ,  H05K2201/0919 ,  H05K2201/10446 ,  H05K2203/102 ,  H05K2203/108 ,  H05K2203/1131 ,  H05K2203/1136

Abstract: An electronic module and a method for the production thereof is disclosed. In one embodiment, the electronic module has a plurality of components arranged on a wiring block. The wiring block has a plurality of outer sides and has in its volume lines interconnecting contact pads on the outer sides. The contact pads are electrically connected to component connections of the components.

公开(公告)号：US20060108147A1

公开(公告)日：2006-05-25

申请号：US11320965

申请日：2005-12-30

Applicant: Tomoyuki Abe ,  Nobuyuki Hayashi ,  Motoaki Tani ,  Kenichiro Abe ,  Kenji Iida

Inventor： Tomoyuki Abe ,  Nobuyuki Hayashi ,  Motoaki Tani ,  Kenichiro Abe ,  Kenji Iida

IPC: H05K1/11 ,  H01R12/04

CPC classification number: G01R1/07314 ,  G01R1/44 ,  H05K1/0366 ,  H05K1/056 ,  H05K1/117 ,  H05K3/429 ,  H05K3/4608 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4688 ,  H05K2201/0323 ,  H05K2201/0919 ,  H05K2201/09536 ,  H05K2201/09845 ,  H05K2203/061

Abstract: A printed wiring board is made of first and second substrates superimposed on each other. The first and second substrates respectively include a core layer made of resin containing carbon fibers. The second substrate has the outline different from that of the first substrate. A stepped surface is defined on the front surface at least of the first substrate. Electrodes can be formed on the stepped surface as well as on the back surface of the first substrate and the front surface of the second substrate. This structure enables detection of an electric signal from the stepped surface. A further flexibility can thus be achieved in locating electrodes as compared with a conventional printed wiring board having uniform substrates simply superimposed on each other. This results in an expanded use or purpose for a printed wiring board.

Abstract translation: 印刷电路板由彼此重叠的第一和第二基板制成。 第一和第二基板分别包括由含有碳纤维的树脂制成的芯层。 第二基板具有与第一基板的轮廓不同的轮廓。 至少在第一基板的表面上限定有台阶面。 电极可以形成在台阶表面以及第一基板的背面和第二基板的前表面上。 该结构能够检测来自台阶表面的电信号。 因此与具有简单地叠加的均匀基板的传统印刷线路板相比，可以在定位电极方面实现更大的灵活性。 这导致印刷电路板的使用或目的的扩大。

公开(公告)号：US06986198B2

公开(公告)日：2006-01-17

申请号：US10744142

申请日：2003-12-22

Applicant: Kenneth Fallon ,  Miguel A. Jimarez ,  Ross W. Keesler ,  John M. Lauffer ,  Roy H. Magnuson ,  Voya R. Markovich ,  Irv Memis ,  Jim P. Paoletti ,  Marybeth Perrino ,  John A. Welsh ,  William E. Wilson

Inventor： Kenneth Fallon ,  Miguel A. Jimarez ,  Ross W. Keesler ,  John M. Lauffer ,  Roy H. Magnuson ,  Voya R. Markovich ,  Irv Memis ,  Jim P. Paoletti ,  Marybeth Perrino ,  John A. Welsh ,  William E. Wilson

IPC: H05K3/36

CPC classification number: H05K3/445 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/056 ,  H05K1/113 ,  H05K3/0023 ,  H05K3/0052 ,  H05K3/0094 ,  H05K3/06 ,  H05K3/108 ,  H05K3/426 ,  H05K3/429 ,  H05K3/44 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0919 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/10734 ,  H05K2203/0323 ,  H05K2203/0574 ,  H05K2203/0733 ,  H05K2203/1394 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer termination in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.

Abstract translation: 提供了一种在两个可光成像的电介质层之间形成具有金属功率平面层的印刷电路卡的方法。 通过孔穿过的光刻金属填充通孔位于光图案化材料中，信号电路位于连接到通孔和电镀通孔的每个介电材料的表面上。 边框可以在卡周围，包括从电介质层之一的边缘终止的金属层。 提供带有间隙孔的铜箔。 第一层和第二层可光成像的可固化电介质材料位于铜的相对两侧。 在可光成像材料的第一层和第二层上形成图案以通过通孔显露金属层。 开发了通孔，在两个电介质层中对其进行图案化。 可光成像材料，通孔和通孔的表面通过镀铜进行金属化，优选使用光致抗蚀剂。

公开(公告)号：US06974333B2

公开(公告)日：2005-12-13

申请号：US10813945

申请日：2004-03-30

Applicant: Douglas Glenn Wildes ,  Robert Stephen Lewandowski ,  Geir Ultveit Haugen

Inventor： Douglas Glenn Wildes ,  Robert Stephen Lewandowski ,  Geir Ultveit Haugen

IPC: H05K1/14 ,  H01R12/00 ,  H05K1/00 ,  H05K1/11 ,  H05K3/36

CPC classification number: H01R12/62 ,  H01R12/52 ,  H05K1/117 ,  H05K3/365 ,  H05K2201/0919 ,  H05K2201/09845 ,  H05K2203/1572

Abstract: A high-density connection of multiple circuit boards having overlapping ends arranged in a stack. The metal traces on the stacked circuit boards are electrically connected by contact of the ends of the traces, which ends may be pads. The stacked circuit boards can be clamped, soldered or bonded together. Multiple circuit boards may be connected to a single circuit board. In one embodiment, double-sided circuit boards are stacked so that a first circuit board connects to a second circuit board through a third circuit board disposed intermediate the first and second circuit boards. The circuit boards may be flexible or rigid.

Abstract translation: 具有重叠端的多个电路板的高密度连接被布置成堆叠。 层叠电路板上的金属迹线通过迹线端部的接触而电连接，该端部可以是焊盘。 堆叠电路板可以夹紧，焊接或粘合在一起。 多个电路板可以连接到单个电路板。 在一个实施例中，双面电路板被堆叠，使得第一电路板通过布置在第一和第二电路板之间的第三电路板连接到第二电路板。 电路板可以是柔性的或刚性的。

公开(公告)号：US06965161B2

公开(公告)日：2005-11-15

申请号：US10340590

申请日：2003-01-13

Applicant: Seok Taek Jun ,  Young Keun Lee ,  Ik Seo Choi

Inventor： Seok Taek Jun ,  Young Keun Lee ,  Ik Seo Choi

IPC: H01G4/12 ,  H01G4/252 ,  H01G4/30 ,  H01L23/498 ,  H05K1/03 ,  H05K1/14 ,  H05K3/00 ,  H05K3/24 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H01L23/12

CPC classification number: H05K3/403 ,  H01L23/49805 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/0052 ,  H05K3/245 ,  H05K3/4061 ,  H05K3/429 ,  H05K3/4629 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09454 ,  H05K2203/1476 ,  H01L2924/00

Abstract: A ceramic multilayer substrate is formed by vertically stacking and firing a plurality of ceramic sheets, in which a connection bar is vertically formed between internal patterns and an external terminal of each ceramic sheet, preventing metallic conductive layers of the internal patterns from being deformed during processing the external terminal. The ceramic multilayer substrate has pattern layers formed on surfaces of at least some of the ceramic sheets. At least one through hole is formed on the edges of the stacked ceramic sheets so as to be opened to the outside. An external terminal is formed on an inner wall of the through hole connected with the pattern layers, and directly contacting the connection bar, whereby the connection bar supports the electrical connection between the external terminal and the pattern layers.

Abstract translation: 通过垂直堆叠和烧制多个陶瓷片形成陶瓷多层基板，其中在内部图案和每个陶瓷片的外部端子之间垂直形成连接条，防止内部图案的金属导电层在加工期间变形 外部终端。 陶瓷多层基板具有形成在至少一些陶瓷片的表面上的图案层。 在层叠的陶瓷片的边缘上形成至少一个通孔，以便向外部敞开。 外部端子形成在与图案层连接的通孔的内壁上，并且直接接触连接杆，由此连接杆支撑外部端子和图案层之间的电连接。

公开(公告)号：US20050236178A1

公开(公告)日：2005-10-27

申请号：US10833711

申请日：2004-04-27

Applicant: Philip Lauriello

Inventor： Philip Lauriello

IPC: H05K1/03 ,  H05K3/32 ,  H05K3/36 ,  H05K3/40 ,  H05K3/46 ,  H05K7/06

CPC classification number: H05K3/4092 ,  H05K3/328 ,  H05K3/4611 ,  H05K2201/0129 ,  H05K2201/015 ,  H05K2201/09145 ,  H05K2201/0919 ,  H05K2201/09754 ,  H05K2201/1034 ,  Y10T29/49126

Abstract: A signal processing module can be manufactured from a plurality of composite substrate layers, each substrate layer includes elements of multiple individual processing modules. Surfaces of the layers are selectively metalicized to form signal processing elements when the substrate layers are fusion bonded in a stacked arrangement. Prior to bonding, the substrate layers are milled to form gaps located at regions between the processing modules. Prior to bonding, the leads are positioned such that they extend from signal coupling points on said metalicized surfaces into the gap regions. The substrate layers are then fusion bonded to each other such that the plurality of substrate layers form signal processing modules with leads that extend from an interior of the modules into the gap areas. The individual modules may then be separated by milling the substrate layers to de-panel the modules.

Abstract translation: 信号处理模块可以由多个复合衬底层制造，每个衬底层包括多个单独的处理模块的元件。 当衬底层以堆叠布置融合时，这些层的表面被选择性地金属化以形成信号处理元件。 在接合之前，将衬底层研磨以形成位于处理模块之间的区域的间隙。 在接合之前，引线定位成使得它们从所述金属化表面上的信号耦合点延伸到间隙区域中。 然后将衬底层彼此熔合，使得多个衬底层形成具有从模块内部延伸到间隙区域中的引线的信号处理模块。 然后可以通过研磨衬底层来分离各个模块以使模块脱模。

公开(公告)号：US20050190537A1

公开(公告)日：2005-09-01

申请号：US11060360

申请日：2005-02-18

Applicant: Mauro Rossi

Inventor： Mauro Rossi

IPC: G06F1/16 ,  H05K1/11 ,  H05K3/36 ,  H05K3/46 ,  H05K5/00 ,  G06K19/02 ,  H05K7/00

CPC classification number: H05K1/117 ,  H01R12/523 ,  H01R12/721 ,  H05K3/4611 ,  H05K2201/09127 ,  H05K2201/0919 ,  H05K2201/09845 ,  H05K2203/061

Abstract: Multilayer expansion card for connecting an apparatus or device to an electronic apparatus, particularly for association to a mother card (15) of a Personal Computer. The card comprises a first part (12), intended principally for connection, having a thickness coherent with the requirements of size for connection to the standard slots (14) of the mother card (15), and a second part (13), intended principally for the management of the card functions and for processing, and hence the electronics, having a greater thickness with respect to the first part (12) in order to contain a correspondingly greater number of layers (11, 16) intended for the management of a high density of electronic-type signals.

Abstract translation: 用于将设备或设备连接到电子设备的多层扩展卡，特别是用于与个人计算机的母卡（15）相关联。 该卡包括主要用于连接的第一部分（12），其具有与用于连接到母卡（15）的标准槽（14）的尺寸要求相一致的厚度，以及第二部分（13），预期 主要用于管理卡功能和处理，并因此管理电子设备，相对于第一部分（12）具有更大的厚度，以便容纳相应更多数量的层（11,16），用于管理 高密度的电子型信号。

公开(公告)号：US20050103522A1

公开(公告)日：2005-05-19

申请号：US10990280

申请日：2004-11-15

Applicant: Kevin Grundy ,  William Wiedemann ,  Joseph Fjelstad

Inventor： Kevin Grundy ,  William Wiedemann ,  Joseph Fjelstad

IPC: H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H05K3/46

CPC classification number: H05K3/3405 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/3011 ,  H05K1/183 ,  H05K3/308 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/0919 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2201/10189 ,  H05K2201/1059 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10727 ,  H05K2201/10734 ,  H01L2924/00

Abstract: Disclosed are stair stepped PCB structures which provide high performance, direct path, via-less interconnections between various elements of an electronic interconnection structure including, among others, IC packages and connectors.

Abstract translation: 公开了楼梯级PCB结构，其提供包括IC封装和连接器在内的电子互连结构的各种元件之间的高性能，直接路径，无通孔互连。

公开(公告)号：US20040094834A1

公开(公告)日：2004-05-20

申请号：US10340590

申请日：2003-01-13

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Seok Taek Jun ,  Young Keun Lee ,  Ik Seo Choi

IPC: H01L023/053

CPC classification number: H05K3/403 ,  H01L23/49805 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/0052 ,  H05K3/245 ,  H05K3/4061 ,  H05K3/429 ,  H05K3/4629 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09454 ,  H05K2203/1476 ,  H01L2924/00

Abstract: Disclosed are a ceramic multilayer substrate formed by vertically stacking and firing a plurality of ceramic substrates, in which a connection bar is longitudinally formed on connection areas between internal patterns and an external terminal of each ceramic substrate, thereby preventing metallic conductive layers of the internal patterns from being deformed during processing the external terminal and stably connecting the internal patterns to the external terminal, and a method for manufacturing the substrate. The ceramic multilayer substrate comprises pattern layers formed on surfaces of parts or all of the ceramic substrates so as to form designated circuit elements; connection bars longitudinally formed in the ceramic substrates within a part of the pattern layers extended to the edges of the ceramic substrates so as to exchange signals with the outside; at least one through hole being formed on the edges of the stacked ceramic substrates so as to be opened to the outside and exposing the connection bar; and an external terminal formed on an inner wall of the through hole.

Abstract translation: 公开了通过垂直堆叠和烧制多个陶瓷基板而形成的陶瓷多层基板，其中在内部图案和每个陶瓷基板的外部端子之间的连接区域上纵向地形成连接条，从而防止内部图案的金属导电层 在处理外部端子期间变形并将内部图案稳定地连接到外部端子，以及用于制造基板的方法。 陶瓷多层基板包括形成在部分或全部陶瓷基板的表面上的图案层，以便形成指定的电路元件; 纵向形成在陶瓷基板内的图案层的一部分延伸到陶瓷基板的边缘以便与外部交换信号的连接条; 至少一个通孔形成在堆叠的陶瓷基板的边缘上，以便向外部敞开并暴露连接杆; 以及形成在通孔的内壁上的外部端子。

公开(公告)号：US20040000427A1

公开(公告)日：2004-01-01

申请号：US10184387

申请日：2002-06-27

Inventor： Alan E. Wang ,  Kevin C. Olson

IPC: H05K001/03 ,  H05K001/09 ,  B32B003/10 ,  H05K001/11 ,  H01R012/04 ,  B21B001/00 ,  B21C027/00 ,  B21D028/00 ,  G03F007/20 ,  G03F007/30 ,  G03F007/40

CPC classification number: H05K3/44 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09554 ,  H05K2203/135 ,  Y10T29/49126 ,  Y10T29/49156 ,  Y10T29/49167 ,  Y10T428/12361 ,  Y10T428/24322

Abstract: Provided is a process for creating vias for a circuit assembly including the steps of (a) applying a curable coating composition to a substrate, some or all of which is electrically conductive, to form an uncured coating thereon; (b) applying a resist over the uncured coating; (c) imaging the resist in predetermined locations; (d) developing the resist to expose predetermined areas of the uncured coating; (e) removing the exposed areas of the uncured coating; and (f heating the coated substrate of step (e) to a temperature and for a time sufficient to cure the coating. Also disclosed is a process of fabricating a circuit assembly.

Abstract translation: 提供了一种用于创建电路组件的通孔的方法，包括以下步骤：（a）将可固化涂料组合物施加到基底上，其中一些或全部导电，以在其上形成未固化的涂层; （b）在未固化的涂层上涂覆抗蚀剂; （c）在预定位置对抗蚀剂进行成像; （d）显影抗蚀剂以暴露未固化涂层的预定区域; （e）去除未固化涂层的暴露区域; 和（f）将步骤（e）的涂布基材加热到足以固化涂层的温度和时间。还公开了一种制造电路组件的方法。