公开(公告)号：US12127333B2

公开(公告)日：2024-10-22

申请号：US18382450

申请日：2023-10-20

Applicant: Smith & Nephew PLC

Inventor： Ben Alan Askem ,  Fernando Bettani ,  Alberto Fasan ,  Allan Kenneth Frazer Grugeon Hunt ,  Felix Clarence Quintanar

IPC: H02H9/00 ,  A61M1/00 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K9/00

CPC classification number: H05K1/0257 ,  A61M1/74 ,  A61M1/80 ,  A61M1/84 ,  A61M1/90 ,  A61M1/96 ,  H05K1/0259 ,  H05K1/115 ,  H05K1/181 ,  H05K9/0067 ,  A61M1/78 ,  A61M1/962 ,  A61M1/982 ,  A61M1/985 ,  A61M2205/0233 ,  A61M2205/15 ,  A61M2205/18 ,  A61M2205/502 ,  A61M2205/8206 ,  A61M2209/088 ,  H05K2201/093 ,  H05K2201/09354 ,  H05K2201/09618

Abstract: Embodiments of negative pressure wound therapy systems and methods are disclosed. In one embodiment, an apparatus includes a housing, negative pressure source, circuit board, and one or more controllers. The circuit board can be supported by the housing and include a conductive pathway extending around at least part of a perimeter of a first side of the circuit board. The conductive pathway can be electrically coupled to an electrical ground for the circuit board. The one or more controllers can be mounted on the circuit board and activate and deactivate the negative pressure source.

公开(公告)号：US11751324B2

公开(公告)日：2023-09-05

申请号：US17771240

申请日：2020-10-16

Applicant: SAFRAN ELECTRONICS & DEFENSE

Inventor： Thierry Segond

IPC: H05K1/02

CPC classification number: H05K1/0259 ,  H05K2201/09354

Abstract: An electronic card comprising: a first card portion including lightning protection components, a first ground plane and a first ground zone; a second card portion comprising functional components, a second ground plane and a second ground zone; a third card portion, which separates and electrically isolates the first ground plane and the first ground zone from the second ground plane and from the second ground zone; the first ground zone and the second ground zone being unvarnished; the first ground zone and the second ground zone being arranged in order to be applied onto a housing element that is electrically conductive and that belongs to a housing in which the electronic card is integrated.

公开(公告)号：US09437559B2

公开(公告)日：2016-09-06

申请号：US14686922

申请日：2015-04-15

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yuki Wakabayashi

IPC: H01L23/58 ,  H01L23/66 ,  H05K1/02 ,  H01L23/538 ,  H01L25/16 ,  H04B5/00 ,  H05K1/11 ,  H05K1/18 ,  H01L23/498

CPC classification number: H01L23/66 ,  H01L23/49822 ,  H01L23/5384 ,  H01L25/165 ,  H01L2223/6616 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2924/1421 ,  H01L2924/15313 ,  H01L2924/19105 ,  H01L2924/3025 ,  H04B5/0056 ,  H05K1/0218 ,  H05K1/0243 ,  H05K1/0298 ,  H05K1/11 ,  H05K1/181 ,  H05K2201/09354 ,  H05K2201/09618

Abstract: A high-frequency module includes a laminate, a bottom surface electrode, and internal electrodes that provide grounding. The bottom surface electrode is provided on a bottom surface of the laminate. The laminate includes a wiring region through which wiring of a high-frequency circuit passes. The internal electrodes that provide grounding are provided between layers of the laminate and connected to the bottom surface electrode, respectively. The internal electrodes that provide grounding each include a line including ends extending outside of the wiring region along an outer edge of the laminate. The internal electrodes that provide grounding are endlessly continuous with each other when seen in a lamination direction of the laminate.

Abstract translation: 高频模块包括层叠体，底面电极和提供接地的内部电极。 底面电极设置在层叠体的底面上。 层叠体包括高频电路的布线通过的布线区域。 提供接地的内部电极分别设置在层压体的层之间并分别连接到底面电极。 提供接地的内部电极包括沿着层压体的外边缘延伸到布线区域外侧的端部的线。 当层叠体的层叠方向观察时，提供接地的内部电极彼此连续地连续。

公开(公告)号：US20160242331A1

公开(公告)日：2016-08-18

申请号：US15045841

申请日：2016-02-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Sik PARK ,  Seung-Ki CHOI ,  Joon HEO ,  Hyun-Ju HONG

IPC: H05K9/00 ,  H05K5/00

CPC classification number: H05K9/002 ,  H01L2224/16225 ,  H05K1/0218 ,  H05K1/0259 ,  H05K5/0004 ,  H05K5/0017 ,  H05K9/0024 ,  H05K9/0039 ,  H05K2201/0919 ,  H05K2201/09354 ,  H05K2201/10371

Abstract: An electronic device is provided that includes a PCB including a first surface, a second surface, and a side surface; an electronic component arranged on the first surface, adjacent to a portion of the side surface; a shield structure including a cap that covers the electronic component and a sidewall extending from a periphery of the cap toward the first surface of the PCB, wherein the sidewall extends in a first direction that is non-parallel to the first surface of the PCB; a first conductive structure that is formed on a portion of the side surface of the PCB; and a second conductive structure that is formed on a portion of the first surface to be connected to the first conductive structure. The sidewall contacts with the first surface of the PCB and overlaps with the second conductive structure, when viewed from above the first surface of the PCB.

Abstract translation: 提供一种电子设备，其包括：PCB，其包括第一表面，第二表面和侧表面; 布置在所述第一表面上的与所述侧表面的一部分相邻的电子部件; 屏蔽结构，其包括覆盖电子部件的盖和从盖的周边延伸到PCB的第一表面的侧壁，其中侧壁沿不平行于PCB的第一表面的第一方向延伸; 第一导电结构，其形成在所述PCB的侧表面的一部分上; 以及形成在所述第一表面的要连接到所述第一导电结构的部分上的第二导电结构。 当从PCB的第一表面上方观察时，侧壁与PCB的第一表面接触并与第二导电结构重叠。

公开(公告)号：US09313879B2

公开(公告)日：2016-04-12

申请号：US14056611

申请日：2013-10-17

Applicant: Wistron Corp.

Inventor： Lung-Fai Tuen ,  Wen-Hsien Wang ,  Chiu-Hsien Chang

IPC: H02H9/04 ,  H05K1/02

CPC classification number: H05K1/0259 ,  H02H9/045 ,  H05K2201/09354 ,  H05K2201/09363

Abstract: A motherboard with an electrostatic discharge protection (ESD) function including a first electrode, a second electrode, an isolation region and an energy storage unit is disclosed. The first electrode receives a grounding level. The second electrode includes at least one solder pad to fix an input/output port thereon. The isolation region is disposed between the first and the second electrodes. The energy storage unit is coupled between the first and the second electrodes and disposed across the isolation region.

Abstract translation: 公开了一种具有包括第一电极，第二电极，隔离区域和能量存储单元的静电放电保护（ESD）功能的主板。 第一个电极接收接地电平。 第二电极包括至少一个用于固定其上的输入/输出端口的焊盘。 隔离区设置在第一和第二电极之间。 能量存储单元耦合在第一和第二电极之间并且跨越隔离区域设置。

公开(公告)号：US09215802B2

公开(公告)日：2015-12-15

申请号：US14234604

申请日：2012-12-25

Applicant: NGK SPARK PLUG CO., LTD.

Inventor： Jyun Suzuki ,  Naoki Kito ,  Masami Hasegawa ,  Chizuo Nakashima

IPC: H05K1/00 ,  H05K1/03 ,  H05K3/00 ,  H05K1/18 ,  H05K3/40

CPC classification number: H05K1/0306 ,  H05K1/183 ,  H05K3/0052 ,  H05K3/403 ,  H05K2201/0909 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09354

Abstract: A wiring substrate includes a substrate body formed of a plate-like ceramic, having a front surface, a back surface, and a height of 0.8 mm or less; a cavity opening at the front surface and having a rectangular shape as viewed in plane; and side walls having a thickness of 0.3 mm or less between a side surface of the cavity and a side surface of the substrate body. The wiring substrate further includes an electrically conductive layer having the form of a frame and formed on the front surface to surround an opening of the cavity; a ceramic surface having the form of a frame and located adjacently to the electrically conductive layer and along the outer periphery of the front surface; and a via conductor formed in the substrate body along the side surface of the cavity between a bottom surface of the cavity and the front surface.

Abstract translation: 布线基板包括由板状陶瓷形成的基板主体，具有前表面，背面和0.8mm以下的高度; 在前表面开口的空腔，在平面上具有矩形形状; 以及在空腔的侧表面和基板主体的侧表面之间具有0.3mm或更小的厚度的侧壁。 布线基板还包括具有框架形式并形成在前表面上以包围空腔的开口的导电层; 陶瓷表面，其具有框架的形式并且与导电层相邻并且沿着前表面的外周定位; 以及形成在所述基板主体中的所述通孔导体，其沿​​着所述空腔的底表面和所述前表面之间的所述空腔的侧表面。

公开(公告)号：US20150282298A1

公开(公告)日：2015-10-01

申请号：US14224863

申请日：2014-03-25

Applicant: Microsoft Corporation

Inventor： Peter Atkinson ,  Chee Fong ,  Mark Casebolt ,  Ying Liang

IPC: H05K1/02 ,  H05K3/46 ,  H05K9/00

CPC classification number: H05K1/0298 ,  H05K1/0215 ,  H05K1/0216 ,  H05K1/0218 ,  H05K3/403 ,  H05K9/0015 ,  H05K2201/09354

Abstract: An edge plated printed circuit board (PCB) improves radiated emission performance by enhancing ground shielding on the PCB and improving the physical and electrical connection between the PCB and external EMI suppression components including an EMI chassis and gaskets. Inner ground layers within a multi-layer PCB are configured to physically extend to an edge of the PCB, which is plated using copper electroplating, so that copper ground strips disposed at the top and bottom surfaces of the PCB and the inner ground layers are all electrically coupled to the plated edge. In some embodiments, the ground strips can be made thinner compared to conventional arrangements, or be eliminated altogether as a result of the direct connection between the edge plated PCB and external EMI shields.

Abstract translation: 边缘电镀印刷电路板（PCB）通过增强PCB上的接地屏蔽并改善PCB和外部EMI抑制组件（包括EMI机箱和垫圈）之间的物理和电气连接来提高辐射发射性能。 多层PCB内部的接地层被配置为物理地延伸到使用铜电镀进行电镀的PCB的边缘，使得设置在PCB的顶表面和底表面处的铜接地条和内部接地层都是 电耦合到电镀边缘。 在一些实施例中，与常规布置相比，接地条可以做得更薄，或者由于边缘电镀PCB和外部EMI屏蔽之间的直接连接而完全消除接地条。

公开(公告)号：US20140177176A1

公开(公告)日：2014-06-26

申请号：US14133786

申请日：2013-12-19

Applicant: CANON KABUSHIKI KAISHA

Inventor： Shinnosuke TORII ,  Takayuki WADA

IPC: H05K1/02

CPC classification number: H05K1/0259 ,  G06F3/00 ,  G06F3/041 ,  G06F2203/04107 ,  H05K2201/09354

Abstract: A panel unit that reduces the influence of static electricity applied to a panel member forming a display surface without increasing the size of an electronic apparatus. The panel unit has a touch panel and an FPC including connection sections which are electrically connected to interconnection sections of the touch panel, and is provided with signal lines and a ground interconnection. The FPC includes conductor-exposed portions each provided between the connection sections connected to the interconnection sections and an outer part of the touch panel. The conductor-exposed portions are configured to be prevented from being electrically conducted to the signal lines, and be electrically conducted to the ground interconnection.

Abstract translation: 一种面板单元，其减小施加到形成显示表面的面板构件的静电的影响，而不增加电子设备的尺寸。 面板单元具有触摸面板和FPC，其包括电连接到触摸面板的互连部分的连接部分，并且设置有信号线和接地互连。 FPC包括各自设置在连接到互连部分的连接部分和触摸面板的外部之间的导体暴露部分。 导体暴露部分被配置为防止对信号线导电，并且被导电到地互连。

公开(公告)号：US20130154773A1

公开(公告)日：2013-06-20

申请号：US13327318

申请日：2011-12-15

Applicant: Domagoj Siprak

Inventor： Domagoj Siprak

IPC: H01P3/08

CPC classification number: H01P3/006 ,  H01P3/003 ,  H01P3/082 ,  H05K1/0219 ,  H05K1/0245 ,  H05K2201/09236 ,  H05K2201/09254 ,  H05K2201/09354

Abstract: A waveguide comprises an inner conductor arranged in a first layer, a pair of outer conductors comprising a first outer conductor and a second outer conductor, and a pair of slotted shields comprising a first slotted shield and a second slotted shield. The first slotted shield and the second slotted shield are arranged in a second layer with a spacing in between to form a section of a ground shield, wherein the second layer is parallel to the first layer. The first slotted shield is connected to the first outer conductor and the second slotted shield is connected to the second outer conductor.

Abstract translation: 波导包括布置在第一层中的内部导体，包括第一外部导体和第二外部导体的一对外部导体以及包括第一开槽屏蔽和第二开槽屏蔽的一对开槽屏蔽。 第一开槽屏蔽件和第二开槽屏蔽件布置在第二层之间，间隔开以形成接地屏蔽件的一部分，其中第二层平行于第一层。 第一开槽屏蔽连接到第一外导体，第二开槽屏蔽连接到第二外导体。

公开(公告)号：US08319117B2

公开(公告)日：2012-11-27

申请号：US12840748

申请日：2010-07-21

Applicant: Ze-Liang Xie

Inventor： Ze-Liang Xie

IPC: H05K1/16

CPC classification number: H05K1/0218 ,  H05K2201/09354 ,  H05K2201/09618

Abstract: A printed circuit board includes signal layers, ground layers, and a power layer, which are superposed. A closed trace is set along edges of each of the signal layers and the power layers. A number of vias are defined in each trace at intervals. Each via extends through the signal layers, the ground layers, and the power layer. Each via is electrically connected to the traces of the signal layers and the power layer, and electrically connected to the ground layers.

Abstract translation: 印刷电路板包括重叠的信号层，接地层和功率层。 沿着每个信号层和功率层的边缘设置闭合迹线。 每个轨迹间隔定义多个通孔。 每个通孔延伸通过信号层，接地层和功率层。 每个通孔电连接到信号层和功率层的迹线，并电连接到接地层。