公开(公告)号：US20060077502A1

公开(公告)日：2006-04-13

申请号：US11090778

申请日：2005-03-25

Applicant: Ming-Hau Tung ,  Manish Kothari ,  William Cummings

Inventor： Ming-Hau Tung ,  Manish Kothari ,  William Cummings

IPC: B29D11/00

CPC classification number: B81C1/00174 ,  B81B2201/047 ,  B81B2203/0181 ,  B81C1/00182 ,  B81C2201/0109 ,  G02B26/001

Abstract: Methods for making MEMS devices such as interferometric modulators involve selectively removing a sacrificial portion of a material to form an internal cavity, leaving behind a remaining portion of the material to form a post structure. The material may be blanket deposited and selectively altered to define sacrificial portions that are selectively removable relative to the remaining portions. Alternatively, a material layer can be laterally recessed away from openings in a covering layer. These methods may be used to make unreleased and released interferometric modulators.

Abstract translation: 用于制造诸如干涉式调制器的MEMS器件的方法包括选择性地去除材料的牺牲部分以形成内部空腔，留下材料的剩余部分以形成柱状结构。 该材料可以被毯式沉积并选择性地改变以限定相对于其余部分可选择性地移除的牺牲部分。 替代地，材料层可以横向凹入远离覆盖层中的开口。 这些方法可用于制造未释放和释放的干涉式调制器。

公开(公告)号：US20060076311A1

公开(公告)日：2006-04-13

申请号：US11090552

申请日：2005-03-25

Applicant: Ming-Hau Tung ,  Philip Floyd ,  Brian Arbuckle

Inventor： Ming-Hau Tung ,  Philip Floyd ,  Brian Arbuckle

IPC: B29D11/00

CPC classification number: B81C1/00174 ,  B81B2201/047 ,  B81B2203/0181 ,  B81C1/00182 ,  B81C2201/0109 ,  G02B26/001

Abstract: Methods for making MEMS devices such as interferometric modulators involve selectively removing a sacrificial portion of a material to form an internal cavity, leaving behind a remaining portion of the material to form a post structure. The material may be blanket deposited and selectively altered to define sacrificial portions that are selectively removable relative to the remaining portions. Alternatively, a material layer can be laterally recessed away from openings in a covering layer. These methods may be used to make unreleased and released interferometric modulators.

公开(公告)号：US20050227477A1

公开(公告)日：2005-10-13

申请号：US10505180

申请日：2003-01-29

Applicant: Mika Okumura ,  Makio Horikawa ,  Kimitoshi Satou

Inventor： Mika Okumura ,  Makio Horikawa ,  Kimitoshi Satou

IPC: B81B3/00 ,  G01P15/08 ,  G01P15/125 ,  H01L21/28 ,  H01L29/84 ,  H01L21/4763

CPC classification number: B81C1/00095 ,  B81B2201/0235 ,  B81C2201/0109 ,  B81C2201/0159 ,  G01P15/0802 ,  G01P15/125 ,  H01L29/84

Abstract: An object of the present invention is to provide a technique for reducing a step height to be covered by photoresist during formation of an electrode connected to a semiconductor substrate, e.g. a silicon substrate on which an acceleration sensor resides. In order to achieve this object, an opening (80) for formation of an electrode (90) is formed before formation of a sacrificial layer (4), semiconductor film (50), and fixed electrode (51). Therefore thick photoresist is not required.

Abstract translation: 本发明的目的是提供一种降低在与半导体衬底连接的电极形成期间由光致抗蚀剂覆盖的台阶高度的技术，例如， 加速度传感器所在的硅基板。 为了实现该目的，在形成牺牲层（4），半导体膜（50）和固定电极（51）之前形成用于形成电极（90）的开口（80）。 因此，不需要厚的光致抗蚀剂。

公开(公告)号：US20050221528A1

公开(公告)日：2005-10-06

申请号：US11129541

申请日：2005-05-13

Applicant: Mike Bruner

Inventor： Mike Bruner

IPC: B81C1/00 ,  B81B3/00 ,  B81B7/00 ,  H01L21/46 ,  H02N1/00 ,  H03H9/24

CPC classification number: B81C1/00484 ,  B81B2201/0271 ,  B81B2203/0136 ,  B81C1/00246 ,  B81C1/00333 ,  B81C2201/0109 ,  B81C2201/014 ,  B81C2203/0136 ,  B81C2203/0735

Abstract: The current invention provides for encapsulated release structures, intermediates thereof and methods for their fabrication. The multi-layer structure has a capping layer, that preferably comprises silicon oxide and/or silicon nitride, and which is formed over an etch resistant substrate. A patterned device layer, preferably comprising silicon nitride, is embedded in a sacrificial material, preferably comprising polysilicon, and is disposed between the etch resistant substrate and the capping layer. Access trenches or holes are formed in to capping layer and the sacrificial material are selectively etched through the access trenches, such that portions of the device layer are release from sacrificial material. The etchant preferably comprises a noble gas fluoride NGF2x (wherein Ng=Xe, Kr or Ar: and where x=1, 2 or 3). After etching that sacrificial material, the access trenches are sealed to encapsulate released portions the device layer between the etch resistant substrate and the capping layer. The current invention is particularly useful for fabricating MEMS devices, multiple cavity devices and devices with multiple release features.

公开(公告)号：US06924538B2

公开(公告)日：2005-08-02

申请号：US10776572

申请日：2004-02-11

Applicant: Venkatachalam C. Jaiprakash ,  Jonathan W. Ward ,  Thomas Rueckes ,  Brent M. Segal

Inventor： Venkatachalam C. Jaiprakash ,  Jonathan W. Ward ,  Thomas Rueckes ,  Brent M. Segal

IPC: B81B3/00 ,  G11C11/56 ,  G11C13/02 ,  G11C23/00 ,  H01H1/00 ,  H01H59/00 ,  H01L21/768 ,  H01L51/30 ,  H01L29/84 ,  B82B1/00

CPC classification number: G11C13/025 ,  B81B2203/0338 ,  B81B2203/04 ,  B81C1/00142 ,  B81C2201/0109 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/162 ,  C01B2202/02 ,  C01B2202/22 ,  G11C11/56 ,  G11C13/0033 ,  G11C23/00 ,  G11C2213/16 ,  G11C2213/77 ,  G11C2213/81 ,  H01H1/0094 ,  H01L21/76838 ,  H01L51/0048 ,  H01L2221/1094 ,  Y10S977/943

Abstract: Electro-mechanical switches and memory cells using vertically-disposed nanofabric articles and methods of making the same are described. An electro-mechanical device, includes a structure having a major horizontal surface and a channel formed therein. A conductive trace is in the channel; and a nanotube article vertically suspended in the channel, in spaced relation to a vertical wall of the channel. The article is electro-mechanically deflectable in a horizontal direction toward the conductive trace. Under certain embodiments, the vertically suspended extent of the nanotube article is defined by a thin film process. Under certain embodiments, the vertically suspended extent of the nanotube article is about 50 nanometers or less. Under certain embodiments, the nanotube article is clamped with a conducting material disposed in porous spaces between some nanotubes of the nanotube article. Under certain embodiments, the nanotube article is formed from a porous nanofabric. Under certain embodiments, the nanotube article is electromechanically deflectable into contact with the conductive trace and the contact is either a volatile state or non-volatile state depending on the device construction. Under certain embodiments, the vertically oriented device is arranged into various forms of three-trace devices. Under certain embodiments, the channel may be used for multiple independent devices, or for devices that share a common electrode.

Abstract translation: 描述了使用垂直布置的纳米制品的机电开关和存储单元及其制造方法。 机电装置包括具有主要水平表面和形成在其中的通道的结构。 通道中有导电迹线; 以及垂直悬挂在所述通道中的与所述通道的垂直壁成间隔开的纳米管制品。 该物品在水平方向上可电导向导电迹线偏转。 在某些实施方案中，纳米管制品的垂直悬浮程度由薄膜工艺限定。 在某些实施方案中，纳米管制品的垂直悬浮程度为约50纳米或更小。 在某些实施例中，纳米管制品被夹持在布置在纳米管制品的一些纳米管之间的多孔空间中的导电材料上。 在某些实施方案中，纳米管制品由多孔纳米纤维形成。 在某些实施例中，取决于器件结构，纳米管制品在机电上可偏转成与导电迹线接触，并且触点是易失性状态或非易失性状态。 在某些实施例中，垂直取向的装置被布置成各种形式的三轨迹装置。 在某些实施例中，信道可以用于多个独立设备，或者可以用于共享公共电极的设备。

公开(公告)号：US20050110110A1

公开(公告)日：2005-05-26

申请号：US10721524

申请日：2003-11-25

Applicant: Richard Blanchard ,  Joseph McAlexander

Inventor： Richard Blanchard ,  Joseph McAlexander

IPC: G01P15/135 ,  B81B3/00 ,  B81C1/00 ,  G01K5/62 ,  G01P15/18 ,  H01L21/8238 ,  H01L29/82

CPC classification number: B81C1/00626 ,  B81B2201/0235 ,  B81B2203/0118 ,  B81B2203/033 ,  B81C2201/0109 ,  B81C2201/014

Abstract: A released beam structure fabricated in trench and manufacturing method thereof are provided herein. One embodiment of a released beam structure according to the present invention comprises a semiconductor substrate, a trench, a first conducting layer, and a beam. The trench extends into the semiconductor substrate and has walls. The first conducting layer is positioned over the walls of the trench at selected locations. The beam is positioned with the trench and is connected at a first portion thereof to the semiconductor substrate and movable at a second portion thereof. The second portion of the beam is spaced from the walls of the trench by a selected distance. Therefore, the second portion of the beam is free to move in a plane that is perpendicular or parallel to the surface of the substrate, and could be deflected to electrically contact with the walls of the trench in response to a predetermined acceleration force or a predetermined temperature variation applied on the beam structure. Other beam structures such as a beam held at both ends, or a beam held in the middle are also possible. Several beam structures at different angles can be fabricated simultaneously and mechanical etching stops are automatically formed to prevent unwanted overstress conditions when manufacturing several beam structures at the same time. Beam structures can also be manufactured in three orthogonal directions, providing information on acceleration in any direction.

Abstract translation: 本发明提供一种以沟槽制造的释放的束结构及其制造方法。 根据本发明的释放的光束结构的一个实施例包括半导体衬底，沟槽，第一导电层和光束。 沟槽延伸到半导体衬底中并具有壁。 第一导电层位于沟槽的选定位置的上方。 光束与沟槽定位并且在其第一部分处连接到半导体衬底并且可在其第二部分移动。 梁的第二部分与沟槽的壁间隔一定距离。 因此，梁的第二部分在垂直于或平行于衬底的表面的平面中自由移动，并且可以响应于预定的加速力或预定的加速力而被偏转以与沟槽的壁电接触 温度变化施加在梁结构上。 其他梁结构，例如保持在两端的梁或保持在中间的梁也是可能的。 可以同时制造不同角度的几个梁结构，并且自动形成机械蚀刻停止，以在同时制造几个梁结构时防止不想要的过应力条件。 梁结构也可以在三个正交方向上制造，提供关于任何方向上的加速度的信息。

公开(公告)号：US20050085000A1

公开(公告)日：2005-04-21

申请号：US10961162

申请日：2004-10-12

Applicant: Koichi Ikeda ,  Takashi Kinoshita

Inventor： Koichi Ikeda ,  Takashi Kinoshita

IPC: B81C1/00 ,  B81B3/00 ,  H01L21/00

CPC classification number: B81C1/00611 ,  B81B2201/042 ,  B81B2203/0118 ,  B81C2201/0109 ,  B81C2201/0119 ,  B81C2201/0125

Abstract: The present invention is directed to manufacturing methods of electrostatic type MEMS devices. The manufacturing method of the present invention includes the steps of forming a substrate side electrode on a substrate, forming a fluid film before or after forming a sacrificial layer, further forming a beam having a driving side electrode on a planarized surface of the fluid film, and finally, removing the sacrificial layer. Furthermore, performing the foregoing method planarizes the surface of a driving side electrode, reduces fluctuations in the shape of a beam, and improves the performance and the uniformity of the MEMS device.

公开(公告)号：US06849170B2

公开(公告)日：2005-02-01

申请号：US10353185

申请日：2003-01-27

Applicant: Hubert Jerominek ,  Patrice Topart

Inventor： Hubert Jerominek ,  Patrice Topart

IPC: B81B3/00 ,  C25D1/00 ,  G02B26/08 ,  C25D1/06

CPC classification number: B81C1/00142 ,  B81B2201/042 ,  B81B2201/047 ,  B81C2201/0109 ,  B81C2201/053 ,  C25D1/003 ,  G02B26/0841

Abstract: A process for making a microdevice that includes the steps of providing a base member and selectively electroforming a support member for supporting a microplatform with respect to the base member. The process also includes the steps of selectively electroforming the microplatform and forming a flexible hinge member for hingedly connecting the microplatform to the support member and allowing relative movement of the microplatform with respect to the support member. This microdevice, when compared to prior art devices, can have improved mechanical strength, rigidity, low deformation, and high planarity.

Abstract translation: 一种用于制造微型装置的方法，包括以下步骤：提供基底构件并选择性地电铸相对于基底构件支撑微平台的支撑构件。 该方法还包括以下步骤：选择性地电铸微型平台并形成用于将微平台与支撑构件铰接连接并允许微平台相对于支撑构件相对运动的柔性铰链构件。 该微型装置与现有技术的装置相比可以具有改善的机械强度，刚性，低变形和高平面度。

公开(公告)号：US20050001276A1

公开(公告)日：2005-01-06

申请号：US10613508

申请日：2003-07-03

Applicant: Di Gao ,  Roger Howe ,  Roya Maboudian

Inventor： Di Gao ,  Roger Howe ,  Roya Maboudian

IPC: B81C1/00 ,  H01L21/00 ,  H01L21/04 ,  H01L21/306 ,  H01L21/308 ,  H01L29/82

CPC classification number: H01L21/0475 ,  B81C1/00595 ,  B81C2201/0109 ,  B81C2201/0132

Abstract: A method of etching silicon carbide using a nonmetallic mask layer. The method includes providing a silicon carbide substrate; forming a non-metallic mask layer by applying a layer of material on the substrate; patterning the mask layer to expose underlying areas of the substrate; and etching the underlying areas of the substrate with a plasma at a first rate, while etching the mask layer at a rate lower than the first rate.

Abstract translation: 使用非金属掩模层蚀刻碳化硅的方法。 该方法包括提供碳化硅衬底; 通过在衬底上施加一层材料形成非金属掩模层; 图案化掩模层以暴露衬底的下面的区域; 并以等于第一速率蚀刻衬底的下面的区域，同时以低于第一速率的速率蚀刻掩模层。

公开(公告)号：US06816301B1

公开(公告)日：2004-11-09

申请号：US10019521

申请日：2002-06-06

Applicant: Peter J. Schiller

Inventor： Peter J. Schiller

IPC: G02B2600

CPC classification number: B81B3/0075 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0109

Abstract: Micro-eletromechanical devices, substrate assemblies from which the devices can be manufactured, and methods to manufacture the devices are disclosed. The invention combines the advantages of conventional surface and bulk micromachining processes using a sacrificial layer to create an integrated micro-electromechanical system (MIEMS) technology that provides high performance, high yield, and manufacturing tolerance. The devices manufactured according to the present invention include, but are not limited to, pressure sensors, vibration sensors, accelerometers, gas or liquid pumps, flow sensor, resonant devices, and infrared detectors.

Abstract translation: 公开了微电子机械装置，可从其制造装置的基板组件以及制造装置的方法。 本发明结合了使用牺牲层的常规表面和体微加工工艺的优点，以创建提供高性能，高产量和制造公差的集成微机电系统（MIEMS）技术。 根据本发明制造的装置包括但不限于压力传感器，振动传感器，加速度计，气体或液体泵，流量传感器，谐振装置和红外检测器。