公开(公告)号：US20090162974A1

公开(公告)日：2009-06-25

申请号：US12390708

申请日：2009-02-23

Applicant: Katsumi KIKUCHI ,  Tadanori Shimoto ,  Koji Matsui ,  Kazuhiro Baba

Inventor： Katsumi KIKUCHI ,  Tadanori Shimoto ,  Koji Matsui ,  Kazuhiro Baba

IPC: H01L21/50 ,  C23F1/00

CPC classification number: H01L21/4857 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/81 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/0097 ,  H05K3/06 ,  H05K3/20 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/44 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/0969 ,  H05K2203/0323 ,  H05K2203/0376 ,  H05K2203/061 ,  H05K2203/1536 ,  H01L2924/00

Abstract: A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.

Abstract translation: 用于安装半导体芯片的半导体封装板包括具有用于在其中接收半导体芯片的开口的金属基体和层叠在金属基底上的多层布线膜。 将半导体芯片倒装芯片接合到设置在开口内的多层布线膜上的金属焊盘上。 金属基体的表面与容纳在开口中的半导体芯片的顶表面齐平。 所得的半导体器件在不使用加强件的情况下具有较大数量的外部引脚和较小的变形。

公开(公告)号：US20090152719A1

公开(公告)日：2009-06-18

申请号：US11958842

申请日：2007-12-18

Applicant: Teck Kheng Lee

Inventor： Teck Kheng Lee

IPC: H01L23/488 ,  H01L21/60

CPC classification number: H01L24/14 ,  H01L21/4846 ,  H01L23/481 ,  H01L23/49811 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1012 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13019 ,  H01L2224/13023 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/73103 ,  H01L2224/73204 ,  H01L2224/81136 ,  H01L2224/81138 ,  H01L2224/8114 ,  H01L2224/81193 ,  H01L2224/812 ,  H01L2224/81208 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/20105 ,  H01L2924/20106 ,  H05K3/06 ,  H05K3/325 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2203/0315 ,  H05K2203/0369 ,  H05K2203/1476 ,  H01L2924/00012

Abstract: A method is disclosed which includes forming a layer of conductive material above a substrate, forming a masking layer above the layer of conductive material, performing a first etching process on the layer of conductive material with the masking layer in place, removing the masking layer and, after removing the masking layer, performing an isotropic etching process on the layer of conductive material to thereby define a plurality of piercing bond structures positioned on the substrate.

Abstract translation: 公开了一种方法，其包括在衬底上形成导电材料层，在导电材料层之上形成掩模层，在掩蔽层就位的导电材料层上执行第一蚀刻工艺，去除掩模层和 在去除掩模层之后，对导电材料层进行各向同性蚀刻处理，从而限定位于基板上的多个穿孔接合结构。

公开(公告)号：US20090151160A1

公开(公告)日：2009-06-18

申请号：US12213465

申请日：2008-06-19

Applicant: Shuhichi Okabe ,  Jin-Yong An ,  Seok-Kyu Lee ,  Soon-Oh Jung ,  Jong-Kuk Hong ,  Hae-Nam Seo

Inventor： Shuhichi Okabe ,  Jin-Yong An ,  Seok-Kyu Lee ,  Soon-Oh Jung ,  Jong-Kuk Hong ,  Hae-Nam Seo

IPC: H05K3/10 ,  H05K3/36

CPC classification number: H05K3/4682 ,  H05K3/108 ,  H05K3/205 ,  H05K3/3473 ,  H05K2201/0367 ,  H05K2203/0376 ,  H05K2203/043 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149

Abstract: A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.

Abstract translation: 一种制造具有焊球的印刷电路板的方法。 该方法可以包括：在第一载体的一侧堆叠形成有至少一个孔的第二载体; 通过用导电材料填充孔而形成至少一个焊料凸块; 在所述第二载体上形成与所述焊料凸块电连接的电路图案层; 以及通过去除所述第一载体和所述第二载体来暴露所述焊料凸块。 使用这种方法，可以形成具有细间距的均匀的半球形焊球作为制造过程的一部分，而不必分别附接焊球。 可以在制造过程中使用载体作为支撑体，从而可以防止板的变形。

公开(公告)号：US20090149015A1

公开(公告)日：2009-06-11

申请号：US12368983

申请日：2009-02-10

Applicant: Shyh-Ming Chang

Inventor： Shyh-Ming Chang

IPC: H01L21/768

CPC classification number: H05K3/4007 ,  H01L22/32 ,  H01L24/13 ,  H01L2224/034 ,  H01L2224/0361 ,  H01L2224/0391 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05567 ,  H01L2224/056 ,  H01L2224/11515 ,  H01L2224/13007 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13021 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/13552 ,  H01L2224/13553 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/2919 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/09909 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599

Abstract: A manufacturing method of a contact structure includes first providing a substrate on which a contact pad has already been formed. Afterwards, a polymer bump is formed on the contact pad. Next, a conductive layer is formed on the polymer bump. The conductive layer covers the polymer bump and extends to the outside of the polymer bump. The portion of the conductive layer extending to the outside of the polymer bump serves as a test pad.

Abstract translation: 接触结构的制造方法包括首先提供其上已经形成有接触垫的基板。 之后，在接触垫上形成聚合物凸块。 接着，在聚合物凸块上形成导电层。 导电层覆盖聚合物凸块并延伸到聚合物凸块的外部。 延伸到聚合物凸块外部的导电层的部分用作测试垫。

公开(公告)号：US20090148594A1

公开(公告)日：2009-06-11

申请号：US12228896

申请日：2008-08-15

Applicant: Sean Moran ,  Jinsu Kwon ,  Kimitaka Endo

Inventor： Sean Moran ,  Jinsu Kwon ,  Kimitaka Endo

IPC: B05D5/12

CPC classification number: H05K1/11 ,  H01L21/4853 ,  H01L21/6835 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2203/0384 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49204 ,  H01L2924/00

Abstract: An interconnection element can be formed by plating a metal layer within holes in an essentially non-metallic layer of a mandrel, wherein posts can be plated onto a metal layer exposed within the holes, e.g., a metal layer covering the holes in the non-metallic layer. The tips of the posts can be formed adjacent to ends or bottoms of the blind holes. Terminals can be formed in conductive communication with the conductive posts. The terminals can be connected through a dielectric layer to the conductive posts. At least a portion of the mandrel can then be removed from at least ends of the holes. In this way, the tips of the conductive posts can become raised above a major surface of the interconnection element such that at least the tips of the posts project beyond the major surface.

Abstract translation: 互连元件可以通过在心轴的基本非金属层中的孔内镀覆金属层而形成，其中柱可以电镀在露出在孔内的金属层上，例如覆盖非金属层中的孔的金属层， 金属层。 柱的尖端可以形成在盲孔的端部或底部附近。 端子可以形成为与导电柱导电连通。 端子可以通过电介质层连接到导电柱。 然后可以从孔的至少一端移除芯棒的至少一部分。 以这种方式，导电柱的尖端可以在互连元件的主表面上方升高，使得至少顶部的柱突出超过主表面。

公开(公告)号：US20090145645A1

公开(公告)日：2009-06-11

申请号：US12228890

申请日：2008-08-15

Applicant: Jinsu Kwon ,  Kimitaka Endo ,  Sean Moran

Inventor： Jinsu Kwon ,  Kimitaka Endo ,  Sean Moran

IPC: H05K7/00 ,  H05K1/11 ,  G01R3/00 ,  H05K3/00

CPC classification number: H05K1/11 ,  H01L21/4853 ,  H01L21/6835 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2203/0384 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49204 ,  H01L2924/00

Abstract: An interconnection element is provided for conductive interconnection with another element having at least one of microelectronic devices or wiring thereon. The interconnection element includes a dielectric element having a major surface. A plated metal layer including a plurality of exposed metal posts can project outwardly beyond the major surface of the dielectric element. Some of the metal posts can be electrically insulated from each other by the dielectric element. The interconnection element typically includes a plurality of terminals in conductive communication with the metal posts. The terminals can be connected through the dielectric element to the metal posts. The posts may be defined by plating a metal onto exposed co-planar surfaces of a mandrel and interior surfaces of openings in a mandrel, after which the mandrel can be removed.

Abstract translation: 提供互连元件用于与具有微电子器件或其上的布线中的至少一个的另一元件的导电互连。 互连元件包括具有主表面的电介质元件。 包括多个暴露的金属柱的电镀金属层可以向外突出超过介电元件的主表面。 一些金属柱可以通过电介质元件彼此电绝缘。 互连元件通常包括与金属柱导电连通的多个端子。 端子可以通过电介质元件连接到金属柱。 可以通过将金属镀在芯棒的暴露的共平面表面和心轴中的开口的内表面上来定义柱，然后可以去除心轴。

公开(公告)号：US07544897B2

公开(公告)日：2009-06-09

申请号：US11194391

申请日：2005-08-01

Applicant: Tomonaga Kobayashi

Inventor： Tomonaga Kobayashi

IPC: H05K1/00

CPC classification number: G02F1/13452 ,  H01L2924/0002 ,  H05K3/361 ,  H05K3/363 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/0715 ,  H05K2201/0919 ,  H05K2201/09481 ,  H05K2201/09845 ,  H01L2924/00

Abstract: A connecting substrate includes a first conductive member; an insulating layer; and a second conductive member, the first conductive member and the second conductive member facing each other via the insulating layer, in which wherein an end portion of either one of the first conductive member and the second conductive member extends past an end portion of the other conductive member and past an end portion of the insulating layer.

Abstract translation: 连接基板包括第一导电部件; 绝缘层; 以及第二导电构件，所述第一导电构件和所述第二导电构件经由所述绝缘层彼此面对，其中所述第一导电构件和所述第二导电构件中的任一个的端部延伸超过所述另一导电构件的端部 导电构件并经过绝缘层的端部。

公开(公告)号：US20090119916A1

公开(公告)日：2009-05-14

申请号：US12208581

申请日：2008-09-11

Applicant: Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

Inventor： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC: H01R43/20

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A method of producing a module arrangement which includes a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

Abstract translation: 一种制造模块装置的方法，其包括包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入器。 插入件在横截面中具有半环形结构，并由介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入器的表面布置并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机

公开(公告)号：US20090115054A1

公开(公告)日：2009-05-07

申请号：US12207565

申请日：2008-09-10

Applicant: Nobuaki Hashimoto

Inventor： Nobuaki Hashimoto

IPC: H01L23/48

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05684 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13008 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/13624 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2224/13684 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K3/325 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/10674 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2224/05099

Abstract: An electronic component includes: an active surface; a plurality of external connection terminals included in the active surface; a bump electrode disposed to the active surface, the bump electrode including: an internal resin formed on the active surface as a core; and a conductive film on a surface of the internal resin, the internal resin being formed in a nearly half-cylindrical shape having a transverse section of one of a nearly semicircular shape, a nearly semielliptical shape, and a nearly trapezoidal shape and extending orthogonal to the transverse section, the transverse section being orthogonal to the active surface; and a global wiring line disposed on the active surface and connecting between the plurality of external connection terminals, and at least one of the external connection terminals being electrically connected to the conductive film.

Abstract translation: 电子部件包括：活性表面; 多个外部连接端子包括在有源表面中; 凸起电极，设置在所述活性表面上，所述凸块电极包括：形成在作为芯的所述有源表面上的内部树脂; 以及在内部树脂的表面上的导电膜，内部树脂形成为具有近似半圆形，近半椭圆形和近似梯形形状的横截面的近半圆形形状，并且延伸正交于 横截面，横截面与活动表面正交; 以及设置在所述有源表面上并连接在所述多个外部连接端子之间的全局布线，并且所述外部连接端子中的至少一个电连接到所述导电膜。

公开(公告)号：US07514802B2

公开(公告)日：2009-04-07

申请号：US11531381

申请日：2006-09-13

Applicant: Michinari Tetani ,  Takayuki Tanaka ,  Hiroyuki Imamura ,  Nozomi Shimoishizaka ,  Kouichi Nagao

Inventor： Michinari Tetani ,  Takayuki Tanaka ,  Hiroyuki Imamura ,  Nozomi Shimoishizaka ,  Kouichi Nagao

IPC: H01L23/544

CPC classification number: H01L23/544 ,  H01L23/4985 ,  H01L24/81 ,  H01L2223/5442 ,  H01L2223/54473 ,  H01L2224/81121 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K1/0269 ,  H05K1/0393 ,  H05K3/0097 ,  H05K3/303 ,  H05K2201/0367 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2201/10674 ,  H05K2203/1545 ,  H05K2203/166

Abstract: A flexible insulating base, a plurality of conductor wirings aligned on the flexible insulating base, and bump electrodes provided respectively in end portions of the plurality of conductor wirings in a region where a semiconductor chip is to be placed are provided. The semiconductor chip is mounted on the conductor wirings by bonding electrode pads formed on the semiconductor chip to the bump electrodes. An auxiliary conductor wiring formed similarly to the conductor wirings is provided on the insulating base, and an auxiliary bump electrode formed similarly to the bump electrodes is provided on the auxiliary conductor wiring, so that the electrode pads formed on the semiconductor chip can be registered with respect to the bump electrodes on the conductor wirings by positioning the semiconductor chip with reference to the auxiliary bump electrode. It is possible to configure a wiring board having register marks capable of positioning electrode pads of a semiconductor chip with respect to bump electrodes with high accuracy.

Abstract translation: 提供柔性绝缘基座，在柔性绝缘基座上对准的多个导体布线和分别设置在要放置半导体芯片的区域中的多个导体布线的端部中的凸起电极。 通过将形成在半导体芯片上的电极焊盘接合到凸块电极，将半导体芯片安装在导体布线上。 在导体布线上形成类似于导体布线的辅助导体布线设置在绝缘基底上，并且在辅助导体布线上设置类似于隆起电极形成的辅助凸起电极，使得形成在半导体芯片上的电极焊盘可以被注册 通过相对于辅助凸起电极定位半导体芯片，相对于导体布线上的凸块电极。 可以配置具有能够高精度地相对于凸块电极定位半导体芯片的电极焊盘的对准标记的布线板。