公开(公告)号：US6097277A

公开(公告)日：2000-08-01

申请号：US186453

申请日：1998-11-05

Applicant: Steven N. Ginn ,  James N. Hufford ,  John Zdanys, Jr. ,  Stephen W. Burry ,  Lewis L. Seffernick ,  Robert M. VandenBoom

Inventor： Steven N. Ginn ,  James N. Hufford ,  John Zdanys, Jr. ,  Stephen W. Burry ,  Lewis L. Seffernick ,  Robert M. VandenBoom

IPC: H01C1/01 ,  H01C1/16 ,  H01L23/498 ,  H05K1/16 ,  H05K3/34

CPC classification number: H05K3/3436 ,  H01C1/01 ,  H01C1/16 ,  H01L23/49816 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/167 ,  H05K2201/09745 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/613

Abstract: A resistor network has a substrate with top and side surfaces. Resistors are located on the side surfaces. Several side conductors are located on the side surface and are electrically connected to the resistors. Several top conductors are located on the top surface and are electrically connected to the side conductors. Each top conductor has a cavity. A solder sphere is partially located in the cavity and is electrically and mechanically connected to the top conductor by reflowed solder paste. A cover coat covers the side conductors and the resistors. The resistor network provides a high density of resistors per unit area.

Abstract translation: 电阻网络具有具有顶表面和侧表面的基底。 电阻器位于侧面。 多个侧导体位于侧表面并且电连接到电阻器。 几个顶部导体位于顶表面上并且电连接到侧导体。 每个顶部导体都有一个空腔。 焊球部分地位于空腔中，并通过回流焊膏与顶部导体电连接和机械连接。 覆盖层覆盖侧导体和电阻器。 电阻网络提供每单位面积的高密度电阻。

公开(公告)号：US6002172A

公开(公告)日：1999-12-14

申请号：US815238

申请日：1997-03-12

Applicant: Kishor V. Desai ,  Amit K. Sarkhel

Inventor： Kishor V. Desai ,  Amit K. Sarkhel

IPC: H01L21/60 ,  H01L23/485 ,  H05K1/11 ,  H05K3/34 ,  H01L21/66 ,  H01L29/34

CPC classification number: H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H05K1/111 ,  H05K3/3436 ,  H01L2224/13 ,  H01L2224/13006 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/112 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2201/09745 ,  H05K2201/10734 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/611 ,  Y02P70/613

Abstract: An adhesion pad for adhering a semiconductor chip or a ball grid array module to a supporting substrate includes a stepped or tapered structure. The structure is composed of at least one solder wettable metal or alloy layer having solder deposited thereon. The stepped or tapered structure prevents a fatigue crack from propagating in the X-Y plane above the adhesion pad.

Abstract translation: 用于将半导体芯片或球栅阵列模块粘附到支撑基板上的粘合垫包括阶梯形或锥形结构。 该结构由至少一个焊料可湿性金属或其上沉积有焊料的合金层组成。 台阶或锥形结构防止疲劳裂纹在粘合垫上方的X-Y平面中传播。

公开(公告)号：US5903056A

公开(公告)日：1999-05-11

申请号：US845111

申请日：1997-04-21

Applicant: Everett Joseph Canning ,  Ranjan Dutta

Inventor： Everett Joseph Canning ,  Ranjan Dutta

IPC: H01L21/60 ,  H05K3/32 ,  H05K3/34 ,  H01L23/48

CPC classification number: H01L24/32 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H05K3/323 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H05K2201/09745 ,  H05K2201/09909 ,  H05K2201/10674 ,  H05K3/3452

Abstract: The specification describes a thermocompression bonding process using anisotropic conductive film (ACF) bonding material in which the bonding pads are shaped to prevent depletion of conductive particles in the bonding region during compression. The process is useful in bump technology for interconnecting component assemblies on substrates such as glass, printed wiring boards, etc. The shaped structure can be made using photodefinable polymer strips around the bonding pads where the strips are thicker than the bonding pad. Alternative approaches to shaping one or both of the mating conductive surfaces are disclosed.

Abstract translation: 该说明书描述了使用各向异性导电膜（ACF）接合材料的热压接合工艺，其中焊盘被成形以防止压缩期间接合区域中的导电颗粒的耗尽。 该方法在用于将诸如玻璃，印刷线路板等的基板上的部件组件互连的凸起技术中是有用的。可以使用围绕粘合垫的光可固化聚合物条制造成形结构，其中条带比粘合垫更厚。 公开了形成一个或两个配合导电表面的替代方法。

公开(公告)号：US5872399A

公开(公告)日：1999-02-16

申请号：US825945

申请日：1997-04-01

Applicant: Moo Eung Lee

Inventor： Moo Eung Lee

IPC: H01L23/12 ,  H01L21/60 ,  H01L23/498 ,  H01L23/50 ,  H05K1/11 ,  H05K3/34 ,  H05K3/40 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/49816 ,  H05K1/111 ,  H05K3/3436 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H05K2201/09381 ,  H05K2201/0969 ,  H05K2201/09745 ,  H05K2201/0989 ,  H05K2201/10734 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4007 ,  Y02P70/611 ,  Y02P70/613

Abstract: A solder ball land metal structure of a ball grid array semiconductor package capable of obtaining a maximum contact area between a solder ball land metal element and a solder ball fused on the land metal element. A solder mask defined type land metal structure according to the present invention has a single etching hole at the central portion thereof or a plurality of etching holes at the outer portion thereof in order to obtain an increased contact area for a solder ball. Each etching hole extends from the upper surface of the land metal element to the upper surface of the BT substrate throughout the land metal element or extends from the upper surface of the land metal element to a depth corresponding to about half the thickness of the land metal element. Each etching hole serves as a locking hole for fixing the fused solder ball. Thus, it is effectively prevent the solder ball from being separated from the land metal element. A non-solder mask defined type land metal structure according to the present invention has a plurality of tooth-shaped radial extensions provided at a land metal element having a conventional structure. The extension are interposed between a BT substrate and a solder mask. By such a configuration, it is effectively prevent the solder ball and land metal element from being separated from the BT substrate.

Abstract translation: 一种球栅阵列半导体封装的焊球焊盘金属结构，其能够获得焊球焊接金属元件和焊接在焊盘金属元件上的焊球之间的最大接触面积。 根据本发明的焊接掩模限定型焊盘金属结构在其中心部分具有单个蚀刻孔或其外部具有多个蚀刻孔，以便获得焊球的增加的接触面积。 每个蚀刻孔从焊盘金属元件的上表面延伸到整个焊盘金属元件的BT基板的上表面，或者从焊盘金属元件的上表面延伸到对应于焊盘金属的厚度的大约一半的深度 元件。 每个蚀刻孔用作用于固定熔融焊球的锁定孔。 因此，有效地防止焊球与焊盘金属元件分离。 根据本发明的非焊锡掩模限定型的焊盘金属结构具有设置在具有常规结构的焊盘金属元件处的多个齿形径向延伸部。 延伸部插入在BT基板和焊接掩模之间。 通过这样的结构，能够有效地防止焊料球和焊盘金属元件与BT基板分离。

公开(公告)号：US5849396A

公开(公告)日：1998-12-15

申请号：US527665

申请日：1995-09-13

Applicant: Mir Akbar Ali ,  Carl W. Peterson ,  Harry C. Jones

Inventor： Mir Akbar Ali ,  Carl W. Peterson ,  Harry C. Jones

IPC: H01L21/48 ,  H01L23/498 ,  H05K1/00 ,  H05K1/16 ,  H05K3/42 ,  B32B3/00 ,  B32B15/08 ,  B32B18/00

CPC classification number: H01L23/49888 ,  H01L21/4857 ,  H05K3/4676 ,  H01L2924/0002 ,  H05K1/162 ,  H05K2201/0154 ,  H05K2201/0209 ,  H05K2201/086 ,  H05K2201/09745 ,  H05K3/0061 ,  H05K3/429 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/252 ,  Y10T428/254 ,  Y10T428/266 ,  Y10T428/31681 ,  Y10T428/31721

Abstract: An electronic structure is formed of alternating layers of a metal and a cured ceramic-polymer mixture. The ceramic-polymer mixture is prepared by mixing small ceramic particles into a flowable, curable polymer. The mixture is spread over a first metallic layer and, optionally, B-stage cured. Additional metallic layers and ceramic-polymer layers are added in alternating fashion. Metallic interconnects may be provided through overlying ceramic-polymer layers to a particular metallic layer. The resulting structure is heated to a moderate temperature to cure the polymer.

Abstract translation: 电子结构由金属和固化的陶瓷 - 聚合物混合物的交替层形成。 通过将小陶瓷颗粒混合到可流动的可固化聚合物中来制备陶瓷 - 聚合物混合物。 将混合物分散在第一金属层上，并且任选地B阶固化。 另外的金属层和陶瓷聚合物层以交替方式加入。 金属互连可以通过覆盖陶瓷聚合物层提供到特定的金属层。 将所得结构加热至中等温度以固化聚合物。

公开(公告)号：US5767580A

公开(公告)日：1998-06-16

申请号：US573892

申请日：1995-12-18

Applicant: Michael D. Rostoker

Inventor： Michael D. Rostoker

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/498 ,  H05K1/11 ,  H05K3/34 ,  H05K3/40 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/49811 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H05K1/111 ,  H05K3/3436 ,  H05K3/4007 ,  H01L2221/68313 ,  H01L2224/13099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/81136 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K2201/09745 ,  H05K2201/10242 ,  H05K2201/10992 ,  H05K2203/048 ,  H05K3/4015 ,  Y02P70/611 ,  Y02P70/613

Abstract: A digital system utilizing at least one semiconductor integrated circuit die having positive mechanical alignment is provided between substrates using micro-bump contacts by forming "detented" conductive bump contacts on one substrate having a concave end which receive and align the generally convex contour of bump contacts on the other substrate. Various configurations of concavities and convexities are described. Flux may be disposed in the concave end of the detented bump contact to promote formation of joints between the concave and convex bump contacts. Both bump contacts may be formed of reflowable material, such as solder, or one or the other of the contacts may be formed of a non-reflowable material which may also function as a standoff between the two substrates. Each substrate is provided with a plurality of bump contacts, and one substrate may be provided with a combination of convex and concave bump contacts corresponding to concave and convex bump contacts on the other substrate. The inventive technique is useful for joining die-to-die, die-to-substrate, or package-to-substrate in a digital system.

Abstract translation: 在具有正机械对准的至少一个半导体集成电路芯片的数字系统之间使用微凸块触点，通过在一个具有凹端的衬底上形成“定位”的导电凸块触点，在衬底之间提供接触并对齐凸起触点的大致凸形轮廓 在另一个基板上。 描述各种凹凸的构造。 通量可以设置在止动凸起接触的凹入端中，以促进凹凸凸点触点之间的接合部的形成。 两个凸起触点可以由可回流材料（例如焊料）形成，或者一个或另一个触点可以由不可回流的材料形成，其也可以用作两个基板之间的间隙。 每个基板设置有多个凸块触点，并且一个基板可以设置有与另一个基板上的凹凸凸点接触对应的凸凸触点的组合。 本发明的技术对于在数字系统中连接管芯到管芯，管芯到衬底或封装到衬底是有用的。

公开(公告)号：US5736790A

公开(公告)日：1998-04-07

申请号：US710769

申请日：1996-09-20

Applicant: Kiyoshi Iyogi ,  Kaoru Koiwa ,  Keiichi Yano ,  Hironori Asai

Inventor： Kiyoshi Iyogi ,  Kaoru Koiwa ,  Keiichi Yano ,  Hironori Asai

IPC: H01L23/485 ,  H05K1/11 ,  H05K3/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/10 ,  H01L24/13 ,  H05K1/111 ,  H05K3/3436 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/181 ,  H05K2201/0212 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/09745 ,  H05K2201/10234 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/611 ,  Y02P70/613

Abstract: Disclosed is a bump formed on a pad which is provided on either a semiconductor chip or a package or a wiring substrate for input or output thereof, for making electric connection on the pad. The bump has: a projection projecting from the pad; a ball having conductivity and located above the pad; and a conductive bonding material for bonding the pad for and the ball, wherein creep strength of the ball is larger than strength of the conductive bonding material. With another conductive bonding material provided on the other pad of a wiring substrate or a package, the ball of the bump of the semiconductor chip or the package is placed close to another pad of the wiring substrate or package. The conductive bonding material of the other pad is heated and melted to connect the ball and the other pad of the wiring substrate or package by the conductive bonding material.

Abstract translation: 公开了一种形成在焊盘上的凸块，其设置在半导体芯片或封装或其输入或输出的布线基板上，用于在焊盘上进行电连接。 凸起具有：从该垫突出的突起; 具有导电性并位于垫上方的球; 以及用于接合焊盘和球的导电接合材料，其中球的蠕变强度大于导电接合材料的强度。 通过设置在布线基板或封装的另一个焊盘上的另一个导电接合材料，将半导体芯片或封装的凸块的球放置成靠近布线基板或封装的另一个焊盘。 另一个焊盘的导电接合材料被加热熔化，以通过导电接合材料将接线衬底或封装的球和另一焊盘连接起来。

公开(公告)号：US5638597A

公开(公告)日：1997-06-17

申请号：US476759

申请日：1995-06-07

Applicant: Lawrence R. Cutting ,  Michael A. Gaynes ,  Eric A. Johnson ,  Cynthia S. Milkovich ,  Jeffrey S. Perkins ,  Mark V. Pierson ,  Steven E. Poetzinger ,  Jerzy Zalesinski

Inventor： Lawrence R. Cutting ,  Michael A. Gaynes ,  Eric A. Johnson ,  Cynthia S. Milkovich ,  Jeffrey S. Perkins ,  Mark V. Pierson ,  Steven E. Poetzinger ,  Jerzy Zalesinski

IPC: H01L21/48 ,  H01L23/367 ,  H01L23/538 ,  H05K1/00 ,  H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/12 ,  H05K3/34 ,  H05K7/20 ,  H05K3/36

CPC classification number: H05K7/20454 ,  H01L21/4857 ,  H01L21/4867 ,  H01L23/3672 ,  H01L23/5387 ,  H05K1/021 ,  H05K1/189 ,  H05K3/0061 ,  H05K3/1216 ,  H05K3/4691 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01322 ,  H05K1/0298 ,  H05K1/182 ,  H05K2201/0154 ,  H05K2201/09063 ,  H05K2201/096 ,  H05K2201/09745 ,  H05K2201/1056 ,  H05K2201/2009 ,  H05K2203/1394 ,  H05K3/3415 ,  H05K3/3452 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: A multi-layer flexible circuit board has multiple thicker regions to which components are mounted and thinner, more flexible regions with fewer wiring layers through which the board can be bent about a line without bending thicker regions. Surface mount components such as QFP's and flip-chips are mounted on the front side, and surface mount and pin-in-hole components are mounted on the back side of the circuit board at the thick regions. Heat spreaders are laminated to the back sides of thicker regions. The thicker regions have windows in which wire bond chips are mounted on the heat spreader and wire bonded to the front side of the board. A thermally conductive adhesive or grease connects between the tops of the back side components and the bottoms of the cavities. The heat sinks are bolted together and/or to an enclosure frame to improve thermal performance.

Abstract translation: 多层柔性电路板具有多个较厚的区域，组件安装在该较厚的区域上，较薄的，更柔性的区域具有较少的布线层，板可围绕线弯曲，而不会弯曲较厚的区域。 表面安装部件如QFP和倒装芯片安装在前侧，表面安装和销孔组件安装在电路板的背面，在较厚的区域。 散热器层压到较厚区域的背面。 较厚的区域具有窗口，其中引线接合芯片安装在散热器上，并且引线键合到板的前侧。 导热粘合剂或油脂连接在后侧部件的顶部和空腔的底部之间。 散热器螺栓连接在一起和/或连接到外壳框架以改善热性能。

公开(公告)号：US5455393A

公开(公告)日：1995-10-03

申请号：US159234

申请日：1993-11-30

Applicant: Tutomu Ohshima ,  Hidebumi Ohnuki ,  Ryo Maniwa

Inventor： Tutomu Ohshima ,  Hidebumi Ohnuki ,  Ryo Maniwa

IPC: H05K3/34 ,  H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/46 ,  H05K1/00

CPC classification number: H05K1/0221 ,  H05K1/112 ,  H05K3/465 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09745 ,  H05K2203/0733 ,  H05K3/0023 ,  H05K3/3468 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A multilayered printed wiring board includes a plurality of inner layer circuits, ground layers, first insulating layers, a second insulating layer, a surface layer circuit, and a parts mounting pad. The inner layer circuits are arranged parallel to each other in a flat manner in at least one inner layer. The ground layers are formed on and under the inner layer circuits to sandwich the inner layer circuits. The first insulating layers are respectively formed between the ground layers and the inner layer circuits to insulate the inner layer circuits from each other and the inner layer circuits from the ground layers. The second insulating layer is formed at least on an uppermost one of the ground layers and serving as a surface layer. The surface layer circuit is selectively formed on the second insulating layer. The parts mounting pad is formed at a predetermined region on the second insulating layer, has a recessed portion for fitting a lead portion of a mounting part therein, and is connected to the surface layer circuit. A method of manufacturing this printed wiring board is also disclosed.

Abstract translation: 多层印刷电路板包括多个内层电路，接地层，第一绝缘层，第二绝缘层，表面层电路和部件安装焊盘。 内层电路在至少一个内层中以平坦的方式彼此平行地布置。 接地层形成在内层电路之上和之下，以夹住内层电路。 第一绝缘层分别形成在接地层和内层电路之间，以使内层电路彼此隔离，内层电路与接地层绝缘。 第二绝缘层至少形成在最上层的一层接地层中并用作表面层。 表层电路选择性地形成在第二绝缘层上。 零件安装垫形成在第二绝缘层上的预定区域，具有用于将安装部件的引线部分嵌入其中的凹部，并连接到表面层电路。 还公开了制造该印刷线路板的方法。

公开(公告)号：US5452182A

公开(公告)日：1995-09-19

申请号：US865786

申请日：1992-04-07

Applicant: Charles W. Eichelberger ,  William P. Kornrumpf ,  Robert J. Wojnarowski

Inventor： Charles W. Eichelberger ,  William P. Kornrumpf ,  Robert J. Wojnarowski

IPC: H01L23/52 ,  H01L21/00 ,  H01L21/68 ,  H01L23/538 ,  H01L25/04 ,  H01L25/065 ,  H01L25/18 ,  H05K1/02 ,  H05K1/05 ,  H05K1/14 ,  H05K1/18 ,  H05K3/00 ,  H05K1/11

CPC classification number: H05K1/189 ,  H01L21/67144 ,  H01L21/6835 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0655 ,  H01L2221/68313 ,  H01L2224/24227 ,  H01L2224/7665 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H05K1/05 ,  H05K2201/051 ,  H05K2201/09745 ,  H05K2201/2009 ,  H05K2203/0264 ,  H05K3/0058

Abstract: A flexible high density interconnect structure is provided by extending the high density interconnect structure beyond the solid substrate containing the chips interconnected thereby. During fabrication, the flexible portion of the high density interconnect structure is supported by a temporary interconnect support to facilitate fabrication of the structure in accordance with existing fabrication techniques. Subsequently, that temporary support structure may be removed or may remain in place if it sufficiently flexible to impart the desired degree of flexibility to that portion of the high density interconnect structure. Methods of fabrication are also disclosed.

Abstract translation: 通过将高密度互连结构延伸超过含有由此相互连接的芯片的固体基板而提供灵活的高密度互连结构。 在制造期间，高密度互连结构的柔性部分由临时互连支撑支撑，以便于根据现有制造技术制造结构。 随后，如果临时支撑结构足够柔软以赋予该高密度互连结构部分所需的柔性程度，那么该临时支撑结构可被移除或保持在适当位置。 还公开了制造方法。