公开(公告)号：US5867367A

公开(公告)日：1999-02-02

申请号：US984766

申请日：1997-12-04

Applicant: Michael Barrow

Inventor： Michael Barrow

IPC: H01L23/495 ,  H01L25/10 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K1/181 ,  H01L23/49568 ,  H01L25/105 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/181 ,  H05K1/0203 ,  H05K2201/10446 ,  H05K2201/10545 ,  H05K2201/10689 ,  Y02P70/611

Abstract: A quad flat pack (QFP) integrated circuit package that is modified to include a tab that increases the thermal efficiency of the package. The package contains an integrated circuit that is mounted to a die paddle of a lead frame. A plurality of leads extend from a first side of the die paddle. Placing all of the leads on one side of the package minimizes the difference in signal length between the leads. The tab extends from a second side of the die paddle. Both the leads and the tab extend from a plastic housing which encapsulates the integrated circuit. The tab provides a large conductive area which increases the heat transfer rate from the integrated circuit to the ambient, or an external thermal element.

公开(公告)号：US5502621A

公开(公告)日：1996-03-26

申请号：US221144

申请日：1994-03-31

Applicant: Daniel L. Schumacher ,  John Wood

Inventor： Daniel L. Schumacher ,  John Wood

IPC: G06F15/78 ,  G06F17/50 ,  H01L21/822 ,  H01L23/50 ,  H01L25/10 ,  H01L27/04 ,  H05K1/18 ,  H05K7/02

CPC classification number: H05K1/181 ,  H01L23/50 ,  H01L25/105 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H05K2201/09227 ,  H05K2201/09263 ,  H05K2201/10522 ,  H05K2201/10545 ,  H05K2201/10689 ,  Y02P70/611

Abstract: The invention provides for increased IC density on circuit boards having at least one IC mounted on each side of a two sided PC or SMT board by utilizing one or more IC's having pin assignments arranged as a mirror image of each other along a centerline through the IC package in the X or Y axis, such that one or more IC's having the same set of mirror image pin assignments mounted on each side of a circuit board and rotated 180 degrees in relationship to each other will ensure that the pin assignments of the same type will be directly opposite each other and separated by the circuit board.

Abstract translation: 本发明提供电路板上的IC密度增加，其具有安装在双面PC或SMT板的每一侧上的至少一个IC，利用一个或多个IC，其中引脚分配沿着中心线布置成彼此的镜像，通过IC 封装在X或Y轴上，使得一个或多个IC具有安装在电路板的每一侧并且彼此相对旋转180度的相同组的镜像映射引脚分配将确保相同类型的引脚分配 将彼此直接相对并由电路板隔开。

公开(公告)号：US5137205A

公开(公告)日：1992-08-11

申请号：US658436

申请日：1991-02-20

Applicant: Akio Inohara ,  Yuji Ohno ,  Kiyoshi Sawae ,  Yoshiharu Kanatani ,  Hisashi Uede ,  Takeo Fujimoto

Inventor： Akio Inohara ,  Yuji Ohno ,  Kiyoshi Sawae ,  Yoshiharu Kanatani ,  Hisashi Uede ,  Takeo Fujimoto

IPC: G09G3/30 ,  H05K1/00 ,  H05K1/18

CPC classification number: H05K1/181 ,  G09G3/30 ,  H01L2224/48091 ,  H01L2224/48247 ,  H05K1/0289 ,  H05K2201/10545 ,  H05K2201/10689 ,  Y02P70/611

Abstract: A wiring circuit substrate comprises first circuit element means one one side of the substrate connected to electrode lines of X-Y matrix electrodes, respectively, and second circuit element means in the symmetrical position of the first circuit element means on the other side of the substrate connected to the electrode lines of the X-Y matrix electrodes, respectively, wherein each of leads of the first and the second circuit element means is connected to the output and input lines of the X-Y matrix electrodes via through holes, respectively.The first circuit element comprises integrated transisitors for driving the X-Y matrix electrodes. The second circuit element comprises integrated diodes for protecting an overcurrent in the X-Y matrix electrodes.

Abstract translation: 布线电路基板包括分别与XY矩阵电极的电极线连接的基板的一侧的第一电路元件装置和位于基板的另一侧的第一电路元件装置的对称位置的第二电路元件装置， 分别为XY矩阵电极的电极线，其中第一和第二电路元件装置的每个引线分别通过通孔连接到XY矩阵电极的输出和输入线。 第一电路元件包括用于驱动X-Y矩阵电极的集成电路。 第二电路元件包括用于保护X-Y基体电极中的过电流的集成二极管。

公开(公告)号：US5079672A

公开(公告)日：1992-01-07

申请号：US427859

申请日：1989-10-13

Applicant: Georg Haubner ,  Hartmut Zobl

Inventor： Georg Haubner ,  Hartmut Zobl

IPC: H01R12/71 ,  H01L25/16 ,  H05K1/02 ,  H05K5/00 ,  H05K7/20

CPC classification number: H05K5/0082 ,  H01L25/16 ,  H05K1/0203 ,  H01L2924/0002 ,  H05K2201/10189 ,  H05K2201/10386 ,  H05K2201/10446 ,  H05K2201/10545 ,  H05K2201/10659 ,  H05K2201/10689

Abstract: An electrical switching and control device comprising a plurality of heat-emitting electronic components arranged on a hybrid plate, and a plurality of plug-in contacts having surface areas contacting a surface area of the hybrid plate for dissipating heat from the electronic components, and end portions directly connected with connection elements of the hybrid plate.

Abstract translation: PCT No.PCT / DE88 / 00128 Sec。 371日期：1989年10月13日 102（e）日期1989年10月13日PCT提交1988年3月9日PCT公布。 第WO88 / 09058号公报 日期：1988年11月17日。一种电气开关和控制装置，包括布置在混合板上的多个发热电子部件和多个插入式触点，其具有与混合板的表面区域接触以散热的表面区域 从电子部件和与混合板的连接元件直接连接的端部。

公开(公告)号：US4357647A

公开(公告)日：1982-11-02

申请号：US202610

申请日：1980-10-31

Applicant: Hans Hadersbeck ,  Hubert Zukier

Inventor： Hans Hadersbeck ,  Hubert Zukier

IPC: H05K1/18 ,  H05K3/34 ,  H05K13/04

CPC classification number: H05K13/04 ,  H05K3/3415 ,  H05K3/3442 ,  H05K2201/09181 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/10045 ,  H05K2201/10446 ,  H05K2201/1053 ,  H05K2201/10545 ,  H05K2201/10651 ,  H05K2203/0455 ,  H05K2203/1572 ,  H05K3/3447 ,  H05K3/3468 ,  Y02P70/613

Abstract: A printed circuit board has temperature-stable electric components, such as resistance networks, disposed on the soldering side of the circuit board. The components mounted on the soldering side of the board are mounted as a unit containing the network, which unit has a recess which partially surrounds the solder connection location of the circuit board, at which point the unitary component is electrically and mechanically connected to the board. The recesses are beveled to facilitate solder flow, and cover approximately half of the connection location of the circuit board.

Abstract translation: 印刷电路板具有设置在电路板的焊接侧的诸如电阻网络的温度稳定的电气部件。 安装在板的焊接侧的部件被安装为包含网络的单元，该单元具有部分地围绕电路板的焊接连接位置的凹部，在该点处，整体部件电连接和机械地连接到板 。 凹槽被倒角以便于焊料流动，并且覆盖电路板的大约一半的连接位置。

公开(公告)号：US20240260195A1

公开(公告)日：2024-08-01

申请号：US18419573

申请日：2024-01-23

Applicant: WALTON ADVANCED ENGINEERING, INC.

Inventor： HONG-CHI YU ,  CHUN-JUNG LIN ,  RUEI-TING GU

IPC: H05K1/18 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065 ,  H05K1/11 ,  H10B80/00

CPC classification number: H05K1/181 ,  H01L25/0655 ,  H01L25/50 ,  H01L23/3121 ,  H01L24/16 ,  H01L2224/16225 ,  H05K1/117 ,  H05K2201/10159 ,  H05K2201/10545 ,  H10B80/00

Abstract: An embedded dual in-line memory module (DIMM) is provided. The memory module includes a printed circuit board (PCB), a first memory chip set, and a second memory chip set. A plurality of memory chips of the first memory chip set is arranged and electrically connected to a first circuit layer of the PCB by flip chip. A plurality of memory chips of the second memory chip set is arranged and electrically connected to a second circuit layer of the PCB by flip chip. The respective chips are directly disposed on the PCB by flip chip. Thereby the memory module has a condition that there is no metal wire for electrical connection generated by wire bonding. This helps cost reduction at manufacturing end and improves electrical performance.

公开(公告)号：US20240243496A1

公开(公告)日：2024-07-18

申请号：US18154658

申请日：2023-01-13

Applicant: CIENA CORPORATION

Inventor： Russell Mays

IPC: H01R12/57 ,  H01R25/00 ,  H01R43/02 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18

CPC classification number: H01R12/57 ,  H01R25/006 ,  H01R43/0256 ,  H05K1/0228 ,  H05K1/113 ,  H05K1/181 ,  H05K2201/09227 ,  H05K2201/09409 ,  H05K2201/09481 ,  H05K2201/09609 ,  H05K2201/10189 ,  H05K2201/10545

Abstract: Aspects of the subject disclosure may include, for example, a device including a connector having a connector body and one or more rows of pins, where the connector facilitates a pluggable connection to an electrical cable or pluggable transceiver, where at least one of the one or more rows of pins includes a first group of the pins extending in a first direction and a second group of the pins extending in a second, different direction. The device includes a host board having vias, where at least a portion of the first and second groups of pins are connected with a portion of the vias by way of solder joints. Other embodiments are disclosed.

公开(公告)号：US20240237188A9

公开(公告)日：2024-07-11

申请号：US18483870

申请日：2023-10-10

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yoshihito OTSUBO

IPC: H05K1/02 ,  H01L23/367 ,  H01L25/10 ,  H01L25/16 ,  H05K1/14 ,  H05K1/18

CPC classification number: H05K1/0203 ,  H01L23/3675 ,  H01L25/105 ,  H01L25/162 ,  H05K1/144 ,  H05K1/181 ,  H01L2225/1094 ,  H05K2201/042 ,  H05K2201/10015 ,  H05K2201/1003 ,  H05K2201/10522 ,  H05K2201/10545 ,  H05K2201/1056

Abstract: A first sealing resin is disposed between a first lower main surface and a second upper main surface. An upper circuit board first mounting electrode is disposed on the first lower main surface. A lower circuit board first mounting electrode is disposed on the second upper main surface. A first component is mounted on the lower circuit board first mounting electrode and is disposed in the first sealing resin. A first conductor layer is disposed on an upper circuit board. As viewed in the downward direction, a heat conduction member overlaps the first component, is disposed in a space between the first lower main surface and the second upper main surface, and is coupled to the first conductor layer via a conductor. A part of a heat dissipation member is exposed from the first sealing resin in a direction orthogonal to an up-down axis.

公开(公告)号：US12010799B2

公开(公告)日：2024-06-11

申请号：US16449761

申请日：2019-06-24

Applicant: Black & Decker Inc.

Inventor： Joshua M. Lewis ,  Michael D. Grove

IPC: H02K7/14 ,  B25B21/02 ,  B25F5/02 ,  H01H9/54 ,  H01H13/14 ,  H01H13/52 ,  H01H21/24 ,  H02K11/30 ,  H02K11/33 ,  H02K23/18 ,  H02M7/48 ,  H02P6/14 ,  H02P6/16 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K7/14 ,  H05K7/20

CPC classification number: H05K1/181 ,  B25B21/02 ,  B25F5/02 ,  H01H9/54 ,  H01H13/14 ,  H01H13/52 ,  H01H21/24 ,  H02K7/145 ,  H02K11/33 ,  H02K23/18 ,  H02M7/48 ,  H02P6/14 ,  H02P6/16 ,  H05K1/0206 ,  H05K1/112 ,  H05K1/115 ,  H05K7/2039 ,  H01H2013/525 ,  H01H2231/048 ,  H05K2201/066 ,  H05K2201/10053 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2201/10545

Abstract: An electronic module is provided including a circuit board defining a longitudinal axis and having a first surface and a second surface. A module housing is provided having a bottom surface and side walls extending from the bottom surface to form an open face through which the circuit board is received. Power switches configured as an inverter circuit to drive an electric motor are mounted on the second surface of the circuit board facing the bottom surface of the module housing, and a series of heat sinks are discretely mounted on the first surface of the circuit board facing the open face opposite the power switches. Potting material is disposed in the distance between the circuit board and the bottom surface of the module housing to cover the power switches. Thermal vias are disposed through the circuit board between corresponding ones of the heat sinks and the power switches.

公开(公告)号：US20240121889A1

公开(公告)日：2024-04-11

申请号：US18304357

申请日：2023-04-21

Applicant: Innolux Corporation

Inventor： Chi-Liang Chang

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/00

CPC classification number: H05K1/0271 ,  H05K1/18 ,  H05K3/0058 ,  H05K2201/10545 ,  H05K2203/166

Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes a circuit substrate, a plurality of electronic components, a plurality of carriers, and a bonding layer. The circuit substrate includes a circuit layer. The plurality of electronic components are disposed on the circuit substrate. The circuit layer is electrically connected to at least one of the plurality of electronic components. The plurality of carriers are disposed on the circuit substrate. The bonding layer bonds the plurality of carriers to the circuit substrate. At least one gap is between the plurality of carriers. A width of the gap is Wg. An average width of the plurality of carriers is Wa. A width of the circuit substrate is Wc. The electronic device satisfies: Wa*2*10−4