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公开(公告)号：US09469522B2
公开(公告)日：2016-10-18
申请号：US14201453
申请日：2014-03-07
Applicant: Robert Bosch GmbH
Inventor： Andrew Graham , Gary Yama , Gary O'Brien
CPC classification number: B81B3/0021 , B81B2201/0271 , B81B2203/04 , B81B2203/053 , B81C1/00095 , B81C1/00166 , B81C2201/0132 , B81C2201/014 , B81C2201/0177 , B81C2203/0136
Abstract: In one embodiment, a method of forming an out-of-plane electrode includes forming an oxide layer above an upper surface of a device layer, etching an etch stop perimeter defining trench extending through the oxide layer, forming a first cap layer portion on an upper surface of the oxide layer and within the etch stop perimeter defining trench, etching a first electrode perimeter defining trench extending through the first cap layer portion and stopping at the oxide layer, depositing a first material portion within the first electrode perimeter defining trench, depositing a second cap layer portion above the deposited first material portion, and vapor releasing a portion of the oxide layer with the etch stop portion providing a lateral etch stop.
Abstract translation: 在一个实施例中，形成平面外电极的方法包括在器件层的上表面上形成氧化物层，蚀刻限定延伸穿过氧化物层的沟槽的蚀刻停止周界，在第一帽层部分上形成 氧化物层的上表面，并且在蚀刻停止周界内限定沟槽，蚀刻延伸穿过第一盖层部分并停止在氧化物层处的第一电极周界，限定沟槽，在第一电极周界限定沟槽内沉积第一材料部分，沉积 在沉积的第一材料部分上方的第二盖层部分，以及用蚀刻停止部分提供横向蚀刻停止物的一部分氧化物层的蒸气。
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公开(公告)号：US20160290969A1
公开(公告)日：2016-10-06
申请号：US15177899
申请日：2016-06-09
Applicant: Butterfly Network, Inc.
Inventor： Jonathan M. Rothberg , Susan A. Alie , Keith G. Fife , Nevada J. Sanchez , Tyler S. Ralston
CPC classification number: G01N29/2406 , A61B8/4483 , B06B1/0292 , B81B7/007 , B81B2201/0271 , B81C1/00238 , B81C1/00301 , B81C2201/019 , B81C2203/036 , B81C2203/0792 , H01L2224/4813 , H01L2924/0002 , H01L2924/146 , H01L2924/1461
Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.
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公开(公告)号：US09437489B2
公开(公告)日：2016-09-06
申请号：US14095182
申请日：2013-12-03
Applicant: Seiko Epson Corporation
Inventor： Tsuyoshi Yoda
IPC: H01L21/768 , H05K3/40 , H05K3/22 , H05K3/32 , H05K3/42 , H05K3/46 , B81B7/00 , G01C19/56 , G01C19/5776 , H01L23/48
CPC classification number: H01L21/76898 , B81B7/0006 , B81B2201/0242 , B81B2201/0271 , G01C19/56 , G01C19/5776 , H01L21/76877 , H01L23/481 , H01L2924/00 , H01L2924/0002 , H05K3/225 , H05K3/321 , H05K3/4038 , H05K3/429 , H05K3/462 , Y10T29/49126 , Y10T29/49128 , Y10T29/49139
Abstract: A method of manufacturing a wiring substrate including a step of forming a through hole that includes forming a first concave portion in a substrate that extends from a second surface to a first insulating layer without passing through the first insulating layer; forming a second insulating layer at least within the first concave portion; and forming a second concave portion through the second insulating layer and the first insulating layer to expose a surface of a pad electrode, wherein the second concave portion is formed within the first concave portion; and filling the first concave portion and the second concave portion with a conductive body or forming the conductive body to coat inner walls of the first concave portion and the second concave portion, and forming the through electrode such that it is connected to the pad electrode.
Abstract translation: 一种制造布线基板的方法，包括形成通孔的步骤，所述通孔包括在不通过所述第一绝缘层的情况下从第二表面延伸到第一绝缘层的基板中形成第一凹部; 至少在所述第一凹部内形成第二绝缘层; 以及通过所述第二绝缘层和所述第一绝缘层形成第二凹部以暴露焊盘电极的表面，其中所述第二凹部形成在所述第一凹部内; 并且用导电体填充第一凹部和第二凹部，或者形成导电体以涂覆第一凹部和第二凹部的内壁，并且形成贯通电极，使其与焊盘电极连接。
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公开(公告)号：US20160207758A1
公开(公告)日：2016-07-21
申请号：US14914015
申请日：2014-08-26
Applicant: SILEX MICROSYSTEMS AB
Inventor： Edvard KALVESTEN , Thorbjorn EBEFORS , Niklas SVEDIN
CPC classification number: B81B7/007 , B81B2201/01 , B81B2201/0264 , B81B2201/0271 , B81B2203/0118 , B81B2203/0127 , B81B2207/095 , B81C1/00301 , B81C2201/0153 , B81C2201/036 , B81C2203/0109 , B81C2203/0145 , H01L21/50 , H01L23/08 , H01L24/94 , H01L2924/16235
Abstract: A device includes a base substrate (700) with a micro component (702) attached thereto. Suitably it is provided with routing elements (704) for conducting signals to and from the component (702). It also includes spacer members (706) which also can act as conducting structures for routing signals vertically. There is a capping structure (708) of a glass material, provided above the base substrate (700), bonded via the spacer members (706), preferably by eutectic bonding, wherein the capping structure (708) includes vias (710) including metal for providing electrical connection through the capping structure. The vias can be made by a stamping/pressing method entailing pressing needles under heating to soften the glass and applying pressure, to a predetermined depth in the glass. However, other methods are possible, e-g- drilling, etching, blasting.
Abstract translation: 一种装置包括具有附接到其上的微型部件（702）的基底（700）。 适当地，它设置有用于向组件（702）进行信号的路由选择元件（704）。 它还包括间隔件（706），其也可以用作垂直路线信号的导电结构。 优选地通过共晶接合，通过间隔件（706），设置在基底基板（700）上方的玻璃材料的封盖结构（708），其中封盖结构（708）包括通孔（710），包括金属 用于提供通过封盖结构的电连接。 通孔可以通过冲压/压制方法制成，在加热下需要加压针，使玻璃软化并施加压力至玻璃中预定的深度。 然而，其他方法是可行的，例如钻孔，蚀刻，爆破。
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公开(公告)号：US09394162B2
公开(公告)日：2016-07-19
申请号：US14716152
申请日：2015-05-19
Applicant: Butterfly Network, Inc.
Inventor： Jonathan M. Rothberg , Susan A. Alie , Keith G. Fife , Nevada J. Sanchez , Tyler S. Ralston
CPC classification number: G01N29/2406 , A61B8/4483 , B06B1/0292 , B81B7/007 , B81B2201/0271 , B81C1/00238 , B81C1/00301 , B81C2201/019 , B81C2203/036 , B81C2203/0792 , H01L2224/4813 , H01L2924/0002 , H01L2924/146 , H01L2924/1461
Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.
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Patent Agency Ranking
公开(公告)号：US09365411B2
公开(公告)日：2016-06-14
申请号：US14602827
申请日：2015-01-22
Applicant: SEIKO EPSON CORPORATION
Inventor： Akihiko Ebina
CPC classification number: B81B7/0041 , B81B3/0021 , B81B2201/0271 , B81B2203/04 , B81B2207/015 , B81B2207/095 , B81C1/00293 , B81C2203/0136 , B81C2203/0778
Abstract: A MEMS device is provided in which, in order to suppress generation of a gas from an inner wall of a space in which a MEMS portion is disposed, the MEMS portion is disposed in a space constituted by at least a silicon nitride film and a silicon film, the silicon film has a first hole, the first hole is filled with a metal film or a metal silicide, and an airtight structure is formed by the metal film or the metal silicide, the silicon nitride film, and the silicon film.
Abstract translation: 提供了一种MEMS器件，其中为了抑制从其中设置MEMS部分的空间的内壁产生气体，MEMS部分设置在至少由氮化硅膜和硅构成的空间中 膜，硅膜具有第一孔，第一孔填充有金属膜或金属硅化物，并且通过金属膜或金属硅化物，氮化硅膜和硅膜形成气密结构。
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公开(公告)号：US20160009548A1
公开(公告)日：2016-01-14
申请号：US14688128
申请日：2015-04-16
Applicant: SKYWORKS SOLUTIONS, INC.
Inventor： Jerod F. MASON , Dylan Charles BARTLE , David Scott WHITEFIELD , Dogan GUNES , Paul T. DICARLO , David T. PETZOLD
CPC classification number: B81B7/0041 , B81B2201/014 , B81B2201/0235 , B81B2201/0242 , B81B2201/0271 , B81B2201/0292 , B81B2207/11 , B81C1/00293
Abstract: Microelectromechanical systems (MEMS) having contaminant control features. In some embodiments, a MEMS die can include a substrate and an electromechanical assembly implemented on the substrate. The MEMS die can further include a contaminant control component implemented relative to the electromechanical assembly. The contaminant control component can be configured to move contaminants relative to the electromechanical assembly. For example, such contaminants can be moved away from the electromechanical assembly.
Abstract translation: 具有污染控制特征的微机电系统（MEMS）。 在一些实施例中，MEMS管芯可以包括衬底和在衬底上实现的机电组件。 MEMS管芯还可以包括相对于机电组件实现的污染物控制部件。 污染物控制部件可以配置成相对于机电组件移动污染物。 例如，这种污染物可以从机电组件移开。
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公开(公告)号：US09237668B2
公开(公告)日：2016-01-12
申请号：US13881175
申请日：2012-04-19
Applicant: Takuya Kojo
Inventor： Takuya Kojo
IPC: H01L41/053 , H05K5/06 , H01L23/10 , B81B7/00
CPC classification number: H05K5/061 , B81B7/007 , B81B2201/0271 , H01L23/10 , H01L41/0533 , H01L2224/16225
Abstract: In an electronic-component package made up of a laminated-ceramic, cavity-forming base and an electroconductive lid that is hermetically bonded to the base by a heat-melting sealant, contamination of electromagnetic-interference-reducing grounding metallization lines by melted sealant is prevented. A wall-portion grounding metallization line partially embedded in an enclosing wall portion of the base, and partially exposed to the package cavity, electrically connects lid, when sealant-bonded to the wall portion of the base, with a grounding external terminal on the base exterior. An electronic-component grounding metallization line exposed in the bottom of the base is connected to the grounding external terminal. A connecting portion that joins the wall-portion and electronic-component grounding metallization lines is disposed between laminations of the bottom and wall portions of the base, where the connecting portion is unexposed to the package cavity.
Abstract translation: 在由层压陶瓷，空腔形成基座和通过加热熔融密封剂气密地接合到基座的导电盖构成的电子部件封装中，通过熔化的密封剂污染电磁干扰减少的接地金属化线， 防止了 部分地嵌入基座的封闭壁部分并部分地暴露于封装空腔的壁部接地金属化线在密封胶结合到基座的壁部上时将盖子电连接到底座上的接地外部端子 外观。 在底座底部暴露的电子元件接地金属化线连接到接地外部端子。 连接壁部分和电子部件接地金属化线的连接部分设置在基部的底部和壁部的叠片之间，其中连接部分未暴露于封装空腔。
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公开(公告)号：US09233833B2
公开(公告)日：2016-01-12
申请号：US14031143
申请日：2013-09-19
Applicant: Seiko Epson Corporation
Inventor： Ryuji Kihara
CPC classification number: B81B3/0021 , B81B2201/0271 , B81B2203/0118 , B81B2203/019 , H03B5/30 , H03H9/2457 , H03H2009/02251 , H03H2009/02488 , H03H2009/02511
Abstract: A MEMS element includes: a substrate; a first electrode formed above the substrate; and a second electrode having a support portion and a beam portion, the support portion being formed above the substrate, the beam portion extending from the support portion, being formed in a state of having a gap between the first electrode and the beam portion, and being capable of vibrating in a thickness direction of the substrate. The width of the beam portion decreases with distance from a base of the beam portion toward a tip of the beam portion. The central length of the beam portion is larger than the lengths of ends of the beam portion. The width of the base of the beam portion is larger than the central length of the beam portion.
Abstract translation: MEMS元件包括：基板; 形成在所述衬底上的第一电极; 以及具有支撑部和梁部的第二电极，所述支撑部形成在所述基板的上方，所述梁部从所述支撑部延伸，形成为在所述第一电极和所述梁部之间具有间隙的状态，以及 能够在基板的厚度方向上振动。 梁部分的宽度随着从梁部分的基部朝向梁部分的尖端的距离而减小。 梁部分的中心长度大于梁部分的端部长度。 梁部分的基部的宽度大于梁部分的中心长度。
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公开(公告)号：US20150340968A1
公开(公告)日：2015-11-26
申请号：US14700756
申请日：2015-04-30
Applicant: Seiko Epson Corporation
Inventor： Shogo INABA , Akihiko EBINA
IPC: H02N1/00
CPC classification number: B81C1/00293 , B81B3/007 , B81B2201/0271 , B81B2203/0118 , B81C2203/0136 , B81C2203/0145
Abstract: A MEMS structure includes: a substrate; a lower electrode disposed on the substrate; an upper electrode including a movable portion disposed facing and spaced from the lower electrode; and a reinforcing portion disposed in the upper electrode so as to extend along an extending direction of the movable portion, the reinforcing portion being composed of a material having a higher Young's modulus than the upper electrode.
Abstract translation: MEMS结构包括：基板; 设置在所述基板上的下电极; 上部电极，其包括面向并与所述下部电极间隔开的可动部; 以及加强部，其设置在所述上部电极中，以沿着所述可动部的延伸方向延伸，所述加强部由比所述上部电极的杨氏模量高的材料构成。
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