公开(公告)号：US07259465B2

公开(公告)日：2007-08-21

申请号：US10104826

申请日：2002-03-22

Applicant: Tasao Soga ,  Hanae Shimokawa ,  Tetsuya Nakatsuka ,  Kazuma Miura ,  Mikio Negishi ,  Hirokazu Nakajima ,  Tsuneo Endoh

Inventor： Tasao Soga ,  Hanae Shimokawa ,  Tetsuya Nakatsuka ,  Kazuma Miura ,  Mikio Negishi ,  Hirokazu Nakajima ,  Tsuneo Endoh

IPC: H01L29/40

CPC classification number: H01L24/13 ,  B32B15/01 ,  C22C5/02 ,  C22C9/02 ,  C22C11/06 ,  C22C13/00 ,  H01L21/50 ,  H01L21/56 ,  H01L21/563 ,  H01L23/10 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/4924 ,  H01L23/49513 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/29298 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81024 ,  H01L2224/81054 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/8121 ,  H01L2224/81409 ,  H01L2224/81815 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01088 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15738 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2924/166 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/141 ,  H05K3/3463 ,  H05K3/3484 ,  H05K2201/0215 ,  H05K2201/045 ,  H05K2201/09572 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01031 ,  H01L2924/01026 ,  H01L2924/3512 ,  H01L2924/00015 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/83205

Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, etc., and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.

Abstract translation: 形成在半导体器件和衬底之间的接合部包括Cu等的金属球，Sn和金属球的化合物以及金属球通过化合物结合在一起。

公开(公告)号：US20070102490A1

公开(公告)日：2007-05-10

申请号：US11612873

申请日：2006-12-19

Applicant: Yuki Momokawa ,  Eiichi Kono ,  Masaru Saitou ,  Kazuhiko Tanabe

Inventor： Yuki Momokawa ,  Eiichi Kono ,  Masaru Saitou ,  Kazuhiko Tanabe

IPC: A47J36/02

CPC classification number: H05K3/3426 ,  H05K1/0201 ,  H05K1/09 ,  H05K1/114 ,  H05K3/0094 ,  H05K3/3415 ,  H05K3/3421 ,  H05K3/3452 ,  H05K3/3463 ,  H05K3/3468 ,  H05K3/3494 ,  H05K3/42 ,  H05K3/429 ,  H05K2201/062 ,  H05K2201/09263 ,  H05K2201/09572 ,  H05K2201/09727 ,  H05K2201/10909 ,  H05K2201/2054 ,  H05K2203/0191 ,  H05K2203/047 ,  H05K2203/081 ,  H05K2203/1105 ,  H05K2203/1121 ,  H05K2203/1394 ,  H05K2203/304 ,  Y02P70/613 ,  Y10T29/49144

Abstract: A through hole 2 in a circuit board 1 and to be joined to a lead 5 in a surface mounting component 6 is prepared from a material such as nickel, and palladium having a thermal conductivity equal to or less than 100 W/m.K, the circuit board 1 involving a alloy layer composed of at least a member selected from elements of solder 8, a pad 7, and the lead 5 in a solder joined site of the lead 5 and the pad 7, whereby a quantity of heat transmitted to the joined site via the through hole 2 is reduced at the time when wave-soldering is applied to the back of the circuit board 1 after the surface mounting component 6 was mounted, so that the joined site is maintained at a temperature equal to or less than a melting point of the alloy layer, and hence, exfoliation in an interface of the joined site is prevented, and reliability in the joint of the lead 5 and the pad 7 is elevated.

Abstract translation: 电路板1中的通孔2并且与表面安装部件6中的引线5接合，由诸如镍的材料和热导率等于或小于100W / mK的钯制成，电路 板1，其包括在引线5和焊盘7的焊料接合部位中至少由焊料8，焊盘7和引线5的元件组成的合金层，由此传递到接合部 在安装表面安装部件6之后，当在电路板1的背面上施加波峰焊时，通过通孔2的位置被减小，使得接合部位保持在等于或小于 合金层的熔点，因此防止了接合部位的界面的剥离，引线5和焊盘7的接头的可靠性提高。

公开(公告)号：US20070020971A1

公开(公告)日：2007-01-25

申请号：US11479474

申请日：2006-06-30

Applicant: Keith Everett ,  Kevin Little ,  Jamie Anderson

Inventor： Keith Everett ,  Kevin Little ,  Jamie Anderson

IPC: H05K1/00

CPC classification number: H05K1/0218 ,  H05K3/325 ,  H05K9/0058 ,  H05K2201/09481 ,  H05K2201/09572 ,  H05K2201/09972 ,  H05K2201/10371

Abstract: A fibre optic module has a PCB with high frequency tracks. The PCB is housed within a housing having top and bottom parts, each having a series of metallized ridges. The PBC has through holes filled with solder. Thus, there is a series of electrical interconnections through the PBC, and the total length of any enclosed periphery is much shorter than the full periphery of the board so that high frequencies are attenuated.

Abstract translation: 光纤模块具有高频轨迹的PCB。 PCB被容纳在具有顶部和底部部分的壳体中，每个具有一系列金属化的脊。 PBC具有填充有焊料的通孔。 因此，通过PBC存在一系列电互连，并且任何封闭周边的总长度比板的整个周边短得多，使得高频衰减。

公开(公告)号：US20070018312A1

公开(公告)日：2007-01-25

申请号：US11303916

申请日：2005-12-19

Applicant: Sang-Gui Jo

Inventor： Sang-Gui Jo

IPC: H01L23/34

CPC classification number: H05K1/0206 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/3735 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15787 ,  H01L2924/181 ,  H05K2201/09572 ,  H05K2203/049 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A wiring substrate may have a first surface including a chip mounting pad, and a second surface opposite to the first surface. A heat radiating layer may be provided on the second surface of the wiring substrate. A plurality of heat conducting elements may connect the chip mounting pad to the heat radiating layer. Metal protrusions may be provided on the chip mounting pad and may directly contact a semiconductor chip.

Abstract translation: 布线基板可以具有包括芯片安装垫的第一表面和与第一表面相对的第二表面。 可以在布线基板的第二表面上设置散热层。 多个导热元件可以将芯片安装垫连接到散热层。 金属突起可以设置在芯片安装焊盘上，并且可以直接接触半导体芯片。

公开(公告)号：US20060209139A1

公开(公告)日：2006-09-21

申请号：US11220766

申请日：2005-09-07

Applicant: Michiaki Murata

Inventor： Michiaki Murata

IPC: B41J2/045

CPC classification number: H05K1/115 ,  B41J2/14233 ,  B41J2/161 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1632 ,  B41J2/1634 ,  B41J2/1642 ,  B41J2/1646 ,  B41J2002/14241 ,  B41J2002/14491 ,  B41J2202/18 ,  B41J2202/20 ,  B41J2202/21 ,  H05K3/4652 ,  H05K2201/09509 ,  H05K2201/09572 ,  H05K2201/09827

Abstract: An electrical connection substrate includes a substrate main body in which an electrical connection through port is formed, and connection target members arranged on both sides of the substrate main body, respectively. The connection target members are electrically connected to each other through the electrical connection through port, and the electrical connection through port is filled with a fluidized conductive material. The fluidized conductive material thus filled can satisfactorily keep connection of the connection target members to each other through the electrical connection through port.

公开(公告)号：US20060038288A1

公开(公告)日：2006-02-23

申请号：US11207715

申请日：2005-08-22

Applicant: Hokichi Yoshioka ,  Kazuhiko Ito

Inventor： Hokichi Yoshioka ,  Kazuhiko Ito

IPC: H01L23/04

CPC classification number: H05K3/4046 ,  H01L23/10 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/01079 ,  H05K1/0306 ,  H05K3/388 ,  H05K2201/09572 ,  H05K2201/10242 ,  H01L2924/00

Abstract: A substrate having many via contact means disposed therein. Each of the via contact means is composed of a via hole, as a through-hole, formed in the substrate, a metal film disposed on the inner peripheral surface of the via hole, and a solder filled into the cavity defined by the metal film.

Abstract translation: 具有设置在其中的许多通孔接触装置的基板。 每个通孔接触装置由形成在基板中的作为通孔的通孔，设置在通孔的内周面上的金属膜和填充到由金属膜限定的空腔中的焊料构成 。

公开(公告)号：US20050285172A1

公开(公告)日：2005-12-29

申请号：US11027745

申请日：2004-12-30

Applicant: William Freeman ,  Hong Jiang

Inventor： William Freeman ,  Hong Jiang

IPC: H01L21/48 ,  H01L21/58 ,  H01L23/15 ,  H01L27/108 ,  H01L29/76 ,  H05K3/34 ,  H05K3/46

CPC classification number: H01L24/83 ,  H01L21/486 ,  H01L23/15 ,  H01L24/26 ,  H01L2224/8385 ,  H01L2224/9202 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/3436 ,  H05K3/3463 ,  H05K3/4614 ,  H05K2201/09536 ,  H05K2201/09572 ,  H05K2201/10666 ,  H05K2201/10992 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2924/00

Abstract: Exemplary embodiments of the present invention illustrate methods to electrically connect multiple layers of a substrate. A first and second layer each has at least one electrical trace on a surface thereof. The substrate includes an interposer structure attached to the second layer and separating the first and second layers on at least a portion of a perimeter of the first and second layers. The method includes a steps for forming a via in the first layer, placing a first electrically conductive substance in the via, placing a second electrically conductive substance on the second layer adjacent said via, and heating an area around said via and said second electrically conductive substance until said first and second electrically conductive substances at least partially melt to form the electrical connection.

Abstract translation: 本发明的示例性实施例示出了电连接衬底的多个层的方法。 第一层和第二层各自在其表面上具有至少一个电迹线。 衬底包括附接到第二层并且在第一层和第二层的周边的至少一部分上分离第一层和第二层的插入件结构。 该方法包括用于在第一层中形成通孔的步骤，将第一导电物质放置在通孔中，将第二导电物质放置在邻近所述通孔的第二层上，并且加热所述通孔周围的区域和所述第二导电 物质，直到所述第一和第二导电物质至少部分地熔化以形成电连接。

公开(公告)号：US20050205997A1

公开(公告)日：2005-09-22

申请号：US11078356

申请日：2005-03-14

Applicant: Satoshi Yamamoto ,  Tatsuo Suemasu

Inventor： Satoshi Yamamoto ,  Tatsuo Suemasu

IPC: H01L27/14 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L27/146 ,  H01L31/02 ,  H01L33/48 ,  H01S5/022 ,  H05K1/03 ,  H05K1/11 ,  H05K3/38 ,  H05K3/40 ,  H01L23/48 ,  H01L29/40

CPC classification number: H01L21/76898 ,  H01L27/14634 ,  H01L27/14636 ,  H01L2224/02372 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05024 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/11 ,  H01L2924/00014 ,  H05K1/0306 ,  H05K3/388 ,  H05K3/4038 ,  H05K2201/0394 ,  H05K2201/09572 ,  H01L2224/05599

Abstract: A device having improved electrical connection includes a first substrate including a first side and a second side; a functional element on the first side of the first substrate; a pad that is electrically connected to the functional element; and a through-hole interconnection provided in a hole extending through the first substrate from the first side to the second side, the through-hole interconnection including a first conductive material and being electrically connected to the pad, and a conductive region that is provided along a portion of an inner surface of the hole, and is made of a second conductive material, different from the first conductive material.

Abstract translation: 具有改进的电连接的装置包括包括第一侧和第二侧的第一基板; 在所述第一基板的第一侧上的功能元件; 电连接到所述功能元件的焊盘; 以及设置在从第一侧到第二侧延伸穿过第一基板的孔中的通孔互连，通孔互连包括第一导电材料并且电连接到焊盘，并且导电区域沿着 孔的内表面的一部分，并且由与第一导电材料不同的第二导电材料制成。

公开(公告)号：US06820798B1

公开(公告)日：2004-11-23

申请号：US09914932

申请日：2001-10-29

Applicant: Helmut Heinz ,  Bernhard Schuch

Inventor： Helmut Heinz ,  Bernhard Schuch

IPC: B23K3512

CPC classification number: H05K7/205 ,  H05K1/0206 ,  H05K1/113 ,  H05K3/0058 ,  H05K3/0094 ,  H05K3/1216 ,  H05K3/341 ,  H05K3/3452 ,  H05K2201/066 ,  H05K2201/09572 ,  H05K2201/0959 ,  H05K2201/10166 ,  H05K2201/10969 ,  H05K2203/025 ,  Y02P70/613 ,  Y10T29/49133 ,  Y10T29/49144

Abstract: The aim of the invention is to simplify and improve the production method for circuit arrangements that are mounted on a support element (5), said element having thermal through-platings (7) which are at least partially scaled by a screen printing process. To this end, the screen printing process is carried out after the application of a first metallization layer (6) to the support element (5) which forms the base metallization layer, whereby the residue of the screen printing material (8) remaining on the underside (13) of the support element (5) is stripped once the screen printing material (8) has been cured, using at least a mechanical cleaning process and/or a chemical cleaning process.

Abstract translation: 本发明的目的是简化和改进安装在支撑元件（5）上的电路布置的制造方法，所述元件具有通过丝网印刷工艺至少部分地缩放的热通镀（7）。 为此，在将第一金属化层（6）施加到形成基底金属化层的支撑元件（5）之后进行丝网印刷工艺，由此将丝网印刷材料（8）的残留物保留在 一旦丝网印刷材料（8）已被固化，使用至少机械清洁工艺和/或化学清洗工艺，支撑元件（5）的下侧（13）被剥离。

公开(公告)号：US20040115340A1

公开(公告)日：2004-06-17

申请号：US10728636

申请日：2003-12-05

Applicant: Surfect Technologies, Inc.

Inventor： Thomas P. Griego

IPC: C25D013/00 ,  C25D001/12

CPC classification number: H01L21/76898 ,  B22F2998/00 ,  B22F2999/00 ,  B23K35/0244 ,  C25D7/123 ,  C25D15/00 ,  C25D15/02 ,  H01F41/16 ,  H01F41/20 ,  H01F41/26 ,  H01L21/2885 ,  H01L21/76877 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/1433 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H05K3/3473 ,  H05K3/3484 ,  H05K2201/0215 ,  H05K2201/0218 ,  H05K2201/083 ,  H05K2201/09572 ,  H05K2203/0425 ,  H05K2203/043 ,  H05K2203/104 ,  Y10T428/12063 ,  B22F1/025 ,  B22F1/0088 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A method of using coated and/or magnetic particles to deposit structures including solder joints, bumps, vias, bond rings, and the like. The particles may be coated with a solderable material. For solder joints, after reflow the solder material may comprise unmelted particles in a matrix, thereby increasing the strength of the joint and decreasing the pitch of an array of joints. The particle and coating may form a higher melting point alloy, permitting multiple subsequent reflow steps. The particles and/or the coating may be magnetic. External magnetic fields may be applied during deposition to precisely control the particle loading and deposition location. Elements with incompatible electropotentials may thereby be electrodeposited in a single step. Using such fields permits the fill of high aspect ratio structures such as vias without requiring complete seed metallization of the structure. Also, a catalyst consisting of a magnetic particle coated with a catalytic material, optionally including an intermediate layer.

Abstract translation: 使用涂覆和/或磁性颗粒沉积包括焊点，凸块，通孔，结合环等结构的方法。 颗粒可以用可焊接材料涂覆。 对于焊料接头，在回流之后，焊料材料可以包括基体中的未熔化的颗粒，从而增加接头的强度并降低接头阵列的间距。 颗粒和涂层可形成较高熔点的合金，允许多次随后的回流步骤。 颗粒和/或涂层可以是磁性的。 可以在沉积期间施加外部磁场以精确地控制颗粒装载和沉积位置。 因此，具有不相容的电位的元件可以在一个步骤中电沉积。 使用这样的领域允许填充诸如通孔的高纵横比结构，而不需要结构的完全种子金属化。 而且，由涂覆有催化材料的磁性颗粒组成的催化剂，任选地包括中间层。