公开(公告)号：US20050208789A1

公开(公告)日：2005-09-22

申请号：US11109656

申请日：2005-04-20

Applicant: Takehiro Shirai ,  Masayuki Iwase

Inventor： Takehiro Shirai ,  Masayuki Iwase

IPC: G02B6/38 ,  G02B6/42 ,  H01L23/24 ,  H01L23/498 ,  H01R12/00 ,  H05K1/05 ,  H05K3/44

CPC classification number: G02B6/4201 ,  G02B6/3885 ,  G02B6/4277 ,  G02B6/428 ,  G02B6/4292 ,  H01L23/24 ,  H01L23/49861 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0219 ,  H05K1/056 ,  H05K3/06 ,  H05K3/44 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09754 ,  H05K2201/10121 ,  H05K2203/0323 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A printed wiring board includes a plurality of conductor plates that includes at least one conductor plate that is used as a lead for electrical connection with an external circuit, the conductor plates being separated spatially from one another; an insulating layer formed on or across the conductor plates or both on and across the conductor plates; and a plurality of wiring patterns formed on the insulating layer. At least one of the conductor plates is electrically connected with at least one of the wiring patterns through a via-hole.

Abstract translation: 印刷布线板包括多个导体板，其包括至少一个导体板，该导体板用作与外部电路电连接的引线，导体板彼此空间分离; 在导体板上或横跨导体板上形成绝缘层，或者两者在导体板上并跨过导体板; 以及形成在所述绝缘层上的多个布线图案。 至少一个导体板通过通孔与至少一个布线图形电连接。

公开(公告)号：US20050195528A1

公开(公告)日：2005-09-08

申请号：US10794681

申请日：2004-03-05

Applicant: Jeffry Bennin ,  Reid Danielson ,  Galen Houk

Inventor： Jeffry Bennin ,  Reid Danielson ,  Galen Houk

IPC: G11B5/48 ,  G11B5/60 ,  G11B15/64 ,  G11B17/32 ,  G11B21/16 ,  G11B21/20 ,  H05K1/05 ,  H05K3/40 ,  H05K3/44

CPC classification number: G11B5/4846 ,  G11B5/484 ,  G11B5/486 ,  H05K1/056 ,  H05K3/4046 ,  H05K3/44 ,  H05K2201/09554 ,  H05K2201/0969 ,  H05K2201/10234 ,  H05K2203/0195

Abstract: A method for forming an electrical interconnect to the spring metal layer in an integrated lead suspension or suspension component of the type having a multi-layer structure including a spring metal layer and a conductor layer separated by a dielectric insulator layer. The method includes forming an aperture through at least one of either the spring metal and conductor layers, and optionally through the dielectric layer, at an interconnect site. A first mass of malleable conductive metal is inserted into the aperture. The mass of metal is then coined to form a stud that engages at least the spring metal layer at the interconnect site. One embodiment of the invention is used to form a bond pad stud that is free from contact with the conductor layer. Another embodiment is used to form an electrical interconnect stud that electrically connects the spring metal and conductor layers. The invention can also be used to mount integrated lead flexures to load beams.

Abstract translation: 一种用于在具有包括弹性金属层和由电介质绝缘体层隔开的导体层的多层结构的类型的集成铅悬浮或悬挂部件中形成与弹簧金属层的电互连的方法。 该方法包括在互连位置处通过弹簧金属和导体层中的至少一个，以及任选地通过介电层形成孔。 将第一质量的韧性导电金属插入孔中。 然后将金属质量打造成形成在互连位置处至少与弹簧金属层接合的螺柱。 本发明的一个实施例用于形成不与导体层接触的接合焊盘螺柱。 另一个实施例用于形成电连接弹簧金属和导体层的电互连柱。 本发明还可用于将集成引线弯曲件安装到负载梁。

公开(公告)号：US06930256B1

公开(公告)日：2005-08-16

申请号：US10138225

申请日：2002-05-01

Applicant: Ronald Patrick Huemoeller ,  Sukianto Rusli

Inventor： Ronald Patrick Huemoeller ,  Sukianto Rusli

IPC: H01L21/48 ,  H05K1/05 ,  H05K3/00 ,  H05K3/10 ,  H05K3/12 ,  H05K3/42 ,  H05K7/10 ,  H05K1/16

CPC classification number: H01L24/73 ,  H01L21/4857 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/1815 ,  H05K1/056 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/107 ,  H05K3/1258 ,  H05K3/423 ,  H05K7/1061 ,  H05K2201/09036 ,  H05K2201/09554 ,  H05K2203/0723 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49167 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An integrated circuit substrate having laser-embedded conductive patterns provides a high-density mounting and interconnect structure for integrated circuits. Conductive patterns within channels on the substrate provide interconnects that are isolated by the channel sides. A dielectric material is injection-molded or laminated over a metal layer that is punched or etched. The metal layer can provide one or more power planes within the substrate. A laser is used to ablate channels on the surfaces of the outer dielectric layer for the conductive patterns. The conductive patterns are electroplated or paste screen-printed and an etchant-resistive material is applied. Finally, a plating material can be added to exposed surfaces of the conductive patterns. An integrated circuit die and external terminals can then be attached to the substrate, providing an integrated circuit having a high-density interconnect.

Abstract translation: 具有激光嵌入式导电图案的集成电路基板为集成电路提供高密度的安装和互连结构。 衬底上通​​道内的导电图案提供由通道侧隔离的互连。 电介质材料被注塑或层压在冲压或蚀刻的金属层上。 金属层可以在衬底内提供一个或多个电力平面。 激光用于消融用于导电图案的外部电介质层的表面上的通道。 导电图案被电镀或糊状丝网印刷并且施加耐蚀刻材料。 最后，可以将电镀材料添加到导电图案的暴露表面。 然后可以将集成电路管芯和外部端子连接到衬底，从而提供具有高密度互连的集成电路。

公开(公告)号：US20050161781A1

公开(公告)日：2005-07-28

申请号：US10905245

申请日：2004-12-22

Applicant: Masaru Kanakubo

Inventor： Masaru Kanakubo

IPC: H05K1/05 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/12 ,  H01L23/433 ,  H01L23/538 ,  H01L25/04 ,  H01L25/16 ,  H01L25/18 ,  H05K1/11 ,  H05K3/00 ,  H05K3/28 ,  H05K3/40 ,  H05K3/44 ,  H01L29/47

CPC classification number: H01L23/4334 ,  H01L21/486 ,  H01L21/565 ,  H01L23/5384 ,  H01L23/564 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/165 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K3/0047 ,  H05K3/0052 ,  H05K3/284 ,  H05K3/4046 ,  H05K3/44 ,  H05K2201/09554 ,  H05K2201/10287 ,  H05K2203/0207 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/20754 ,  H01L2924/2076 ,  H01L2924/00015 ,  H01L2224/05599

Abstract: Disclosed are a hybrid integrated circuit device and a method of manufacturing thereof which can enhance reliability of connections between conductive patterns and a circuit board. A method of manufacturing the hybrid integrated circuit device comprises the steps of providing an insulating layer on a surface of the circuit board made of metal, forming conductive patterns on the surface of the insulating layer so as to constitute a plurality of units, forming exposure holes so as to penetrate the insulating layer in the respective units and thereby to expose the circuit board from bottom portions of the exposure holes, forming flat portions at the bottom portions of the exposure holes in the respective units, electrically connecting circuit elements to the conductive patterns in the respective units, electrically connecting the flat portions to the conductive patterns in the respective units by use of thin metallic wires, and separating the respective units.

Abstract translation: 公开了一种混合集成电路器件及其制造方法，其可以增强导电图案和电路板之间的连接的可靠性。 制造混合集成电路器件的方法包括以下步骤：在由金属制成的电路板的表面上提供绝缘层，在绝缘层的表面上形成导电图案以构成多个单元，形成曝光孔 以贯穿各单元中的绝缘层，从而使曝光孔的底部露出电路板，在各单元的曝光孔的底部形成平坦部分，将电路元件电连接到导电图案 在各个单元中，通过使用细金属线将平坦部分电连接到各个单元中的导电图案，并分离各个单元。

公开(公告)号：US20050078416A1

公开(公告)日：2005-04-14

申请号：US10959429

申请日：2004-10-07

Applicant: Masashi Shiraishi ,  Hiroyoshi Nakajima ,  Ichiro Yagi

Inventor： Masashi Shiraishi ,  Hiroyoshi Nakajima ,  Ichiro Yagi

IPC: G11B5/60 ,  G11B5/48 ,  G11B21/16 ,  G11B21/21 ,  H05K3/32 ,  H05K3/40 ,  H05K3/44

CPC classification number: G11B5/486 ,  H05K3/0061 ,  H05K3/328 ,  H05K3/4069 ,  H05K3/44 ,  H05K2201/0215 ,  H05K2201/09554 ,  H05K2203/107

Abstract: A suspension includes a flexure constituted by a metal plate member, for supporting a head slider provided with at least one head element, a load beam provided with a top end section and constituted by a metal plate member, for supporting the flexure at the top end section, and an individual FPC member attached to the flexure and the load beam and provided with trace conductors to be electrically connected to the at least one head element of the head slider. The FPC member includes a plurality of via holes provided with metal fillers filled therein, the metal fillers in the respective via holes are welded to the flexure and/or the load beam, and the FPC member is fixed to the flexure and/or the load beam at least by means of the welding.

Abstract translation: 悬架包括由金属板构件构成的挠曲件，用于支撑设置有至少一个头部元件的头部滑块，设置有顶端部分并由金属板构件构成的负载梁，用于在顶端支撑弯曲部 以及附接到挠曲件和负载梁的单独的FPC构件，并且设置有电连接到头滑块的至少一个头元件的迹线导体。 FPC部件包括设置有填充有金属填充物的多个通孔，各通路孔中的金属填充物焊接到挠曲部和/或负载梁上，FPC部件固定在挠曲部和/或负载部 至少通过焊接。

公开(公告)号：US06842341B1

公开(公告)日：2005-01-11

申请号：US10677458

申请日：2003-10-02

Applicant: John M. Waldvogel ,  Brian R. Bielick ,  Herman J. Miller ,  Billy J. Van Cannon

Inventor： John M. Waldvogel ,  Brian R. Bielick ,  Herman J. Miller ,  Billy J. Van Cannon

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/34 ,  H05K3/38 ,  H05K3/40 ,  H05K7/20

CPC classification number: H05K1/021 ,  H05K1/182 ,  H05K3/0061 ,  H05K3/341 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/09554 ,  H05K2201/10166 ,  H05K2201/10969 ,  H05K2203/042 ,  H05K2203/063

Abstract: An electrical circuit apparatus (300) that includes: a substrate (330) having a ground layer (336), at least one device aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate such that at least a portion of the substrate device aperture overlaps the heat sink, the adhesive layer having at least one device aperture and at least one solder aperture, wherein aligning the at least one substrate solder aperture with the at least one adhesive layer solder aperture and aligning the at least one substrate device aperture with the at least one adhesive layer device aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.

Abstract translation: 一种电路设备（300），包括：具有接地层（336），至少一个器件孔（332）和至少一个焊料孔（334）的衬底（330）; 散热器（310）; 以及用于将所述散热器机械耦合到所述基板的接地层的粘合剂层（320），使得所述基板装置孔的至少一部分与所述散热器重叠，所述粘合剂层具有至少一个装置孔和至少一个焊料 孔，其中将所述至少一个衬底焊接孔与所述至少一个粘合剂层焊接孔对准并且将所述至少一个衬底器件孔与所述至少一个粘合剂层器件孔对准使得焊料在所述散热器和所述散热器之间的预定区域中润湿 衬底的接地层。

公开(公告)号：US20040251533A1

公开(公告)日：2004-12-16

申请号：US10813137

申请日：2004-03-29

Inventor： Takeshi Suzuki ,  Kazushige Osumi ,  Junichi Ichihashi ,  Toshiyuki Iimura ,  Shinichi Tsuyuki

IPC: H01L023/48 ,  H01L023/52

CPC classification number: H01L24/49 ,  H01L23/4334 ,  H01L23/49531 ,  H01L24/45 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K1/0231 ,  H05K1/056 ,  H05K3/284 ,  H05K3/4046 ,  H05K3/44 ,  H05K2201/09554 ,  H05K2201/09772 ,  H05K2201/10287 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: Provided is a hybrid integrated circuit device which can more effectively stabilize a circuit configured to operate at a high speed. A hybrid integrated circuit device of the embodiment includes a metal substrate provided with an insulating layer on a surface thereof, a conductive pattern formed on a surface of the insulating layer, a semiconductor element fixed onto the conductive pattern, a lead as external connecting means fixed to the conductive pattern in the periphery of the metal substrate, and a contact portion for electrically connecting the conductive pattern electrically connected to the semiconductor element to the metal substrate in the vicinity of the semiconductor element.

Abstract translation: 提供了一种混合集成电路器件，其可以更有效地稳定被配置为高速操作的电路。 本实施例的混合集成电路器件包括在其表面上设置有绝缘层的金属基板，形成在绝缘层的表面上的导电图案，固定到导电图案上的半导体元件，固定的外部连接装置的引线 涉及金属基板周边的导电图案，以及用于将与半导体元件电连接的导电图案与半导体元件附近的金属基板电连接的接触部。

公开(公告)号：US20040246690A1

公开(公告)日：2004-12-09

申请号：US10602828

申请日：2003-06-25

Applicant: NEC Toppan Circuit Solutions, Inc. ,  NEC Tokin Corporation

Inventor： Hirofumi Nakamura ,  Satoshi Arai

IPC: H05K001/16

CPC classification number: H01L24/81 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/642 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30105 ,  H05K1/162 ,  H05K3/382 ,  H05K2201/0329 ,  H05K2201/0347 ,  H05K2201/035 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2203/0315 ,  Y10T428/24917 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A thin type printed circuit board with an enclosed capacitor of a large capacitance. The printed circuit board includes metal sheet 11 having roughed surface presenting micro-irregularities, a dielectric film for capacitor 12 covering the surface of the metal sheet, and a first electrically conductive layer of electrically conductive resin 13 covering the surface of the dielectric film. A second electrically conductive layer 14 is provided on the surface of the first electrically conductive layer in a region of via for cathode side connection 18. The metal sheet and the first and second electrically conductive layers are encapsulated by resin 15. The via for cathode side connection 18, obtained on boring through the resin 15 until reaching the second electrically conductive layer 14, is coated with an electrode 20. A via for anode side connection 19 obtained on boring through the resin 15 is coated with an electrode 21 that is insulated from the second electrically conductive layer 13 by the resin 15.

Abstract translation: 一种具有大电容的封闭电容器的薄型印刷电路板。 印刷电路板包括具有粗糙表面呈现微小凹凸的金属片11，覆盖金属片表面的电容器12的电介质膜和覆盖电介质膜表面的导电树脂13的第一导电层。 第二导电层14设置在阴极侧连接件18的通路区域中的第一导电层的表面上。金属片和第一和第二导电层被树脂15封装。阴极侧的通孔 在通过树脂15钻孔直到到达第二导电层14时获得的连接18涂覆有电极20.在通过树脂15钻孔时获得的用于阳极侧连接19的通孔涂覆有绝缘的电极21 第二导电层13由树脂15构成。

公开(公告)号：US20040238215A1

公开(公告)日：2004-12-02

申请号：US10748478

申请日：2003-12-29

Inventor： Kwun-Yao Ho ,  Moriss Kung

IPC: H05K001/11 ,  H05K001/14

CPC classification number: H05K3/4652 ,  H05K1/056 ,  H05K3/4069 ,  H05K3/44 ,  H05K3/4614 ,  H05K2201/09554 ,  H05K2201/10378 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49165

Abstract: A circuit board and a fabricating process thereof is provided. The present invention employs a core layer as a base layer, wherein the core layer is a core conducting layer, or is a core dielectric layer having two conducting layers. By using this core layer and two patterned conductive layers, a three-conducting-layer circuit board or a four-conducting-layer circuit board is fabricated. Furthermore, both circuit boards can be used as circuit board units to fabricate circuit boards having more than four conducting layers. The present invention adopts lamination processes and equipment instead of using complicated build-up process. Therefore, the present invention effectively reduces the production costs and simplifies the process cycle for fabricating circuit boards, and is suitable for mass production.

Abstract translation: 提供电路板及其制造方法。 本发明采用芯层作为基层，其中芯层是芯导电层，或是具有两个导电层的芯介质层。 通过使用该芯层和两个图案化的导电层，制造三导电层电路板或四导电层电路板。 此外，两个电路板可以用作电路板单元以制造具有多于四个导电层的电路板。 本发明采用层压工艺和设备，而不是采用复杂的堆积工艺。 因此，本发明有效地降低了制造成本，并且简化了制造电路板的工艺循环，并且适合于批量生产。

公开(公告)号：US06713792B2

公开(公告)日：2004-03-30

申请号：US10060563

申请日：2002-01-30

Applicant: Leendert J. van der Windt

Inventor： Leendert J. van der Windt

IPC: H01L2348

CPC classification number: H05K3/44 ,  H05K1/0203 ,  H05K1/021 ,  H05K1/0243 ,  H05K1/182 ,  H05K3/0047 ,  H05K3/0061 ,  H05K3/429 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/0959 ,  H05K2201/09618 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/175

Abstract: A method of manufacturing a printed circuit board through-hole connection includes forming a through-hole by removing material from the first side of the printed circuit board until the backing and then slightly into the first side of the backing providing a hole. Next, plating through the hole connecting the backing layer, ground layer, and signal layer. Now the plating of the signal layer is removed without removing the connection from the ground layer to the backing. Finally, the hole is filled from the first side of the printed circuit board. A method of manufacturing a MMIC printed circuit board through-hole connection includes forming a through-hole by removing material from the first side of the MMIC printed circuit board through the first signal layer, through the MMIC until the second signal layer, and then slightly into the top side of the second signal layer. Once the material is removed, an electrical connection is provided to the first signal layer, the MMIC and the second signal layer. A printed circuit board through-hole connection that includes an assembled layout of a printed circuit board and formed through holes by material removed from the first side of the printed circuit board up to the backing and then slightly into the top portion of the backing. It further includes plated through-holes that connect the backing, a ground layer and a signal layer, removed plating from the signal layer without the connection removed from the ground layer to the backing and filled through-holes from the first side with a non conductive filler.

Abstract translation: 制造印刷电路板通孔连接的方法包括通过从印刷电路板的第一侧去除材料形成通孔，直到背衬，然后略微进入背衬的第一侧，提供孔。 接下来，通过连接背衬层，接地层和信号层的孔进行电镀。 现在，消除信号层的电镀，而不需要从接地层到背衬的连接。 最后，从印刷电路板的第一侧填充孔。一种制造MMIC印刷电路板通孔连接的方法包括：通过从MMIC印刷电路板的第一面去除材料，形成通孔 第一个信号层，通过MMIC直到第二个信号层，然后稍微进入第二个信号层的顶端。 一旦材料被去除，就向第一信号层，MMIC和第二信号层提供电连接。一种印刷电路板通孔连接，其包括印刷电路板的组装布局并且通过被去除材料形成的孔 从印刷电路板的第一侧直到背衬，然后稍微进入背衬的顶部。 它还包括连接背衬，接地层和信号层的电镀通孔，从信号层移除镀层，而不将接地层从接地层移除到背衬，并从第一侧填充具有非导电性的通孔 填料。