公开(公告)号：US20070108611A1

公开(公告)日：2007-05-17

申请号：US11282082

申请日：2005-11-17

Applicant: Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

Inventor： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC: H01L23/48

CPC classification number: H05K1/141 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K1/144 ,  H05K3/3436 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/09072 ,  H05K2201/10159 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10734 ,  H05K2203/1572

Abstract: A stacking method and structure for attaching memory components to a ball grid array (BGA) device are provided. A specialized carrier includes multiple memory devices such as memory die, or chip scale packaging (CSP) memory. The specialized carrier is attached to a mating supporting carrier to form a stacked structure. The mating supporting carrier includes an associated ball grid array (BGA) device for the multiple devices of the specialized carrier.

Abstract translation: 提供了一种用于将存储器组件附接到球栅阵列（BGA）装置的堆叠方法和结构。 专用载体包括多个存储器件，例如存储管芯或芯片级封装（CSP）存储器。 专用载体附接到配合支撑载体以形成堆叠结构。 配合支撑载体包括用于专用载体的多个装置的相关联的球栅阵列（BGA）装置。

公开(公告)号：US20050251777A1

公开(公告)日：2005-11-10

申请号：US10839488

申请日：2004-05-05

Applicant: Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

Inventor： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC: G06F17/50 ,  H01L21/44 ,  H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC classification number: H01L23/49827 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/112 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/429 ,  H05K2201/09836

Abstract: A method and structure are provided for implementing enhanced electronic packaging and printed circuit board (PCB) layout. A diagonal via is formed at a selected angle between a first side and an opposite second side of a printed circuit board at a selected printed circuit board location. The diagonal via is plated with an electrically conductive material. Diagonal vias are used to interconnect between a high-density pitch on the first side and a larger pitch on the opposite second side of the printed circuit board. The diagonal vias can be used to selectively interconnect electrical patterns of selected layers and eliminate the use of blind and buried vias.

Abstract translation: 提供了一种用于实现增强型电子封装和印刷电路板（PCB）布局的方法和结构。 在所选择的印刷电路板位置处，在印刷电路板的第一侧和相对的第二侧之间以选定的角度形成对角通孔。 对角通孔镀有导电材料。 对角通孔用于在第一侧上的高密度间距和在印刷电路板的相对的第二侧上的较大节距之间进行互连。 对角通孔可用于选择性地互连所选层的电气图案，并消除使用盲孔和埋孔。

公开(公告)号：US20050098607A1

公开(公告)日：2005-05-12

申请号：US10703353

申请日：2003-11-07

Applicant: Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

Inventor： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC: H05K1/02 ,  H05K3/34 ,  B23K1/00

CPC classification number: H05K3/3436 ,  H05K1/0219 ,  H05K2201/09609 ,  H05K2201/10378 ,  H05K2203/0415 ,  Y02P70/613

Abstract: A method and structure are provided for implementing a column attach coupled noise suppressor for a solder column structure of the type used to join a substrate to a circuit card. The electrical noise suppressor structure includes a plurality of elongated through openings that are arranged in a predefined pattern. The elongated through openings have electrically conductive sidewalls and are electrically connected together. The predefined pattern of the elongated, electrically conductive through openings corresponds to a layout of solder columns. The solder columns are attached at one end to either a substrate or a circuit card and are inserted through the elongated through openings of the electrical noise suppressor structure, spaced apart from the electrically conductive sidewalls. Then the solder columns are attached at the other end to the other one of the substrate or circuit card.

Abstract translation: 提供了一种用于实现用于将基板连接到电路卡的类型的焊料柱结构的列连接耦合噪声抑制器的方法和结构。 电噪声抑制器结构包括以预定图案布置的多个细长通孔。 细长的通孔具有导电侧壁并电连接在一起。 细长的导电通孔的预定图案对应于焊料柱的布局。 焊料柱的一端连接到基板或电路卡，并且通过与导电侧壁间隔开的电噪声抑制器结构的细长通孔插入。 然后，焊料柱在另一端连接到另一个衬底或电路卡。

公开(公告)号：US20050077912A1

公开(公告)日：2005-04-14

申请号：US10682132

申请日：2003-10-09

Applicant: Gerald Bartley ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

Inventor： Gerald Bartley ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC: G01R1/073 ,  G01R31/28 ,  H05K3/22 ,  G01R31/02

CPC classification number: G01R1/07328 ,  G01R31/2808 ,  H05K3/222

Abstract: A method and a probe structure are provided for implementing multiple signals probing of a printed circuit board. A probe structure is formed on an outside surface of the printed circuit board. A resistor is electrically connected with an associated via with a signal to be monitored. A path to a predefined probe location for monitoring the signal is defined from the resistor using the probe structure.

Abstract translation: 提供了一种用于实现印刷电路板的多信号探测的方法和探针结构。 探针结构形成在印刷电路板的外表面上。 电阻器与相关的通孔与要监控的信号电连接。 使用探针结构从电阻器定义用于监测信号的预定义探针位置的路径。

公开(公告)号：US5843691A

公开(公告)日：1998-12-01

申请号：US779735

申请日：1996-12-31

Applicant: Joel Douglas ,  Ernest Kiser ,  Michael F. Tomasco ,  Remedios Dato ,  Edward G. Rice ,  Deborah P. Tuohy ,  Mark Maxson ,  Zbigniew Witko ,  Scott Segelke

Inventor： Joel Douglas ,  Ernest Kiser ,  Michael F. Tomasco ,  Remedios Dato ,  Edward G. Rice ,  Deborah P. Tuohy ,  Mark Maxson ,  Zbigniew Witko ,  Scott Segelke

IPC: C12Q1/00 ,  C12Q1/26 ,  C12Q1/54 ,  G01N33/52 ,  G01N33/558 ,  G01N33/66 ,  C12Q1/28 ,  G01N21/00

CPC classification number: G01N33/66 ,  C12Q1/54 ,  G01N33/521 ,  G01N33/523 ,  G01N33/526 ,  G01N33/558

Abstract: A multilayer reagent test strip measures the concentration of analyte in a liquid sample that is applied to it. The sample is guided to a number of assay areas arrayed along the strip, where the analyte can react with a reagent to cause a color change. Each assay area also includes an inhibitor for the color-change reaction. The inhibitor concentration increases in successive assay areas; thus, the number of areas that change color is a measure of the analyte concentration. The test strip is particularly adapted for measuring glucose in a whole blood sample. In a preferred embodiment, the sample is guided to the assay areas along a path formed by crushing selected areas of a membrane, and the assay areas are uncrushed areas of the membrane.

Abstract translation: 多层试剂测试条测量施加于其上的液体样品中分析物的浓度。 将样品引导到沿着条带排列的多个测定区域，其中分析物可以与试剂反应以引起颜色变化。 每个测定区域还包括用于变色反应的抑制剂。 连续测定区域的抑制剂浓度增加; 因此，改变颜色的区域的数量是分析物浓度的量度。 测试条特别适用于测量全血样品中的葡萄糖。 在优选的实施方案中，将样品引导到沿着通过破碎膜的选定区域形成的路径的测定区域，并且测定区域是膜的未破碎区域。