公开(公告)号：US20220129031A1

公开(公告)日：2022-04-28

申请号：US17520296

申请日：2021-11-05

Applicant: Intel Corporation

Inventor： Vasudevan Srinivasan ,  Krishnakanth V. Sistla ,  Corey D. Gough ,  Ian M. Steiner ,  Nikhil Gupta ,  Vivek Garg ,  Ankush Varma ,  Sujal A. Vora ,  David P. Lerner ,  Joseph M. Sullivan ,  Nagasubramanian Gurumoorthy ,  William J. Bowhill ,  Venkatesh Ramamurthy ,  Chris MacNamara ,  John J. Browne ,  Ripan Das

IPC: G06F1/08 ,  G06F1/3203 ,  G06F9/30 ,  G06F9/455 ,  G06F1/324

Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.

公开(公告)号：US20220092154A1

公开(公告)日：2022-03-24

申请号：US17442041

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Katalin Klara Bartfai-Walcott ,  Arkadiusz Berent ,  Vasuki Chilukuri ,  Mark Baldwin ,  Vasudevan Srinivasan ,  Vinila Rose ,  Mariusz Oriol ,  Justyna Chilczuk ,  Bartosz Gotowalski

IPC: G06F21/10 ,  G06Q30/00 ,  H04L9/32 ,  G06Q50/04

Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement and manage software defined silicon products are disclosed. Example semiconductor devices disclosed herein include circuitry configurable to provide one or more features. Disclosed example semiconductor devices also include a license processor to activate or deactivate at least one of the one or more features based on a license received via a network from a first remote enterprise system. Disclosed example semiconductor devices further include an analytics engine to report telemetry data associated with operation of the semiconductor device to at least one of the first remote enterprise system or a second remote enterprise system, the analytics engine to report the telemetry data in response to activation or deactivation of the at least one of the one or more features based on the license.

公开(公告)号：US11137807B2

公开(公告)日：2021-10-05

申请号：US15938291

申请日：2018-03-28

Applicant: Intel Corporation

Inventor： Sandeep Ahuja ,  Nikhil Gupta ,  Vasudevan Srinivasan

IPC: G06F1/20 ,  G06F1/32 ,  G06F1/324 ,  G06F1/3296

Abstract: In one embodiment, a processor includes a non-volatile storage to store a plurality of configurations for the processor, the non-volatile storage including a plurality of entries to store configuration information for the processor for one of the plurality of configurations, the configuration information including at least one of a guaranteed operating frequency and a core count, at least one of the entries to store the core count. The processor further includes a power controller to control the processor to operate at one of the plurality of configurations based at least in part on a selected thermal set point of a plurality of thermal set points of the processor, each of the plurality of thermal set points associated with one of the configurations. Other embodiments are described and claimed.

公开(公告)号：US10229883B2

公开(公告)日：2019-03-12

申请号：US15283364

申请日：2016-10-01

Applicant: Intel Corporation

Inventor： Vasudevan Srinivasan ,  Daniel G. Borkowski

IPC: H01L23/538 ,  G06F12/02 ,  G06F1/26 ,  H01L25/18

Abstract: In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing late fusing of processor features using a non-volatile memory. For instance, there is disclosed in accordance with one embodiment a functional semiconductor package, including: a processor core configurable via a plurality of configuration registers; a non-volatile storage, in which a first portion of the non-volatile storage includes permanently lockable storage that once written cannot be overwritten or modified, and in which a second portion of the non-volatile storage includes the plurality of configuration registers; a first write interface to the non-volatile storage, in which the permanently lockable storage of the non-volatile storage is wirelessly writable externally from the functional semiconductor package via the first write interface; a second write interface to the non-volatile storage through which the plurality of configuration registers are writable; configuration data for the processor core written wirelessly into the permanently lockable storage of the non-volatile storage; and in which the configuration data is distributed into the plurality of configuration registers via the second write interface at every boot of the functional semiconductor package. Other related embodiments are disclosed.

公开(公告)号：US20180098191A1

公开(公告)日：2018-04-05

申请号：US15283348

申请日：2016-10-01

Applicant: Intel Corporation

Inventor： Vasudevan Srinivasan ,  Barnes COOPER ,  Tawfik M. RAHAL-ARABI

IPC: H04W4/02 ,  H04W4/00 ,  H04L12/26

CPC classification number: H04W4/021 ,  H04L43/16 ,  H04W4/38 ,  H04W4/70 ,  H04W4/80

Abstract: Embodiments are generally directed to sharing of environmental data for client device usage. An embodiment of a client device includes a processor; an environmental sensor to sense an environmental condition, an output of the sensor being a local environmental sensor value; and a wireless receiver to receive environmental data for a certain proximity area from a second client device according to an environmental data sharing protocol via a wireless network. The environmental data sharing protocol allows receipt of the environmental data without requiring pairing, bonding, or other relationship of client devices.

公开(公告)号：US20150185795A1

公开(公告)日：2015-07-02

申请号：US14645330

申请日：2015-03-11

Applicant: Intel Corporation

Inventor： Eric Distefano ,  Guy M. Therien ,  Vasudevan Srinivasan ,  Tawfik Rahal-Arabi ,  Venkatesh Ramani ,  Ryan D. Wells ,  Stephen H. Gunther ,  Jeremy Shrall ,  James Hermerding, II

IPC: G06F1/20

CPC classification number: G06F1/3234 ,  G06F1/206 ,  G06F1/26 ,  Y02D10/16

Abstract: A technique to change a thermal design power (TDP) value. In one embodiment, one or more environmental or user-driven changes may cause a processor's TDP value to be changed. Furthermore, in some embodiments a change in TDP may alter a turbo mode target frequency.

Abstract translation: 一种改变热设计功耗（TDP）值的技术。 在一个实施例中，一个或多个环境或用户驱动的改变可以导致处理器的TDP值被改变。 此外，在一些实施例中，TDP的改变可以改变涡轮模式目标频率。

公开(公告)号：US12229269B2

公开(公告)日：2025-02-18

申请号：US17127122

申请日：2020-12-18

Applicant: Intel Corporation

Inventor： Chinmay Ashok ,  Vasudevan Srinivasan ,  Atanas K. Iwanow ,  Martin G. Dixon ,  Scott J. Cape ,  Scott Bobholz ,  David T. Mayo ,  Vinila Rose ,  Lorie Wigle ,  Jason Kennedy

IPC: G06F21/57 ,  G06F21/10 ,  G06F21/44

Abstract: Methods and apparatus for restricted deployment of targeted processor firmware updates. During a patch enabling per-work flow, service entitlement license information comprising one of more service entitlements is generated and provisioned on one or more computing platforms. A restricted deployment microcode (uCode) update release (aka uCode patch) targeted for platforms having CPUs and/or XPUs with certain part identifier is sent to the one or more platforms. Run-time software and/or firmware on the platforms are executed to access the provisioned service entitlement license information, which is used to authentic and verify the restricted deployment uCode update release using a service entitlement having a part identifier associated with the platform's CPU. In one solution, authentication is performed using a hash-matching scheme and verification is used to verify the platform is properly licensed to load uCode included in the restricted deployment microcode (uCode) update release into the CPU.

公开(公告)号：US11972269B2

公开(公告)日：2024-04-30

申请号：US18092163

申请日：2022-12-30

Applicant: Intel Corporation

Inventor： Katalin Klara Bartfai-Walcott ,  Arkadiusz Berent ,  Vasuki Chilukuri ,  Mark Baldwin ,  Vasudevan Srinivasan ,  Bartosz Gotowalski

IPC: G06F9/445 ,  G06F11/30 ,  G06F21/10 ,  G06Q10/087 ,  G06Q30/04 ,  H04L9/32

CPC classification number: G06F9/44505 ,  G06F11/3058 ,  G06F21/105 ,  H04L9/3247 ,  H04L9/3268 ,  H04L9/3278 ,  G06F21/1075 ,  G06Q10/087 ,  G06Q30/04

Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to provide device enhancements for software defined silicon implementations are disclosed. Example non-transitory computer readable medium includes instructions to cause one or more processors to at least generate a first stock keeping unit, associate the first stock keeping unit with a semiconductor device, the first stock keeping unit associated with a first set of features to be provided by the semiconductor device, command the semiconductor device to activate a feature not included in the first set of features to cause the semiconductor device to provide a second set of features, generate a second stock keeping unit for the semiconductor device, and associate the second stock keeping unit with the semiconductor device and the second set of features to be provided by the semiconductor device.

公开(公告)号：US11573830B2

公开(公告)日：2023-02-07

申请号：US17442041

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Katalin Klara Bartfai-Walcott ,  Arkadiusz Berent ,  Vasuki Chilukuri ,  Mark Baldwin ,  Vasudevan Srinivasan ,  Vinila Rose ,  Mariusz Oriol ,  Justyna Chilczuk ,  Bartosz Gotowalski

IPC: G06F9/50 ,  G06F21/73 ,  G06F21/10 ,  G06F21/72 ,  G06Q20/12 ,  G06Q10/10 ,  G06Q30/06 ,  G06Q50/18 ,  H04L9/08 ,  H04L9/32 ,  G06Q30/00 ,  G06Q50/04

Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement and manage software defined silicon products are disclosed. Example semiconductor devices disclosed herein include circuitry configurable to provide one or more features. Disclosed example semiconductor devices also include a license processor to activate or deactivate at least one of the one or more features based on a license received via a network from a first remote enterprise system. Disclosed example semiconductor devices further include an analytics engine to report telemetry data associated with operation of the semiconductor device to at least one of the first remote enterprise system or a second remote enterprise system, the analytics engine to report the telemetry data in response to activation or deactivation of the at least one of the one or more features based on the license.

公开(公告)号：US11169560B2

公开(公告)日：2021-11-09

申请号：US16480830

申请日：2017-02-24

Applicant: INTEL CORPORATION

Inventor： Vasudevan Srinivasan ,  Krishnakanth V. Sistla ,  Corey D. Gough ,  Ian M. Steiner ,  Nikhil Gupta ,  Vivek Garg ,  Ankush Varma ,  Sujal A. Vora ,  David P. Lerner ,  Joseph M. Sullivan ,  Nagasubramanian Gurumoorthy ,  William J. Bowhill ,  Venkatesh Ramamurthy ,  Chris Macnamara ,  John J. Browne ,  Ripan Das

IPC: G06G1/08 ,  G06F1/3203 ,  G06F9/30 ,  G06F9/455 ,  G06F1/324 ,  G06F1/08

Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.