公开(公告)号：US10863618B2

公开(公告)日：2020-12-08

申请号：US16283670

申请日：2019-02-22

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Pei-Wei Wang ,  Bo-Cheng Lin ,  Chun-Hsien Chien ,  Chien-Chou Chen

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/30 ,  H05K3/46 ,  H01Q3/38 ,  H01Q1/24 ,  H01Q1/38 ,  H05K3/02 ,  H05K3/40 ,  H05K1/18

Abstract: A composite substrate structure includes a circuit substrate, a first anisotropic conductive film, a first glass substrate, a dielectric layer, a patterned circuit layer and a conductive via. The first anisotropic conductive film is disposed on the circuit substrate. The first glass substrate is disposed on the first anisotropic conductive film and has a first surface and a second surface opposite to the first surface. The first glass substrate includes a first circuit layer, a second circuit layer and at least one first conductive via. The first circuit layer is disposed on the first surface. The second circuit layer is disposed on the second surface. The first conductive via penetrates the first glass substrate and is electrically connected to the first circuit layer and the second circuit layer. The first glass substrate and the circuit substrate are respectively located on two opposite sides of the first anisotropic conductive film.

公开(公告)号：US11792918B2

公开(公告)日：2023-10-17

申请号：US17455918

申请日：2021-11-21

Applicant: Unimicron Technology Corp.

Inventor： Pei-Wei Wang ,  Heng-Ming Nien ,  Ching-Sheng Chen ,  Yi-Pin Lin ,  Shih-Liang Cheng

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/024 ,  H05K1/0222 ,  H05K1/112

Abstract: A co-axial structure includes a substrate, a first conductive structure, a second conductive structure, and an insulating layer. The substrate includes a first surface. The first conductive structure includes a first circuit deposited on the first surface and a first via penetrating the substrate. The second conductive structure includes a second circuit deposited on the first surface and a second via penetrating the substrate. The first via and the second via extend along a first direction. The first circuit and the second circuit extend along a second direction, and the second direction is perpendicular to the first direction. The insulating layer is located between the first via and the second via. The insulating layer includes a filler. The first conductive structure and the second conductive structure are electrically insulated. The first circuit and the second circuit are coplanar.

公开(公告)号：US11600936B2

公开(公告)日：2023-03-07

申请号：US17322906

申请日：2021-05-18

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Pei-Wei Wang ,  Ching-Ho Hsieh ,  Shao-Chien Lee ,  Kuo-Wei Li

IPC: H05K1/14 ,  H01R12/62 ,  H05K1/02 ,  H05K1/11 ,  H05K1/03 ,  H05K3/00 ,  H05K3/40 ,  H05K3/46

Abstract: A circuit board structure has a first flexible circuit board, a second flexible circuit board, and a rigid board structure. The first flexible circuit board has a first dielectric layer and a first conductive circuit. The second flexible circuit board has a second dielectric layer and a second conductive circuit. The rigid board structure connects the first flexible circuit board and the second flexible circuit board. The rigid board structure has a third dielectric layer and a third conductive circuit. A dielectric loss value of the third dielectric layer is less than that of each of the first dielectric layer and the second dielectric layer. The third conductive circuit is electrically connected to the first and second conductive circuits.

公开(公告)号：US11562972B2

公开(公告)日：2023-01-24

申请号：US17463559

申请日：2021-09-01

Applicant: Unimicron Technology Corp.

Inventor： John Hon-Shing Lau ,  Yu-Chi Shen ,  Tzyy-Jang Tseng ,  Chen-Hua Cheng ,  Pei-Wei Wang

IPC: H01L21/56 ,  H01L23/66 ,  H01L23/31 ,  H01L23/00 ,  H01Q1/22

Abstract: A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.

公开(公告)号：US20210398925A1

公开(公告)日：2021-12-23

申请号：US17463559

申请日：2021-09-01

Applicant: Unimicron Technology Corp.

Inventor： John Hon-Shing Lau ,  Yu-Chi Shen ,  Tzyy-Jang Tseng ,  Chen-Hua Cheng ,  Pei-Wei Wang

IPC: H01L23/66 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01Q1/22

Abstract: A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.

公开(公告)号：US20210202407A1

公开(公告)日：2021-07-01

申请号：US16729488

申请日：2019-12-30

Applicant: Unimicron Technology Corp.

Inventor： John Hon-Shing Lau ,  Yu-Chi Shen ,  Tzyy-Jang Tseng ,  Chen-Hua Cheng ,  Pei-Wei Wang

IPC: H01L23/66 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01Q1/22

Abstract: A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.

公开(公告)号：US20210074606A1

公开(公告)日：2021-03-11

申请号：US16952080

申请日：2020-11-19

Applicant: Unimicron Technology Corp.

Inventor： Pei-Wei Wang ,  Ching Sheng Chen ,  Ra-Min Tain ,  Ming-Hao Wu ,  Hsuan-Wei Chen

IPC: H01L23/373 ,  H01L23/498 ,  H01L21/48

Abstract: A package structure including a circuit board and a heat generating element is provided. The circuit board includes a plurality of circuit layers and a composite material layer. A thermal conductivity of the composite material layer is between 450 W/mK and 700 W/mK. The heat generating element is disposed on the circuit board and electrically connected to the circuit layers. Heat generated by the heat generating element is transmitted to an external environment through the composite material layer.