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    Electron Source
    11.
    发明申请
    Electron Source 审中-公开

    公开(公告)号：US20190049851A1

    公开(公告)日：2019-02-14

    申请号：US16161010

    申请日：2018-10-15

    Applicant: KLA-Tencor Corporation

    Inventor： Yung-Ho Alex Chuang ,  Yinying Xiao-Li ,  Xuefeng Liu ,  John Fielden

    IPC: G03F7/20 ,  H01J37/073 ,  H01J1/34 ,  H01J1/304 ,  H01J35/06

    CPC classification number: G03F7/70008 ,  H01J1/304 ,  H01J1/34 ,  H01J35/065 ,  H01J37/073 ,  H01J2201/30411 ,  H01J2201/3048 ,  H01J2237/0635

    Abstract: An electron source is formed on a silicon substrate having opposing first and second surfaces. At least one field emitter is prepared on the second surface of the silicon substrate to enhance the emission of electrons. To prevent oxidation of the silicon, a thin, contiguous boron layer is disposed directly on the output surface of the field emitter using a process that minimizes oxidation and defects. The field emitter can take various shapes such as pyramids and rounded whiskers. One or several optional gate layers may be placed at or slightly lower than the height of the field emitter tip in order to achieve fast and accurate control of the emission current and high emission currents. The field emitter can be p-type doped and configured to operate in a reverse bias mode or the field emitter can be n-type doped.

    Electron Source
    13.
    发明申请
    Electron Source 审中-公开
    电子源

    公开(公告)号：US20170047207A1

    公开(公告)日：2017-02-16

    申请号：US15234638

    申请日：2016-08-11

    Applicant: KLA-Tencor Corporation

    Inventor： Yung-Ho Alex Chuang ,  Yinying Xiao-Li ,  Xuefeng Liu ,  John Fielden

    IPC: H01J40/06 ,  G03F7/20 ,  H01J37/29 ,  H01J37/285 ,  H01J1/34 ,  H01J35/14

    CPC classification number: G03F7/70008 ,  H01J1/304 ,  H01J1/34 ,  H01J35/065 ,  H01J37/073 ,  H01J2201/30411 ,  H01J2201/3048 ,  H01J2237/0635

    Abstract: An electron source is formed on a silicon substrate having opposing first and second surfaces. At least one field emitter is prepared on the second surface of the silicon substrate to enhance the emission of electrons. To prevent oxidation of the silicon, a thin, contiguous boron layer is disposed directly on the output surface of the field emitter using a process that minimizes oxidation and defects. The field emitter can take various shapes such as pyramids and rounded whiskers. One or several optional gate layers may be placed at or slightly lower than the height of the field emitter tip in order to achieve fast and accurate control of the emission current and high emission currents. The field emitter can be p-type doped and configured to operate in a reverse bias mode or the field emitter can be n-type doped.

    Abstract translation: 在具有相对的第一和第二表面的硅衬底上形成电子源。 在硅衬底的第二表面上制备至少一个场致发射体以增强电子的发射。 为了防止硅的氧化，使用最小化氧化和缺陷的工艺将薄的连续的硼层直接设置在场致发射体的输出表面上。 场发射器可以采取各种形状，例如金字塔和圆形晶须。 一个或几个可选的栅极层可以放置在或稍低于场发射极尖端的高度，以便实现对发射电流和高发射电流的快速和准确的控制。 场发射极可以是p型掺杂的并且被配置为以反偏压模式操作，或者场发射极可以是n型掺杂的。

    Two-wafer MEMS ionization device
    17.
    发明授权
    Two-wafer MEMS ionization device 有权
    双晶片MEMS电离装置

    公开(公告)号：US08779531B2

    公开(公告)日：2014-07-15

    申请号：US13338425

    申请日：2011-12-28

    Applicant: Joseph V. Mantese ,  Antonio M. Vincitore

    Inventor： Joseph V. Mantese ,  Antonio M. Vincitore

    IPC: H01L27/14

    CPC classification number: H01J33/02 ,  G08B17/11 ,  H01J1/3044 ,  H01J9/025 ,  H01J2201/30415 ,  H01J2201/3048

    Abstract: A microelectromechanical system (MEMS) assembly includes at least one emission source; a top wafer having a plurality of side walls and a generally horizontal portion, the horizontal portion having a thickness between a first side and a directly opposed second side, at least one window in the horizontal portion extending between the first and second sides and a transmission membrane across the at least one window; and a bottom wafer having a first portion with a first substantially planar surface, an intermediate surface directly opposed to the first substantially planar surface, a second portion with a second substantially planar surface, the at least one emission source provided on the second substantially planar surface; where the top wafer bonds to the bottom wafer at the intermediate surface and encloses a cavity within the top wafer and the bottom wafer.

    Abstract translation: 微机电系统（MEMS）组件包括至少一个发射源; 具有多个侧壁和大致水平部分的顶部晶片，所述水平部分具有在第一侧和直接相对的第二侧之间的厚度，所述水平部分中的至少一个窗口在所述第一侧和第二侧之间延伸， 膜穿过至少一个窗口; 以及底部晶片，其具有第一部分和第二基本上平坦的表面，与所述第一基本上平坦的表面直接相对的中间表面，具有第二基本平坦表面的第二部分，所述至少一个发射源设置在所述第二基本上平坦的表面上 ; 其中顶部晶片在中间表面处接合到底部晶片并且在顶部晶片和底部晶片内包围空腔。

    TWO-WAFER MEMS IONIZATION DEVICE
    20.
    发明申请
    TWO-WAFER MEMS IONIZATION DEVICE 有权
    双波长MEMS离子化装置

    公开(公告)号：US20130168781A1

    公开(公告)日：2013-07-04

    申请号：US13338425

    申请日：2011-12-28

    Applicant: Joseph V. Mantese ,  Antonio M. Vincitore

    Inventor： Joseph V. Mantese ,  Antonio M. Vincitore

    IPC: H01L29/66 ,  H01L21/02

    CPC classification number: H01J33/02 ,  G08B17/11 ,  H01J1/3044 ,  H01J9/025 ,  H01J2201/30415 ,  H01J2201/3048

    Abstract: A microelectromechanical system (MEMS) assembly includes at least one emission source; a top wafer having a plurality of side walls and a generally horizontal portion, the horizontal portion having a thickness between a first side and a directly opposed second side, at least one window in the horizontal portion extending between the first and second sides and a transmission membrane across the at least one window; and a bottom wafer having a first portion with a first substantially planar surface, an intermediate surface directly opposed to the first substantially planar surface, a second portion with a second substantially planar surface, the at least one emission source provided on the second substantially planar surface; where the top wafer bonds to the bottom wafer at the intermediate surface and encloses a cavity within the top wafer and the bottom wafer.

    Abstract translation: 微机电系统（MEMS）组件包括至少一个发射源; 具有多个侧壁和大致水平部分的顶部晶片，所述水平部分具有在第一侧和直接相对的第二侧之间的厚度，所述水平部分中的至少一个窗口在所述第一侧和第二侧之间延伸， 膜穿过至少一个窗口; 以及底部晶片，其具有第一部分和第二基本上平坦的表面，与所述第一基本上平坦的表面直接相对的中间表面，具有第二基本平坦表面的第二部分，所述至少一个发射源设置在所述第二基本上平坦的表面上 ; 其中顶部晶片在中间表面处接合到底部晶片并且在顶部晶片和底部晶片内包围空腔。

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