Abstract:
According to one embodiment, an electron emitting element includes a first region, a second region, and a third region. The first region includes a semiconductor including a first element of an n-type impurity. The second region includes diamond. The diamond includes a second element including at least one selected from the group consisting of nitrogen, phosphorous, arsenic, antimony, and bismuth. The third region is provided between the first region and the second region. The third region includes Alx1Ga1-x1N (0
Abstract:
A semiconductor power handling device, includes a cathode pillar, a gate surrounding the cathode pillar, and an anode spaced from the cathode by a nano-vacuum gap. An array of semiconductor power handling devices, each comprising a cathode pillar, a gate surrounding the cathode pillar, and an anode spaced from the cathode pillar by a nano-vacuum gap. The semiconductor power handling devices can be arranged as rows and columns and can be interconnected to meet the requirements of various applications. The array of power handling devices can be fabricated on a single substrate.
Abstract:
A horizontal multilayer junction-edge field emitter includes a plurality of vertically-stacked multilayer structures separated by isolation layers. Each multilayer structure is configured to produce a 2-dimensional electron gas at a junction between two layers within the structure. The emitter also includes an exposed surface intersecting the 2-dimensional electron gas of each of the plurality of vertically-stacked multilayer structures to form a plurality of effectively one-dimensional horizontal line sources of electron emission.
Abstract:
In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.
Abstract:
Some embodiments of vacuum electronics call for nanoscale field-enhancing geometries. Methods and apparatus for using nanoparticles to fabricate nanoscale field-enhancing geometries are described herein. Other embodiments of vacuum electronics call for methods of controlling spacing between a control grid and an electrode on a nano- or micron-scale, and such methods are described herein.
Abstract:
Some embodiments of vacuum electronics call for nanoscale field-enhancing geometries. Methods and apparatus for using nanoparticles to fabricate nanoscale field-enhancing geometries are described herein. Other embodiments of vacuum electronics call for methods of controlling spacing between a control grid and an electrode on a nano- or micron-scale, and such methods are described herein.
Abstract:
A horizontal multilayer junction-edge field emitter includes a plurality of vertically-stacked multilayer structures separated by isolation layers. Each multilayer structure is configured to produce a 2-dimensional electron gas at a junction between two layers within the structure. The emitter also includes an exposed surface intersecting the 2-dimensional electron gas of each of the plurality of vertically-stacked multilayer structures to form a plurality of effectively one-dimensional horizontal line sources of electron emission.
Abstract:
An electron emission source includes a first electrode, a semiconductor layer, an insulating layer, and a second electrode stacked in that sequence, wherein an electron collection layer is sandwiched between the semiconductor layer and the insulating layer, the electron collection layer is in contact with the semiconductor layer and the insulating layer, and the electron collection layer is a conductive layer to collect electrons.
Abstract:
An electron emission device includes a number of electron emission units spaced from each other, wherein each of the number of electron emission units includes a first electrode, a semiconductor layer, an insulating layer, and a second electrode stacked with each other, the first electrode includes a carbon nanotube layer, a number of holes defines in the semiconductor layer, and a portion of the carbon nanotube layer suspended on the number of holes.
Abstract:
A semiconductor photocathode includes an AlXGa1-XN layer (0≦X
Abstract translation:半导体光电阴极包括通过SiO 2层和形成在AlXGa1-XN层上的含碱金属的层结合到玻璃基板上的Al x Ga 1-x N层(0&lt; nlE; X <1)。 AlXGa1-XN层包括第一区域,第二区域,第一区域和第二区域之间的中间区域。 第二区域具有通过交替层叠阻挡层和阱层而形成的半导体超晶格结构,中间区域具有通过交替层压阻挡层和阱层而形成的半导体超晶格结构。 当一对相邻的阻挡层和阱层被定义为单位部分时,单位部分中Al的组成比X的平均值随着距离第二区域和SiO 2层之间的界面位置的距离而至少在 中间区域。