公开(公告)号：US20130256023A1

公开(公告)日：2013-10-03

申请号：US13853534

申请日：2013-03-29

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Eung Soo Kim

IPC: H05K3/10 ,  H05K1/11 ,  H05K1/02

CPC classification number: H05K3/10 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K1/02 ,  H05K1/111 ,  H05K1/113 ,  H05K3/108 ,  H05K3/4644 ,  H05K2201/09436 ,  H05K2201/09827 ,  Y02P70/611 ,  Y10T156/1062 ,  H01L2924/00

Abstract: Disclosed herein is a printed circuit board, including: a base substrate having an outer layer circuit; an insulating layer formed partially on the base substrate; and a circuit layer formed on the insulating layer.

Abstract translation: 这里公开了一种印刷电路板，包括：具有外层电路的基底基板; 绝缘层，部分地形成在所述基底基板上; 以及形成在所述绝缘层上的电路层。

公开(公告)号：US08487432B2

公开(公告)日：2013-07-16

申请号：US12907430

申请日：2010-10-19

Applicant: Glenn A. Rinne ,  J. Daniel Mis

Inventor： Glenn A. Rinne ,  J. Daniel Mis

IPC: H01L23/48

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05178 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05557 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/062 ,  H05K3/243 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2203/054 ,  H05K2203/0723 ,  H01L2924/00014 ,  H01L2924/013

Abstract: An electronic device may include a substrate, a seed layer on the substrate, a barrier layer on the seed layer opposite the substrate, and an oxidation barrier on the barrier layer opposite the seed layer. The barrier layer and the seed layer comprise different materials, and the oxidation barrier and the barrier layer may comprise different materials. The seed layer may be undercut relative to the barrier layer and/or relative to the oxidation barrier so that the barrier layer and/or the oxidation barrier define a lip extending beyond the seed layer in a direction parallel with respect to a surface of the substrate. Related methods are also discussed.

Abstract translation: 电子器件可以包括衬底，衬底上的种子层，与衬底相对的种子层上的阻挡层以及与种子层相对的阻挡层上的氧化屏障。 阻挡层和种子层包含不同的材料，氧化屏障和阻挡层可以包括不同的材料。 种子层可以相对于阻挡层和/或相对于氧化屏障而被切削，使得阻挡层和/或氧化屏障在相对于衬底的表面平行的方向上限定延伸超过种子层的唇缘 。 还讨论了相关方法。

公开(公告)号：US08302298B2

公开(公告)日：2012-11-06

申请号：US12835085

申请日：2010-07-13

Applicant: Chen-Yueh Kung ,  Wei-Cheng Chen

Inventor： Chen-Yueh Kung ,  Wei-Cheng Chen

IPC: H01K3/10

CPC classification number: H05K3/4007 ,  H05K3/0035 ,  H05K3/108 ,  H05K3/421 ,  H05K2201/0367 ,  H05K2201/0376 ,  H05K2201/09436 ,  H05K2201/09545 ,  H05K2203/308 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A process for fabricating a circuit substrate is provided. A patterned conductive layer having an inner pad is provided on a base layer, a dielectric layer is disposed on the base layer and covers the patterned conductive layer, and a covering layer is disposed on the dielectric layer. A part of the covering layer is removed by dry etching to form a first opening. A part of the dielectric layer exposed by the first opening is removed to form a dielectric opening exposing a part of the inner pad. A patterned mask having a second opening to expose a part of the inner pad is formed on the covering layer. A conductive structure including a conductive block filling the dielectric opening, an outer pad filling the first opening and a surplus layer filling the second opening is formed. Finally, the patterned mask, surplus layer and covering layer are removed.

Abstract translation: 提供了一种用于制造电路基板的工艺。 具有内垫的图案化导电层设置在基底层上，电介质层设置在基底层上并覆盖图案化的导电层，并且覆盖层设置在电介质层上。 通过干蚀刻去除覆盖层的一部分以形成第一开口。 去除由第一开口暴露的电介质层的一部分，以形成暴露一部分内垫的电介质开口。 在覆盖层上形成具有第二开口以露出内部衬垫的一部分的图案化掩模。 形成包括填充电介质开口的导电块，填充第一开口的外垫和填充第二开口的剩余层的导电结构。 最后，去除图案化掩模，剩余层和覆盖层。

公开(公告)号：US20120267155A1

公开(公告)日：2012-10-25

申请号：US13543547

申请日：2012-07-06

Applicant: Chen-Yueh Kung

Inventor： Chen-Yueh Kung

IPC: H05K1/11

CPC classification number: H05K3/4007 ,  H01L2924/0002 ,  H05K3/0035 ,  H05K3/062 ,  H05K3/108 ,  H05K3/243 ,  H05K3/28 ,  H05K3/421 ,  H05K2201/0367 ,  H05K2201/0376 ,  H05K2201/09436 ,  H05K2201/09545 ,  H05K2203/0361 ,  H05K2203/0554 ,  H05K2203/0574 ,  H05K2203/1152 ,  H05K2203/308 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A circuit substrate includes a base layer, a patterned conductive layer, a dielectric layer, an outer pad and a conductive block. The patterned conductive layer is disposed on the base layer and has an inner pad. The dielectric layer is disposed on the base layer and covers the patterned conductive layer. The outer pad is disposed on the dielectric layer. The conductive layer is passed through the dielectric layer and connected between the outer pad and the inner pad, wherein the outer pad and the conductive block are formed as an integrative unit, and an outer diameter of the outer pad is substantially equal to an outer diameter of the conductive block.

Abstract translation: 电路基板包括基底层，图案化导电层，电介质层，外部焊盘和导电块。 图案化导电层设置在基底层上并具有内部衬垫。 电介质层设置在基底层上并覆盖图案化的导电层。 外垫设置在电介质层上。 导电层通过电介质层并连接在外焊盘和内焊盘之间，其中外焊盘和导电块形成为整体单元，外焊盘的外径基本上等于外焊盘 的导电块。

公开(公告)号：US20120175265A1

公开(公告)日：2012-07-12

申请号：US13426461

申请日：2012-03-21

Applicant: Sao-Hsia Tang ,  Ying-Tung Wang

Inventor： Sao-Hsia Tang ,  Ying-Tung Wang

IPC: H05K3/00 ,  C25D5/02

CPC classification number: H05K3/3452 ,  H01L23/49811 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/13017 ,  H01L2224/13018 ,  H05K3/243 ,  H05K3/3473 ,  H05K3/3484 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2203/054 ,  H05K2203/0577 ,  H05K2203/0594 ,  Y10T29/49124 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01024

Abstract: A circuit board surface structure and a fabrication method thereof are proposed. The circuit board surface structure includes: a circuit board having a plurality of electrically connecting pads formed on at least one surface thereof; a first and a second insulating protective layers formed on the surface of the circuit board in sequence; first and a second openings respectively formed in the first and second insulating protective layers to expose the electrically connecting pads on the surface of the circuit board, wherein the first and second openings have narrow top and wide bottom and the diameter of the first openings is bigger than that of the second openings; and conductive elements formed in the first and second openings on surfaces of the electrically connecting pads. The present structure facilitates to strengthen the bonding between the conductive elements and the corresponding electrically connecting pads.

Abstract translation: 提出了一种电路板表面结构及其制造方法。 电路板表面结构包括：具有形成在其至少一个表面上的多个电连接焊盘的电路板; 依次形成在电路板的表面上的第一和第二绝缘保护层; 分别形成在第一和第二绝缘保护层中的第一和第二开口以暴露电路板表面上的电连接焊盘，其中第一和第二开口具有窄的顶部和宽底部，并且第一开口的直径较大 比第二个开口; 以及形成在电连接焊盘的表面上的第一和第二开口中的导电元件。 本结构有助于加强导电元件与相应的电连接焊盘之间的接合。

公开(公告)号：US08218333B2

公开(公告)日：2012-07-10

申请号：US12401247

申请日：2009-03-10

Applicant: Masato Udaka ,  Seiji Tokii

Inventor： Masato Udaka ,  Seiji Tokii

IPC: H05K1/18

CPC classification number: H05K3/3436 ,  H01R12/523 ,  H05K1/113 ,  H05K2201/09381 ,  H05K2201/09436 ,  H05K2201/09509 ,  H05K2201/09572 ,  Y02P70/613 ,  Y10T29/49213

Abstract: The present invention provides a printed circuit board capable of sufficiently ensuring joint strength and joint reliability when mounting a surface mounted device, and a mounting structure for a surface mounted device using the printed circuit board. A BGA package as a surface mounted device includes a plurality of solder balls arranged thereon and a printed circuit board includes a plurality of mounting pads corresponding respectively to the plurality of solder balls. The BGA package is connected to the mounting pads on the printed circuit board due to melting of the solder balls, thereby mounted on the printed circuit board. A concave via hole is formed on each of the mounting pads having a circular surface shape and a part of the solder ball is in the convex via hole. Here, the center of the convex via hole is apart from the center of each of the mounting pads by at least the diameter of the concave via hole.

Abstract translation: 本发明提供了一种印刷电路板，其能够在安装表面安装装置时足以确保接合强度和接头可靠性，以及使用印刷电路板的表面安装装置的安装结构。 作为表面安装器件的BGA封装包括布置在其上的多个焊球，并且印刷电路板包括分别对应于多个焊球的多个安装焊盘。 BGA封装由于焊球的熔化而连接到印刷电路板上的安装焊盘，从而安装在印刷电路板上。 在具有圆形表面形状的每个安装焊盘上形成凹通孔，并且焊球的一部分在凸通孔中。 这里，凸通孔的中心至少与凹通孔的直径相距离每个安装焊盘的中心。

公开(公告)号：US20120060368A1

公开(公告)日：2012-03-15

申请号：US13301812

申请日：2011-11-22

Applicant: Cheng-Po Yu ,  Han-Pei Huang

Inventor： Cheng-Po Yu ,  Han-Pei Huang

IPC: H05K3/22

CPC classification number: H05K1/11 ,  H05K1/0284 ,  H05K1/142 ,  H05K3/185 ,  H05K3/4007 ,  H05K3/4661 ,  H05K2201/0236 ,  H05K2201/09045 ,  H05K2201/09118 ,  H05K2201/09163 ,  H05K2201/09436 ,  H05K2201/09509 ,  H05K2201/09845 ,  H05K2203/1327 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T428/24802 ,  Y10T428/24917

Abstract: A method of fabrication a circuit board structure comprising providing a circuit board main body, forming a molded, irregular plastic body having a non-plate type, stereo structure and at least one scraggy surface by encapsulating at least a portion of said circuit board main body with injection molded material, and forming a first three-dimensional circuit pattern on said molded, irregular plastic body thereby defining a three-dimensional circuit device.

Abstract translation: 一种制造电路板结构的方法，包括提供电路板主体，通过封装所述电路板主体的至少一部分来形成具有非板型，立体结构和至少一个刮痕表面的模制的不规则塑料体 并且在所述模制的不规则塑料体上形成第一三维电路图案，从而限定三维电路装置。

公开(公告)号：US20110205716A1

公开(公告)日：2011-08-25

申请号：US13127314

申请日：2008-07-01

Applicant: Hiroyuki Moriwaki

Inventor： Hiroyuki Moriwaki

IPC: H05K1/18 ,  H05K1/02

CPC classification number: H05K3/361 ,  H01L23/49811 ,  H01L27/0203 ,  H01L27/12 ,  H01L27/124 ,  H01L2924/0002 ,  H01L2924/14 ,  H05K1/025 ,  H05K1/113 ,  H05K3/323 ,  H05K2201/09227 ,  H05K2201/09409 ,  H05K2201/09436 ,  H05K2201/10128 ,  H01L2924/00

Abstract: Provided is a circuit substrate that affords a narrower frame in display devices or the like, while suppressing connection faults between wirings and external connection terminals. The invention is a circuit substrate having a substrate, on top of which wiring, an insulating film and an external connection terminal are disposed in order. The circuit substrate is provided with an anisotropic conductive film, having conductive particles, on the external connection terminal; and the external connection terminal is connected to the wiring via at least one contact hole formed in the insulating film, with the length from one end to the other end, in a plan view, of a region formed with one or more contact holes that connect to a specific external connection terminal being greater than the diameter of each of the conductive particles.

Abstract translation: 提供了一种在抑制布线和外部连接端子之间的连接故障的同时在显示装置等中提供较窄帧的电路基板。 本发明是具有基板的电路基板，其上布置有布线，绝缘膜和外部连接端子。 电路基板在外部连接端子上设置有具有导电粒子的各向异性导电膜; 并且所述外部连接端子经由形成在所述绝缘膜中的至少一个接触孔连接到所述布线，所述至少一个接触孔的长度从一端到另一端在平面图中形成有形成有一个或多个接触孔的区域 到特定的外部连接端子大于每个导电颗粒的直径。

公开(公告)号：US20110174527A1

公开(公告)日：2011-07-21

申请号：US13002189

申请日：2009-06-30

Applicant: Masayuki Nagamatsu ,  Ryosuke Usui ,  Kiyoshi Shibata

Inventor： Masayuki Nagamatsu ,  Ryosuke Usui ,  Kiyoshi Shibata

IPC: H05K1/11 ,  H01L23/488 ,  H05K3/34 ,  H01L21/58 ,  H05K3/10

CPC classification number: H05K1/112 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/12 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L27/14618 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1058 ,  H01L2924/014 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/09436 ,  H05K2201/09563 ,  H05K2201/10734 ,  Y10T29/4916 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device is of a PoP structure such that first electrode portions provided in a first semiconductor module and second electrode portions provided in a second semiconductor module are joined together by solder balls. The first electrode has a first conductor having the same thickness as that of a wiring layer provided in an insulating layer, a second conductor formed on the first conductor, a gold plating layer provided on the second conductor.

Abstract translation: 半导体器件具有PoP结构，使得设置在第一半导体模块中的第一电极部分和设置在第二半导体模块中的第二电极部分通过焊球接合在一起。 第一电极具有与设置在绝缘层中的布线层相同厚度的第一导体，形成在第一导体上的第二导体，设置在第二导体上的镀金层。

公开(公告)号：US20110108982A1

公开(公告)日：2011-05-12

申请号：US12835043

申请日：2010-07-13

Applicant: Seong Cheol Kim ,  Chang Jun Park

Inventor： Seong Cheol Kim ,  Chang Jun Park

IPC: H01L23/488 ,  H05K1/11 ,  H05K1/09

CPC classification number: H01L23/488 ,  H01L24/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/3511 ,  H05K1/111 ,  H05K1/112 ,  H05K3/3436 ,  H05K2201/0191 ,  H05K2201/09136 ,  H05K2201/094 ,  H05K2201/09436 ,  H05K2201/09736 ,  Y02P70/613

Abstract: A printed circuit board includes a body part formed with connection pads on a first surface thereof; and a warpage compensating part formed over the first surface of the body part and having a height that increases from edges toward a center of the warpage compensating part so that an upper surface of the warpage compensating part facing away from the first surface of the body part is convex upward. The warpage compensating part comprises conductive layer patterns formed over the first surface of the body part to be electrically connected to the connection pads; and a solder resist formed over the first surface of the body part so as to expose the conductive layer patterns. The height of the solder resist gradually increases from both edges toward a center of the solder resist.

Abstract translation: 印刷电路板包括在其第一表面上形成有连接焊盘的主体部分; 以及翘曲补偿部，其形成在主体部的第一表面上，并且具有从边缘朝向翘曲补偿部的中心增大的高度，使得翘曲补偿部的上表面背离主体部的第一表面 向上凸起 翘曲补偿部分包括形成在主体部分的第一表面上以电连接到连接焊盘的导电层图案; 以及形成在主体部分的第一表面上的阻焊剂，以暴露导电层图案。 阻焊剂的高度从阻焊层的两个边缘向中心逐渐增加。