公开(公告)号：US20090310320A1

公开(公告)日：2009-12-17

申请号：US12214006

申请日：2008-06-16

Applicant: Weston Roth ,  Kevin Byrd ,  Damion Searls ,  James D. Jackson

Inventor： Weston Roth ,  Kevin Byrd ,  Damion Searls ,  James D. Jackson

IPC: H05K7/06 ,  H05K3/34

CPC classification number: H05K3/3484 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/15311 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/10719 ,  H05K2201/10992 ,  H05K2203/043 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A standoff contact array is disposed between a mounting substrate of a flip-chip package and a board. The standoff contact array is formable by mating a low-profile solder bump on the mounting substrate with a low-profile solder paste on the board. Thereafter, the standoff contact array is formed by reflowing the low-profile solder paste on the board against the low-profile solder bump on the mounting substrate.

Abstract translation: 间隔接触阵列设置在倒装芯片封装的安装基板和基板之间。 通过将安装基板上的低轮廓焊料凸块与板上的低轮廓焊膏配合，可以形成对位接触阵列。 此后，通过将板上的低轮廓焊膏回流到安装基板上的低轮廓焊料凸块上来形成间隔接触阵列。

公开(公告)号：US07545028B2

公开(公告)日：2009-06-09

申请号：US11818665

申请日：2007-06-14

Applicant: Leilei Zhang

Inventor： Leilei Zhang

IPC: H01L23/02

CPC classification number: H01L23/49816 ,  H01L21/4853 ,  H01L2924/0002 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/3463 ,  H05K3/3484 ,  H05K2201/10992 ,  H05K2203/043 ,  H05K2203/0577 ,  Y02P70/613 ,  H01L2924/00

Abstract: Solder ball assembly for a semiconductor device and method of fabricating the same is described. In one example, a solder mask is formed on a substrate having an aperture exposing at least a portion of a conductive pad of the substrate. A solder pillar is formed in the aperture and in electrical communication with the conductive pad. An insulating layer is formed on the solder mask exposing at least a portion of the solder pillar. The exposed portion of the solder pillar is removed to define a mounting surface. A solder ball is formed on the mounting surface in electrical communication with the solder pillar. The solder pillar may include high-temperature solder having a melting point higher than that of the solder ball.

Abstract translation: 描述了用于半导体器件的焊球组件及其制造方法。 在一个示例中，在具有暴露基板的导电焊盘的至少一部分的孔的基板上形成焊料掩模。 焊盘在孔中形成并与导电焊盘电连通。 在焊料掩模上形成绝缘层，露出至少一部分焊料柱。 去除焊料柱的暴露部分以限定安装表面。 在与支柱电连通的安装表面上形成焊球。 焊料柱可以包括熔点高于焊料球的熔点的高温焊料。

公开(公告)号：US20090014896A1

公开(公告)日：2009-01-15

申请号：US12216850

申请日：2008-07-11

Applicant: Shih-Ping Hsu

Inventor： Shih-Ping Hsu

IPC: H01L23/52

CPC classification number: H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H05K3/3436 ,  H05K2201/10234 ,  H05K2201/10977 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: A flip-chip package structure is disclosed, which comprises: a packaging substrate having an upper surface and a plurality of conductive pads formed on the upper surface; a semiconductor chip having an active surface and a plurality of electrode pads formed on the active surface; and a plurality of first solder bumps; wherein each first solder bump connects to an electrode pad and a conductive pad, and each first solder bump contains a solid grain.

Abstract translation: 公开了一种倒装芯片封装结构，其包括：具有上表面和形成在上表面上的多个导电焊盘的封装基板; 具有活性表面的半导体芯片和形成在所述有源表面上的多个电极焊盘; 和多个第一焊料凸块; 其中每个第一焊料凸块连接到电极焊盘和导电焊盘，并且每个第一焊料凸块包含固体颗粒。

公开(公告)号：US20080173698A1

公开(公告)日：2008-07-24

申请号：US11873838

申请日：2007-10-17

Applicant: Michael T. Marczi ,  Paul Koep ,  Michel A. de Monchy ,  Martinus N. Finke ,  Brian Lewis

Inventor： Michael T. Marczi ,  Paul Koep ,  Michel A. de Monchy ,  Martinus N. Finke ,  Brian Lewis

IPC: B23K31/02 ,  B23K26/00

CPC classification number: H05K3/3484 ,  B23K35/262 ,  B23K35/264 ,  B23K35/302 ,  H01L23/3736 ,  H01L24/83 ,  H01L31/02008 ,  H01L31/048 ,  H01L2224/8181 ,  H01L2224/81825 ,  H01L2224/83224 ,  H01L2224/83801 ,  H01L2224/8381 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/13055 ,  H05K3/341 ,  H05K3/3463 ,  H05K2201/0209 ,  H05K2201/068 ,  H05K2201/10992 ,  H05K2203/0415 ,  Y02E10/50 ,  Y02P70/613 ,  H01L2924/3512 ,  H01L2924/00

Abstract: Certain examples disclosed herein are directed to materials that are designed for use in interconnects of electrical devices such as, for example, printed circuit boards and solar cells. In certain examples, a two-step solder may be used to reduce stresses on the materials used in the production of the electrical devices.

Abstract translation: 本文公开的某些实例涉及被设计用于诸如印刷电路板和太阳能电池的电气设备的互连中的材料。 在某些实例中，可以使用两步焊料来减少用于电气设备生产中的材料的应力。

公开(公告)号：US07357293B2

公开(公告)日：2008-04-15

申请号：US10808192

申请日：2004-03-24

Applicant: Daewoong Suh

Inventor： Daewoong Suh

IPC: B23K31/02

CPC classification number: H05K3/3436 ,  H05K3/3463 ,  H05K2201/10992 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147

Abstract: In some example embodiments, a method includes engaging a first contact on a motherboard with a second contact on an electronic package. A portion of one of the first and second contacts is covered with an interlayer that has a lower melting temperature than both of the first and second contacts. The method further includes bonding the first contact to the second contact by melting the interlayer to diffuse the interlayer into the first and second contacts. The bonded first and second contacts have a higher melting temperature than the interlayer before melting. In other example embodiments, an electronic assembly includes a motherboard having a first contact that is bonded to a second contact on an electronic package. An interlayer is diffused within the first and second contacts such that they have a higher melting temperature than the interlayer before the interlayer is diffused into the first and second contacts.

Abstract translation: 在一些示例性实施例中，一种方法包括使主板上的第一触点与电子封装上的第二触点接合。 第一和第二触点之一的一部分被中间层覆盖，该中间层具有比第一和第二触点两者更低的熔化温度。 该方法还包括通过熔化中间层将第一接触件接合到第二接触件，以将中间层扩散到第一和第二接触件中。 接合的第一和第二触点在熔融之前具有比中间层更高的熔融温度。 在其他示例性实施例中，电子组件包括具有接合到电子封装上的第二触点的第一触点的母板。 中间层在第一和第二触点内扩散，使得它们在中间层扩散到第一和第二触点之前具有比中间层更高的熔化温度。

公开(公告)号：US07351074B2

公开(公告)日：2008-04-01

申请号：US11542260

申请日：2006-10-04

Applicant: Ted Ju

Inventor： Ted Ju

IPC: H01R12/00

CPC classification number: H01R12/57 ,  H01R12/707 ,  H01R13/2442 ,  H05K1/113 ,  H05K3/0094 ,  H05K3/3421 ,  H05K3/3452 ,  H05K3/3463 ,  H05K2201/10189 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/0455 ,  H05K2203/1394 ,  Y02P70/613

Abstract: An improved structure of circuit board, according to the present invention, involves sealing a conductive passageway on a circuit board by use of a spacer disposed in a solder paste. A welding pad is disposed on the conductive passageway so that an electrical terminal is capable of being soldered into the conductive passageway directly. The improved structure of circuit board is capable of stopping the solder paste from entering into the conductive passageway, thus shortening the electrical wiring pathway between the electrical terminal and the circuit board effectively, so as to improve the electrical conductivity between the electrical terminal and the printed circuit board.

Abstract translation: 根据本发明的电路板的改进的结构包括通过使用设置在焊膏中的间隔件将导电通道密封在电路板上。 焊垫设置在导电通道上，使得电端子能够直接焊接到导电通道中。 电路板的改进结构能够阻止焊膏进入导电通道，从而有效地缩短电端子和电路板之间的电气布线路径，从而提高电端子与印刷电路之间的导电性 电路板。

公开(公告)号：US20070249186A1

公开(公告)日：2007-10-25

申请号：US11542260

申请日：2006-10-04

Applicant: Ted Ju

Inventor： Ted Ju

IPC: H01R12/00

CPC classification number: H01R12/57 ,  H01R12/707 ,  H01R13/2442 ,  H05K1/113 ,  H05K3/0094 ,  H05K3/3421 ,  H05K3/3452 ,  H05K3/3463 ,  H05K2201/10189 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/0455 ,  H05K2203/1394 ,  Y02P70/613

Abstract: An improved structure of circuit board, according to the present invention, involves sealing a conductive passageway on a circuit board by use of a spacer disposed in a solder paste. A welding pad is disposed on the conductive passageway so that an electrical terminal is capable of being soldered into the conductive passageway directly. The improved structure of circuit board is capable of stopping the solder paste from entering into the conductive passageway, thus shortening the electrical wiring pathway between the electrical terminal and the circuit board effectively, so as to improve the electrical conductivity between the electrical terminal and the printed circuit board.

Abstract translation: 根据本发明的电路板的改进的结构包括通过使用设置在焊膏中的间隔件将导电通道密封在电路板上。 焊垫设置在导电通道上，使得电端子能够直接焊接到导电通道中。 电路板的改进结构能够阻止焊膏进入导电通道，从而有效地缩短电端子和电路板之间的电气布线路径，从而提高电端子与印刷电路之间的导电性 电路板。

公开(公告)号：US07253808B2

公开(公告)日：2007-08-07

申请号：US10701638

申请日：2003-11-06

Applicant: Hee Jung Hong

Inventor： Hee Jung Hong

IPC: G09G5/00

CPC classification number: H05K3/361 ,  G06F3/045 ,  G06F3/0488 ,  H05K3/323 ,  H05K3/403 ,  H05K2201/09172 ,  H05K2201/10992

Abstract: A touch screen system includes a touch panel to input image signals, a touch controller to drive the touch panel, an extension between the touch panel and the touch controller, and an anisotropic conductive film electrically interconnecting the extension to the touch controller.

Abstract translation: 触摸屏系统包括用于输入图像信号的触摸面板，用于驱动触摸面板的触摸控制器，触摸面板和触摸控制器之间的延伸部分，以及使延伸部与触摸控制器电连接的各向异性导电膜。

公开(公告)号：US07205659B2

公开(公告)日：2007-04-17

申请号：US10777804

申请日：2004-02-12

Applicant: Masud Beroz ,  David Light

Inventor： Masud Beroz ,  David Light

IPC: H01L23/48

CPC classification number: H01L24/81 ,  H01L2224/13111 ,  H01L2224/13609 ,  H01L2224/81801 ,  H01L2224/81907 ,  H01L2224/9205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2201/10992 ,  H05K2203/162 ,  H05K2203/176 ,  Y02P70/613 ,  H01L2924/00

Abstract: A microelectronic assembly includes a first microelectronic element having a contact bearing face and at least one contact accessible at the contact bearing face, and a second microelectronic element opposing the first microelectronic element, the second microelectronic element having a first surface including at least one lead extending over the first surface. The microelectronic assembly includes the first fusible material engaging the at least one contact of the first microelectronic element, and a second fusible material engaging the at least one lead, whereby one of the first and second fusible materials has a higher melting temperature and one of the first and second fusible materials has a lower melting temperature. The first and second microelectronic elements are juxtaposed with one another so that the first and second fusible materials are in substantial alignment with one another, with one of the first and second fusible materials in a liquid state and one of the first and second fusible materials in a solid state.

Abstract translation: 微电子组件包括第一微电子元件，其具有接触支承面和在接触支承面处可访问的至少一个触点，以及与第一微电子元件相对的第二微电子元件，第二微电子元件具有第一表面，第一表面包括至少一个引线延伸 在第一个表面。 微电子组件包括与第一微电子元件的至少一个触点接合的第一可熔材料和与该至少一个引线接合的第二可熔材料，其中第一和第二熔融材料之一具有较高的熔化温度， 第一和第二可熔材料具有较低的熔化温度。 第一和第二微电子元件彼此并置，使得第一和第二可熔材料彼此基本对齐，其中第一和第二可熔材料中的一个处于液体状态，第一和第二可熔材料中的一个在 固态。

公开(公告)号：US20060186519A1

公开(公告)日：2006-08-24

申请号：US11334106

申请日：2006-01-17

Applicant: Taizo Inoue ,  Kenzo Kitazaki ,  Hisashi Shigetani ,  Eiji Mugiya

Inventor： Taizo Inoue ,  Kenzo Kitazaki ,  Hisashi Shigetani ,  Eiji Mugiya

IPC: H01L23/02

CPC classification number: H05K3/3436 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05568 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/14 ,  H05K3/3463 ,  H05K2201/10992 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: A semiconductor device comprises columnar electrodes including columnar portions and ball-shaped low-melting point layers joined to the top surfaces of columnar portions. The amount of plating of the low-melting point layer and the cross-sectional area of the columnar portion are adjusted in such a way that the relationship represented by A≦1.3×B1.5 is satisfied, where the volume of each of the low-melting point layers is represented by A and the area of the top surface of each of the columnar portions is represented by B. Consequently, the low-melting point layer is prevented from trickling on a side surface of the columnar portion during formation of the ball by reflow of the low-melting point layer.

Abstract translation: 半导体器件包括柱形电极，其包括柱状部分和与柱状部分的顶表面接合的球形低熔点层。 调节低熔点层的镀层量和柱状部分的横截面积，使得满足由A <= 1.3×B <1.5>所表示的关系，其中 每个低熔点层的体积由A表示，并且每个柱状部分的顶表面的面积用B表示。因此，防止低熔点层在 通过低熔点层的回流而在球形成期间的柱状部分。