公开(公告)号：US20070245554A1

公开(公告)日：2007-10-25

申请号：US11769321

申请日：2007-06-27

Applicant: Peter Salmon

Inventor： Peter Salmon

IPC: H05K3/10

CPC classification number: H05K3/363 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/5386 ,  H01L23/5387 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/05573 ,  H01L2224/11332 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/81052 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3651 ,  H05K1/0289 ,  H05K1/115 ,  H05K3/007 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/4015 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/0568 ,  Y02P70/613 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/05599

Abstract: This specification describes techniques for manufacturing an electronic system module. The module includes flexible multi-layer interconnection circuits with trace widths as narrow as 5 microns or less. A glass panel manufacturing facility, similar to those employed for making liquid crystal display, LCD, panels is preferably used to fabricate the interconnection circuits. A multi-layer interconnection circuit is fabricated on the glass panel using a release layer. A special assembly layer is formed over the interconnection circuit comprising a thick dielectric layer with openings formed at input/output (I/O) pad locations. Solder paste is deposited in the openings using a squeegee to form wells filled with solder. IC chips are provided with gold stud bumps at I/O pad locations, and these bumps are inserted in the wells to form flip chip connections. The IC chips are tested and reworked. The same bump/well connections can be used to attach fine-pitch cables. Module packaging layers are provided for hermetic sealing and for electromagnetic shielding. A blade server or supercomputer embodiment is also described.

Abstract translation: 本说明书描述了用于制造电子系统模块的技术。 该模块包括具有窄至5微米或更小的迹线宽度的柔性多层互连电路。 与用于制造液晶显示器，LCD，面板的玻璃面板制造设备相似，优选地用于制造互连电路。 使用剥离层在玻璃面板上制造多层互连电路。 在互连电路上形成特殊的组装层，该电路包括在输入/输出（I / O）焊盘位置处形成有开口的厚电介质层。 使用刮刀将焊膏沉积在开口中以形成填充有焊料的孔。 IC芯片在I / O焊盘位置处设有金柱凸起，并且这些凸块插入孔中以形成倒装芯片连接。 IC芯片经过测试和返工。 相同的凹凸/连接可用于连接细间距电缆。 提供模块封装层用于密封和电磁屏蔽。 还描述了刀片服务器或超级计算机实施例。

公开(公告)号：US20070228336A1

公开(公告)日：2007-10-04

申请号：US11693779

申请日：2007-03-30

Applicant: Tsutomu UCHIMI ,  Masayuki Nagashima ,  Masaru Kobayashi ,  Hiroyuki Shirogane

Inventor： Tsutomu UCHIMI ,  Masayuki Nagashima ,  Masaru Kobayashi ,  Hiroyuki Shirogane

IPC: H01B1/12

CPC classification number: H05K1/095 ,  H05K3/4069 ,  H05K3/4614 ,  H05K2201/0367

Abstract: There is provided an electroconductive paste composition that can form a coating film having satisfactory thickness by single coating work. The electroconductive paste composition can form bumps having satisfactory height even by a smaller number of times of coating than that in the prior art technique. The electroconductive paste composition comprises a phenolic resin, a melamine resin, an electroconductive powder, a solvent, and a bump forming aid comprising a monohydric alcohol having a terminal methoxy group and having at least one ether bond. The electroconductive paste composition can be used in a printed wiring board.

Abstract translation: 提供一种导电浆料组合物，其可以通过单次涂覆工作形成具有令人满意的厚度的涂膜。 导电糊组合物可以形成具有令人满意的高度的凸起，即使是比现有技术中的涂层次数少的次数也是如此。 导电糊组合物包含酚醛树脂，三聚氰胺树脂，导电粉末，溶剂和包含具有末端甲氧基并具有至少一个醚键的一元醇的凸块形成助剂。 导电糊剂组合物可用于印刷线路板。

公开(公告)号：US20070220744A1

公开(公告)日：2007-09-27

申请号：US11587439

申请日：2005-07-21

Applicant: Kenji Kitaoka ,  Takayoshi Fujimoto

Inventor： Kenji Kitaoka ,  Takayoshi Fujimoto

IPC: H05K3/10 ,  H01K3/10

CPC classification number: H05K3/4007 ,  H05K1/0284 ,  H05K3/107 ,  H05K3/1258 ,  H05K3/182 ,  H05K3/246 ,  H05K3/3436 ,  H05K3/4614 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09472 ,  H05K2203/0709 ,  H05K2203/1173 ,  H05K2203/1189 ,  H05K2203/1476 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A wiring circuit board and a method of producing the same are provided in which a desired pattern of wiring is provided at higher density while permitting no overflow from the grooves of an electroless plating catalyst containing solution and an electric conductor forming liquid such as silver ink. The pattern of electric conductor is deposited by applying the electric conductor forming liquid into the grooves provided in a substrate and distributing the same along the grooves with the action of capillarity. The method starts with patterning the grooves in the surface of the substrate (S1), applying the electric conductor forming liquid into the grooves (S2), and coating the surface of the substrate with a layer of repellent liquid which is lower in the affinity with the electric conductor forming liquid (S3). This is followed by cleaning at least the grooves (S4) and then filling the grooves with the electric conductor forming liquid once again (S5). The electric conductor forming liquid applied into the grooves is then distributed throughout the grooves by the action of capillarity. When silver ink is used, the pattern of electric conductor is produced by repeating an action of applying and drying a number of times. Alternatively, the patter of electric conductor can be produced by an electroless plating technique or a combination of an electroless plating technique and an electro-plating technique for separating an electrical conductive material form the electric conductor forming liquid.

Abstract translation: 提供一种布线电路板及其制造方法，其中以更高的密度提供所需的布线图案，同时不允许来自含化学镀电镀催化剂溶液的槽和诸如银墨的电导体形成液体的槽溢出。 通过将导电剂形成液体施加到设置在基板中的凹槽中并通过毛细管作用沿着凹槽分布而将电导体的图案沉积。 该方法开始于图案化基板表面（S 1）中的凹槽，将导电体形成液体施加到凹槽（S 2）中，并且在基板的表面中涂覆一层较低的驱避液体 与导电体形成液体的亲合力（S 3）。 然后，至少清洗槽（S 4），然后再次用导电体形成液填充槽（S 5）。 然后通过毛细作用的作用将施加到槽中的导电体形成液体分布在整个槽中。 当使用银墨时，通过重复施加和干燥多次的作用产生电导体的图案。 或者，电导体的图案可以通过化学镀技术或化学镀技术和电镀技术的组合来制造，用于从形成电导体的液体中分离导电材料。

公开(公告)号：US07271483B2

公开(公告)日：2007-09-18

申请号：US11026919

申请日：2004-12-29

Applicant: Ying-Ren Lin ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

Inventor： Ying-Ren Lin ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

IPC: H01L23/52 ,  H01L23/48 ,  H01L23/40

CPC classification number: H01L24/12 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11902 ,  H01L2224/13018 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09845 ,  H05K2203/0723 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/013

Abstract: A bump structure of a semiconductor package and a method for fabricating the same are provided. The bump structure is used to connect a semiconductor element to a carrier of the semiconductor package. The fabrication method primarily employs an electroplating process to form the bump structure including an under bump metallurgy (UBM) layer, at least one I-shaped conductive pillar, and a solder material. This allows fine-pitch electrical connection pads to be arranged in the semiconductor package, and also provides an enhanced support structure and a sufficient height between the semiconductor element and the carrier.

Abstract translation: 提供半导体封装的凸块结构及其制造方法。 凸块结构用于将半导体元件连接到半导体封装的载体。 该制造方法主要采用电镀工艺来形成凸块结构，其包括凸块下金属（UBM）层，至少一个I形导电柱和焊料材料。 这允许在半导体封装中布置细间距电连接焊盘，并且还提供增强的支撑结构和在半导体元件和载体之间的足够的高度。

公开(公告)号：US20070210452A1

公开(公告)日：2007-09-13

申请号：US11797994

申请日：2007-05-09

Applicant: Tsuyoshi Kaneko

Inventor： Tsuyoshi Kaneko

IPC: H01L23/48

CPC classification number: H01L24/02 ,  H01L23/49811 ,  H01L2224/0401 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09909 ,  H05K2201/10674 ,  H05K2203/013 ,  H05K2203/1173 ,  H01L2924/00

Abstract: The invention provides a bump structure whose mounting position, shape, and size are favorably controlled and to a method of manufacturing the same. The bump structure of the invention can be provided on an insulating layer and includes a protruding part made of resin obtained by hardening a liquid material and a conductive layer that covers the protruding part. The protruding part can be obtained by forming a liquid-repelling part with a liquid-repelling characteristic for the liquid material and a liquid-attracting part that is more wettable than the liquid-repelling part for the liquid material on an upper surface on the insulating layer, discharging the liquid material onto the liquid-attracting part, and then hardening the liquid material.

Abstract translation: 本发明提供一种其安装位置，形状和尺寸受到良好控制的凸块结构及其制造方法。 本发明的凸块结构可以设置在绝缘层上，并且包括由液体材料硬化获得的树脂制成的突出部分和覆盖突出部分的导电层。 突出部可以通过形成具有液体材料的液体排斥特性的防液部分和比绝缘材料上表面上的液体材料的液体排斥部分更可润湿的吸液部分获得 将液体材料排出到吸液部分上，然后硬化液体材料。

公开(公告)号：US20070207605A1

公开(公告)日：2007-09-06

申请号：US11370387

申请日：2006-03-06

Applicant: Hei Shiu ,  On Chau ,  Gor Lai ,  Heng Yip ,  Thoon Chang ,  Lan Tan

Inventor： Hei Shiu ,  On Chau ,  Gor Lai ,  Heng Yip ,  Thoon Chang ,  Lan Tan

IPC: H01L21/44

CPC classification number: H05K3/4015 ,  H01L21/4853 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/11312 ,  H01L2224/1134 ,  H01L2224/118 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/13144 ,  H01L2224/13194 ,  H01L2224/81011 ,  H01L2224/81193 ,  H01L2924/00011 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K3/3457 ,  H05K2201/0367 ,  H05K2203/049 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/81805

Abstract: A method for forming reinforced interconnects or bumps on a substrate includes first forming a support structure on the substrate. A substantially filled capsule is then formed around the support structure to form an interconnect. The interconnect can reach a height of up to 300 microns.

Abstract translation: 用于在衬底上形成增强互连或凸起的方法包括首先在衬底上形成支撑结构。 然后在支撑结构周围形成基本上填充的胶囊，以形成互连。 互连可以达到高达300微米的高度。

公开(公告)号：US20070164444A1

公开(公告)日：2007-07-19

申请号：US11639045

申请日：2006-12-14

Applicant: Takanori Sekido ,  You Kondoh

Inventor： Takanori Sekido ,  You Kondoh

IPC: H01L23/52

CPC classification number: H01L21/50 ,  B81B2207/012 ,  B81B2207/017 ,  B81C1/00301 ,  B81C1/00333 ,  H01L2224/16 ,  H05K1/144 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/042 ,  H05K2201/2018

Abstract: A stacked mounting structure includes at least two substrates namely a first substrate on which a first protruding electrode is formed and a second substrate on which a second protruding electrode is formed, and an intermediate substrate which is disposed between the first substrate and the second substrate, and which connects the first substrate and the second substrate by leaving a predetermined gap between the first substrate and the second substrate. Mounted components are disposed in the gap between the first substrate and the second substrate. The first protruding electrode and the second protruding electrode are connected in an opening which is provided in the intermediate substrate.

Abstract translation: 堆叠安装结构包括至少两个基板，即其上形成有第一突出电极的第一基板和形成有第二突出电极的第二基板，以及设置在第一基板和第二基板之间的中间基板， 并且通过在第一基板和第二基板之间留下预定的间隙来连接第一基板和第二基板。 安装的部件设置在第一基板和第二基板之间的间隙中。 第一突出电极和第二突出电极在设置在中间基板中的开口部连接。

公开(公告)号：US20070159511A1

公开(公告)日：2007-07-12

申请号：US11710561

申请日：2007-02-26

Applicant: Yuji Shinkai

Inventor： Yuji Shinkai

IPC: B41J2/05

CPC classification number: H05K3/363 ,  B41J2/14209 ,  B41J2/1609 ,  B41J2/1623 ,  B41J2002/14217 ,  B41J2002/14225 ,  B41J2002/14306 ,  B41J2002/14459 ,  B41J2002/14491 ,  B41J2202/20 ,  H05K3/3452 ,  H05K2201/0367 ,  H05K2201/09909 ,  H05K2201/10977 ,  H05K2201/2036 ,  Y10T29/42 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49179 ,  Y10T29/49401

Abstract: A manufacturing method that includes the steps of forming an actuator unit, disposing a metallic bond and a thermosetting resin; pressing the land and the terminal; and heating the metallic bond and the thermosetting resin so that the land and the terminal are electrically connected to each other with the metallic bond being disposed in at least one of a region between the land and the terminal and a region extending over the land and the terminal along the peripheries of the land and the terminal, and a protrusion made of the thermosetting resin is formed at least in the connecting portion between the main electrode portion and the land.

Abstract translation: 一种制造方法，包括形成致动器单元，设置金属粘合剂和热固性树脂的步骤; 压土地和码头; 以及加热所述金属粘合剂和所述热固性树脂，使得所述焊盘和所述端子彼此电连接，并且所述金属焊盘设置在所述焊盘和所述终端之间的区域中的至少一个区域以及在所述焊盘上延伸的区域 端子，并且至少在主电极部分和焊盘之间的连接部分中形成由热固性树脂制成的突起。

公开(公告)号：US07242097B2

公开(公告)日：2007-07-10

申请号：US10609715

申请日：2003-06-30

Applicant: Fay Hua

Inventor： Fay Hua

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/10 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/051 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/81801 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H05K3/3436 ,  H05K2201/0367 ,  H05K2201/10674 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A microelectronic package is disclosed including a microelectronic device, a substrate, and a signaling path coupling the microelectronic device with the substrate. The signaling path includes a conductive material, a solder joint, and a barrier material disposed between the conductive material and the solder joint. The barrier material may include nickel, cobalt, iron, titanium, and combinations thereof.

Abstract translation: 公开了一种微电子封装，其包括微电子器件，衬底和将微电子器件与衬底耦合的信号通路。 信号路径包括导电材料，焊接接头和设置在导电材料和焊料接头之间的阻挡材料。 阻挡材料可以包括镍，钴，铁，钛及其组合。

公开(公告)号：US20070148360A1

公开(公告)日：2007-06-28

申请号：US11684739

申请日：2007-03-12

Applicant: Terry Sterrett ,  Tian-An Chen ,  Saikumar Jayaraman

Inventor： Terry Sterrett ,  Tian-An Chen ,  Saikumar Jayaraman

IPC: B05D7/00

CPC classification number: C08L101/12 ,  B29C39/026 ,  B29C70/58 ,  B29C70/882 ,  B29L2031/3406 ,  C08J5/10 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/30107 ,  H05K3/321 ,  H05K2201/0367 ,  H05K2201/10674 ,  H05K2201/10719 ,  Y10T428/24917 ,  Y10T428/25 ,  Y10T428/31681 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method for low temperature bumping is disclosed. A resin capable of being cross-linked by free-radical or cationic polymerization at low temperature is provided. Electrically conductive particles are then added to the resin to form a mixture. The mixture is then activated by heat or exposure to light to polymerize the mixture. In an alternative embodiment, a vinyl ether resin is used, to which electrically conductive particles are added. The mixture is polymerized by exposure to light.

Abstract translation: 公开了一种低温碰撞的方法。 提供能够在低温下通过自由基或阳离子聚合交联的树脂。 然后将导电颗粒加入到树脂中以形成混合物。 然后通过加热或暴露于光使混合物活化，以使混合物聚合。 在替代实施方案中，使用乙烯基醚树脂，其中加入导电颗粒。 混合物通过曝光聚合。