HIGH THERMAL CONDUCTIVITY AND LOW DISSIPATION FACTOR ADHESIVE VARNISH FOR BUILD-UP ADDITIONAL INSULATION LAYERS
    202.
    发明申请
    HIGH THERMAL CONDUCTIVITY AND LOW DISSIPATION FACTOR ADHESIVE VARNISH FOR BUILD-UP ADDITIONAL INSULATION LAYERS 审中-公开
    高导热性和低消耗因子粘合剂用于建立额外的绝缘层

    公开(公告)号:US20110073798A1

    公开(公告)日:2011-03-31

    申请号:US12567296

    申请日:2009-09-25

    Abstract: A high thermal conductivity and low dissipation factor adhesive varnish for (build-up) combining additional insulation layers is disclosed to be used for high-density interconnected printed circuit boards or IC-package substrates and to be formed by well mixing an epoxy resin precursor, a bi-hardener mixture, a catalyst, a flow modifier, an inorganic filler with high thermal conductivity, and a solvent. The epoxy resin precursor is formed by mixing at least two epoxy resins with a certain ratio, where the at least two epoxy resins are selected from a group including a tri-functional epoxy resin, a rubber-modified or Dimmer-acid-modified epoxy resin, a bromide-contained epoxy resin, a halogen-free/phosphorus-contained epoxy resin, a halogen-free/phosphorus-free epoxy resin, a long-chain/halogen-free epoxy resin, and a bisphenol A (BPA) epoxy resin.

    Abstract translation: 公开了高密度互连印刷电路板或IC封装基板的高导热性和低耗散因数粘合剂清漆(积聚)组合附加绝缘层,并且通过将环氧树脂前体, 双硬化剂混合物,催化剂,流动改性剂,具有高导热性的无机填料和溶剂。 环氧树脂前体是通过混合至少两种一定比例的环氧树脂形成的,其中至少两种环氧树脂选自三官能环氧树脂,橡胶改性或二聚酸改性环氧树脂 ,含溴化物的环氧树脂,无卤素/含磷环氧树脂,无卤素/无磷环氧树脂,长链/无卤环氧树脂和双酚A(BPA)环氧树脂 。

    Embedded chip package process
    204.
    发明授权
    Embedded chip package process 有权
    嵌入式芯片封装过程

    公开(公告)号:US07888174B2

    公开(公告)日:2011-02-15

    申请号:US12234702

    申请日:2008-09-21

    Abstract: An embedded chip package process is disclosed. First, a first substrate having a first patterned circuit layer thereon is provided. Then, a first chip is disposed on the first patterned circuit layer and electrically connected to the first patterned circuit layer. A second substrate having a second patterned circuit layer thereon is provided. A second chip is disposed on the second patterned circuit layer and electrically connected to the second patterned circuit layer. Afterwards, a dielectric material layer is formed and covers the first chip and the first patterned circuit layer. Then, a compression process is performed to cover the second substrate over the dielectric material layer so that the second patterned circuit layer and the second chip on the second substrate are embedded into the dielectric material layer.

    Abstract translation: 公开了一种嵌入式芯片封装工艺。 首先,提供其上具有第一图案化电路层的第一基板。 然后,第一芯片设置在第一图案化电路层上并电连接到第一图案化电路层。 提供其上具有第二图案化电路层的第二基板。 第二芯片设置在第二图案化电路层上并电连接到第二图案化电路层。 之后,形成介电材料层并覆盖第一芯片和第一图案化电路层。 然后,执行压缩处理以覆盖电介质材料层上的第二衬底,使得第二图案化电路层和第二衬底上的第二芯片被嵌入电介质材料层中。

    METAL LAYER LAMINATE HAVING ROUGHENED METAL SURFACE LAYER AND METHOD FOR PRODUCING THE SAME
    207.
    发明申请
    METAL LAYER LAMINATE HAVING ROUGHENED METAL SURFACE LAYER AND METHOD FOR PRODUCING THE SAME 审中-公开
    具有粗化金属表面层的金属层叠层及其制造方法

    公开(公告)号:US20100190029A1

    公开(公告)日:2010-07-29

    申请号:US12666807

    申请日:2008-06-09

    Applicant: Shiki Ueki

    Inventor: Shiki Ueki

    Abstract: Provided are a metal layer laminate that includes a roughened metal surface layer having a surface profile capable of strongly adhering to resin materials even when the surface roughness is small, and a simple method for producing a metal layer laminate having good adhesion to resin materials such as a resin substrate for a metal layer and an insulating resin film formed on the surface of a metal wiring portion. The metal layer laminate includes a metal layer, a resin thin film, and a roughened metal surface layer, wherein the resin thin film and the roughened metal surface layer are formed on the surface of the metal layer, a fractal-shaped interface structure appears between the resin thin film and the roughened metal surface layer, when the metal layer laminate is cut in a normal direction, and the interface structure has a fractal dimension of 1.05 to 1.50 as calculated using a box counting method with the measurement object region being set to from 50 nm to 5 μm and the box size (pixel size) being set to 1/100 or less of the measurement object region. The metal layer laminate is obtained by a production method including the steps of forming a resin thin film on the surface of a metal layer and subjecting the resin thin film-carrying metal layer to a plating process.

    Abstract translation: 提供一种金属层叠体,其具有即使在表面粗糙度小的情况下也具有能够强烈地附着在树脂材料上的表面轮廓的粗糙金属表面层,以及与树脂材料(例如, 用于金属层的树脂基板和形成在金属布线部分的表面上的绝缘树脂膜。 金属层层叠体包括金属层,树脂薄膜和粗糙化的金属表面层,其中树脂薄膜和粗糙金属表面层形成在金属层的表面上,分形形状的界面结构出现在 树脂薄膜和粗糙金属表面层,当金属层层压板沿正向切割时,并且界面结构的分形维数为1.05至1.50,使用盒计数方法计算,其中测量对象区域设置为 从50nm到5μm,并且盒尺寸(像素尺寸)被设置为测量对象区域的1/100或更小。 通过包括以下步骤的制造方法获得金属层层叠体:在金属层的表面上形成树脂薄膜,对树脂薄膜负载金属层进行电镀处理。

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