公开(公告)号：US20030215972A1

公开(公告)日：2003-11-20

申请号：US10147006

申请日：2002-05-16

Inventor： Quanbo Zou ,  Yu Chen ,  Janak Singh ,  Tit Meng Lim ,  Tie Yan ,  Chew Kiat Heng

IPC: B23Q003/157 ,  H01L021/00 ,  H01L021/302

CPC classification number: B81C1/00214 ,  B81C2201/0132 ,  F04B43/043

Abstract: Formation of micro-fluidic systems is normally achieved using a multi-wafer fabrication procedure. The present invention teaches how a complete micro-fluidic system can be implemented on a single chip. The invention uses only dry etch processes to form micro-chambers. In particular, it makes use of deep reactive ion etching whereby multiple trenches of differing depths may be formed simultaneously. Buried micro-chambers are formed by isotropically increasing trench widths using an etchant that does not attack the mask so the trenches grow wider beneath the surface until they merge. Deposition of a dielectric layer over the trenches allows some trenches to be sealed and some to be left open. Micro-pumps are formed by including in the micro-chamber roof a layer that is used to change chamber volume either through electrostatically induced motion or through thermal mismatch as a result of its being heated.

Abstract translation: 微流体系统的形成通常使用多晶片制造程序来实现。 本发明教导了如何在单个芯片上实现完整的微流体系统。 本发明仅使用干蚀刻工艺来形成微室。 特别地，它利用深反应离子蚀刻，从而可以同时形成不同深度的多个沟槽。 通过使用不侵蚀掩模的蚀刻剂各向同性地增加沟槽宽度来形成掩埋的微室，使得沟槽在表面下方变得更宽，直到它们合并。 电介质层沉积在沟槽上方允许一些沟槽被密封，有些则被打开。 通过在微室顶中包含用于通过静电诱导运动或通过其被加热的结果的热失配来改变室容积的层而形成微泵。

公开(公告)号：US20030177853A1

公开(公告)日：2003-09-25

申请号：US10357763

申请日：2003-02-03

Inventor： Young-Ho Cho ,  Won Chul Lee ,  Young-Hyun Jin

IPC: F16H021/44

CPC classification number: F16F3/02 ,  B81B3/0051 ,  B81B2201/033 ,  B81C2201/0132 ,  Y10T74/18856

Abstract: The nonlinear mechanical modulator of the present invention comprises first and second masses, a first spring connecting the first and second masses, and a second spring connecting the second mass and a fixed end. A motion input is applied to any one of the first and second masses and a resultant motion output is generated from the other one of the masses. Further, at least one of the springs has a nonlinear behavior characteristic that its stiffness varies according to a magnitude of the motion input. At this time, a nonlinear characteristic of the spring is categorized into a nonlinearly increasing characteristic that its stiffness is increased as its deflection becomes greater, and a nonlinearly decreasing characteristic that its stiffness is decreased as its deflection becomes greater. One or both of the two nonlinear characteristics can be applied to and employed in the mechanical modulator of the present invention.

Abstract translation: 本发明的非线性机械调制器包括第一和第二质量块，连接第一和第二质量块的第一弹簧和连接第二质量块和固定端部的第二弹簧。 将运动输入应用于第一和第二质量块中的任何一个，并且从另一个质量块产生合成的运动输出。 此外，弹簧中的至少一个具有其刚度根据运动输入的大小而变化的非线性行为特性。 此时，弹簧的非线性特性被分类为非线性增加的特性，其刚度随偏转变大而增大，而随着挠度变大，其刚度降低的非线性降低特性。 两种非线性特性中的一种或两种可以应用于本发明的机械调制器中并被应用于本发明的机械调制器。

公开(公告)号：US20030176006A1

公开(公告)日：2003-09-18

申请号：US10384562

申请日：2003-03-11

Inventor： Junji Oohara ,  Kazuhiko Kano ,  Hiroshi Muto

IPC: H01L021/00

CPC classification number: B81C1/0019 ,  B81C1/00579 ,  B81C1/00626 ,  B81C2201/0132 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814

Abstract: A method for manufacturing a semiconductor device having a movable unit includes a step of forming an SOI substrate that includes a semiconductor substrate, an insulating layer, and a semiconductor layer. The method further includes a step of dry etching the semiconductor layer to form a trench and a step of dry etching a sidewall defining the trench at a portion adjacent to a bottom of the trench to form the movable unit. The later dry etching is implemented with a charge building up on a surface of the insulating layer that is exposed during the former dry etching to etch the portion. In addition, the later dry etching is implemented at an etching rate higher than that at which the former dry etching is implemented to reduce the deposition amount of a protection film deposited on a reverse side of the movable unit during the later dry etching.

Abstract translation: 一种制造具有可移动单元的半导体器件的方法包括形成包括半导体衬底，绝缘层和半导体层的SOI衬底的步骤。 该方法还包括干法蚀刻半导体层以形成沟槽的步骤，以及在邻近沟槽底部的部分干蚀刻限定沟槽的侧壁以形成可移动单元的步骤。 稍后的干蚀刻通过在前一次干蚀刻中暴露的绝缘层的表面上积累的电荷来实现，以蚀刻该部分。 此外，稍后的干蚀刻以比实施前述干蚀刻的蚀刻速率更高的蚀刻速率来实现，以减少在稍后的干蚀刻期间沉积在可移动单元的反面上的保护膜的沉积量。

公开(公告)号：US20030139014A1

公开(公告)日：2003-07-24

申请号：US10269256

申请日：2002-10-11

Inventor： Khalil Najafi ,  Chou Tsung-Kuan

IPC: H01L021/331

CPC classification number: B81C1/00103 ,  B81B2203/0392 ,  B81C1/00547 ,  B81C1/00626 ,  B81C2201/0104 ,  B81C2201/0132 ,  B81C2201/0133 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3083 ,  Y10S438/974 ,  Y10S438/977

Abstract: A method of fabricating a device having a desired non-planar surface or profile and device produced thereby are provided. A silicon wafer is first coated with silicon nitride, patterned, and DRIE to obtain the desired etch profile. Silicon pillars between trenches are then etched using an isotropic wet etch, resulting in a curved well. The wafer is then oxidized to null2 nullm to smooth the surface of the well, and to protect the well from an ensuing planarization process. The nitride is then selectively removed, and the wafer surface is planarized by removing the Si left in the field regions using either a maskless DRIE or CMP. Finally, the oxide is etched away to produce a wafer with a curved surface.

Abstract translation: 提供一种制造具有期望的非平面表面或轮廓的装置的方法以及由此制造的装置。 硅晶片首先用氮化硅，图案化和DRIE涂覆以获得所需的蚀刻轮廓。 然后使用各向同性的湿蚀刻蚀刻沟槽之间的硅柱，得到弯曲的井。 然后将晶片氧化至〜2μm以平滑孔的表面，并保护井不受随后的平坦化过程的影响。 然后选择性地去除氮化物，并且通过使用无掩模DRIE或CMP去除场区域中留下的Si来平坦化晶片表面。 最后，将氧化物蚀刻掉以产生具有弯曲表面的晶片。

公开(公告)号：US06562642B1

公开(公告)日：2003-05-13

申请号：US10072330

申请日：2002-02-07

Applicant: Guy Moshe Cohen ,  Steven Alan Cordes ,  Joanna Rosner ,  Jeannine Madelyn Trewhella

Inventor： Guy Moshe Cohen ,  Steven Alan Cordes ,  Joanna Rosner ,  Jeannine Madelyn Trewhella

IPC: H01L2100

CPC classification number: H01L21/0334 ,  B81C1/00396 ,  B81C1/00428 ,  B81C1/00626 ,  B81C2201/0132 ,  H01L21/0337

Abstract: A method is provided for the manufacture of micro-structures, such as micro-electromechanical structures (MEMS) or silicon optical benches (SiOB). The method includes using a single mask to pattern two or more cavity areas to be etched into a substrate in different etching steps, and then selectively choosing the cavity areas for etching. In a preferred embodiment, the method includes patterning a substrate to identify a plurality of cavity areas to be etched into the substrate and filling at least one of the cavity areas with a distinctive filler material. Filler material is chemically distinctive in the sense that it can be etched selectively with respect to the other filling materials. At least one of the cavity areas containing a distinctive filler material is then chosen based at least in part on the distinctive filler material. The chosen cavity area is then etched. The methods of the invention produce micro-structures with more accurate cavity areas by minimizing overlay error and avoiding the need for lithography over extreme topography. The micro-structures manufactured by the methods of the invention are also provided herein.

公开(公告)号：US20030020130A1

公开(公告)日：2003-01-30

申请号：US10071261

申请日：2002-02-07

Inventor： Dan A. Steinberg ,  Jasean Rasnake

IPC: H01L031/00

CPC classification number: B81C1/00103 ,  B81C2201/0132 ,  B81C2201/0133 ,  G02B6/136 ,  G02B6/4234

Abstract: A novel micromachining method in which dry etching and anisotropic wet etching are combined.

Abstract translation: 一种新的微加工方法，其中组合了干蚀刻和各向异性湿蚀刻

公开(公告)号：US20020197761A1

公开(公告)日：2002-12-26

申请号：US10154150

申请日：2002-05-22

Applicant: REFLECTIVITY, INC.

Inventor： Satyadev R. Patel ,  Andrew G. Huibers ,  Gregory P. Schaadt ,  Peter J. Heureux

IPC: H01L021/00 ,  H01L021/302 ,  H01L021/461

CPC classification number: B81C1/00476 ,  B81C1/00547 ,  B81C2201/0109 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/112 ,  B82Y30/00

Abstract: An etching method, such as for forming a micromechanical device, is disclosed. One embodiment of the method is for releasing a micromechanical structure, comprising, providing a substrate; providing a sacrificial layer directly or indirectly on the substrate; providing one or more micromechanical structural layers on the sacrificial layer; performing a first etch to remove a portion of the sacrificial layer, the first etch comprising providing an etchant gas and energizing the etchant gas so as to allow the etchant gas to physically, or chemically and physically, remove the portion of the sacrificial layer; performing a second etch to remove additional sacrificial material in the sacrificial layer, the second etch comprising providing a gas that chemically but not physically etches the additional sacrificial material. Another embodiment of the method is for etching a silicon material on or within a substrate, comprising: performing a first etch to remove a portion of the silicon, the first etch comprising providing an etchant gas and energizing the etchant gas so as to allow the etchant gas to physically, or chemically and physically, remove the portion of silicon; performing a second etch to remove additional silicon, the second etch comprising providing an etchant gas that chemically but not physically etches the additional silicon.

Abstract translation: 公开了一种诸如用于形成微机械装置的蚀刻方法。 该方法的一个实施例是用于释放微机械结构，包括：提供衬底; 在衬底上直接或间接提供牺牲层; 在所述牺牲层上提供一个或多个微机械结构层; 执行第一蚀刻以去除牺牲层的一部分，所述第一蚀刻包括提供蚀刻剂气体并激发蚀刻剂气体，以允许蚀刻剂气体在物理或化学和物理上移除牺牲层的该部分; 执行第二蚀刻以去除牺牲层中的附加牺牲材料，第二蚀刻包括提供化学上但不物理蚀刻附加牺牲材料的气体。 该方法的另一实施例是用于在衬底上或衬底内蚀刻硅材料，包括：执行第一蚀刻以去除硅的一部分，第一蚀刻包括提供蚀刻剂气体并激发蚀刻剂气体以允许蚀刻剂 物理或化学和物理的气体去除硅的部分; 执行第二蚀刻以去除附加的硅，第二蚀刻包括提供蚀刻剂气体，其化学地但不物理地蚀刻附加的硅。

公开(公告)号：US20020127760A1

公开(公告)日：2002-09-12

申请号：US09922590

申请日：2001-08-02

Inventor： Jer-Liang Yeh ,  Norman C. Tien

IPC: H01L021/00

CPC classification number: B81C1/00619 ,  B81B2203/0136 ,  B81C1/00182 ,  B81C2201/0132 ,  B81C2201/0178 ,  B81C2201/056 ,  H04R19/005

Abstract: The present invention provides a fabrication process that integrates high-aspect-ratio silicon structures with polysilicon surface micromachined structures. In some embodiments the process includes forming an oxide block by etching a plurality of trenches to leave a plurality of vertical-walled silicon structures standing on the substrate, thermally and substantially completely oxidizing the vertical-walled silicon structures, and substantially filling spaces between the oxidized vertical-walled silicon structures with an oxide of silicon to form the oxide block. The process retains not only the high-aspect-ratio silicon structures possible with deep reactive ion etching (DRIE) but also the design flexibility of polysilicon surface micromachining. Using this process, polysilicon platforms have been fabricated, which are actuated by high-aspect-ratio combdrives for many applications such as x-y-z stages and scanning devices. The actuators include an asymmetric combdrive that actuates in torsional/out-of-plane motions, and a high-aspect-ratio combdrive that drives in translational motion.

Abstract translation: 本发明提供了一种将高纵横比硅结构与多晶硅表面微加工结构相集成的制造工艺。 在一些实施方案中，该方法包括通过蚀刻多个沟槽来形成氧化物块，以留下多个垂直壁硅结构站立在衬底上，热并基本上完全氧化垂直壁硅结构，并且基本上填充氧化的 具有硅氧化物的垂直壁硅结构以形成氧化物块。 该过程不仅保留了高纵横比的硅结构，而且可以通过深反应离子蚀刻（DRIE）进行，而且还保留了多晶硅表面微机械加工的设计灵活性。 使用这个过程，已经制造了多晶硅平台，其由用于诸如x-y-z级和扫描装置的许多应用的高纵横比梳齿驱动。 致动器包括在扭转/超平面运动中致动的非对称梳齿驱动器以及在平移运动中驱动的高纵横比梳齿驱动。

公开(公告)号：US06355181B1

公开(公告)日：2002-03-12

申请号：US09423979

申请日：1999-11-17

Applicant: Andrew Duncan McQuarrie

Inventor： Andrew Duncan McQuarrie

IPC: H01L2100

CPC classification number: B01J19/088 ,  B01J7/00 ,  B01J12/00 ,  B01J12/002 ,  B01J12/007 ,  B01J19/24 ,  B01J19/2445 ,  B01J19/245 ,  B01J2219/00038 ,  B01J2219/0004 ,  B01J2219/00058 ,  B01J2219/00162 ,  B01J2219/0807 ,  B01J2219/0809 ,  B01J2219/0841 ,  B01J2219/0869 ,  B01J2219/0871 ,  B01J2219/0883 ,  B01J2219/0894 ,  B81C1/00515 ,  B81C2201/0112 ,  B81C2201/0132 ,  C01B7/24 ,  C07C17/00 ,  G01P15/0802 ,  G01P15/125 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/3081

Abstract: In the manufacture of a micromechanical device, a substrate, having a mask thereon, is etched using a flourine-containing etchant gas or vapour in the absence of a plasma through an opening in the mask to a desired depth to form a trench having a side wall and a base in the substrate. A layer of protecting substance is deposited on the exposed surfaces of the substrate and mask, and the protecting substance is then selectively removed from the base. The base is then etched using the fluorine-containing etchant.

Abstract translation: 在微机械装置的制造中，在其上具有掩模的衬底在不存在等离子体的情况下使用含有含氟化物的蚀刻剂气体或蒸气通过掩模中的开口蚀刻到期望的深度以形成具有侧面的沟槽 壁和基底。 一层保护物质沉积在基片和掩模的暴露表面上，然后从基底中选择性地除去保护物质。 然后使用含氟蚀刻剂蚀刻基材。

公开(公告)号：US06199874B1

公开(公告)日：2001-03-13

申请号：US08568845

申请日：1995-12-07

Applicant: Gregory J. Galvin ,  Timothy J. Davis ,  Noel C. MacDonald

Inventor： Gregory J. Galvin ,  Timothy J. Davis ,  Noel C. MacDonald

IPC: B60G1700

CPC classification number: G01P15/131 ,  B81B2201/0235 ,  B81B2203/051 ,  B81C1/00619 ,  B81C2201/0132 ,  G01P1/006 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814 ,  G01P2015/0817

Abstract: A micromechanical capacitive accelerometer is provided from a single silicon wafer. The basic structure of the micromechanical accelerometer is etched in the wafer to form a released portion in the substrate, and the released and remaining portions of the substrate are coated with metal under conditions sufficient to form a micromechanical capacitive accelerometer. The substrate is preferably etched using reactive-ion etching for at least the first etch step in the process that forms the basic structure, although in another preferred embodiment, all etching is reactive-ion etching. The accelerometer also may comprise a signal-conditioned accelerometer wherein signal-conditioning circuitry is provided on the same wafer from which the accelerometer is formed, and VLSI electronics may be integrated on the same wafer from which the accelerometer is formed. The micromechanical capacitive accelerometer can be used for airbag deployment, active suspension control, active steering control, anti-lock braking, and other control systems requiring accelerometers having high sensitivity, extreme accuracy and resistance to out of plane forces.

Abstract translation: 从单个硅晶片提供微机电电容式加速度计。 在晶片中蚀刻微机械加速度计的基本结构，以在衬底中形成释放部分，并且在足以形成微机械电容式加速度计的条件下，用金属涂覆衬底的释放和剩余部分。 在形成基本结构的工艺中，优选使用反应离子蚀刻对至少第一蚀刻步骤蚀刻衬底，尽管在另一优选实施例中，所有蚀刻都是反应离子蚀刻。 加速度计还可以包括信号调节加速度计，其中信号调节电路设置在与其形成加速度计的同一晶片上，并且VLSI电子器件可以集成在形成加速度计的相同晶片上。 微机电容加速度计可用于安全气囊部署，主动悬架控制，主动转向控制，防抱死制动以及需要具有高灵敏度，极高精度和抗平面外力的加速度计的其他控制系统。