公开(公告)号：US6114015A

公开(公告)日：2000-09-05

申请号：US170933

申请日：1998-10-13

Applicant: Arthur J. Fillion ,  Osamu Kogami ,  Kanji Kurata ,  Jeffrey A. Murray ,  Terrence A. Smith

Inventor： Arthur J. Fillion ,  Osamu Kogami ,  Kanji Kurata ,  Jeffrey A. Murray ,  Terrence A. Smith

IPC: H05K1/02 ,  H05K1/16 ,  H05K3/00 ,  B32B23/02

CPC classification number: H05K1/0256 ,  H05K1/162 ,  H05K3/0052 ,  H05K2201/0355 ,  H05K2201/09154 ,  H05K2201/09309 ,  H05K2203/0228 ,  H05K2203/0346 ,  Y10T29/435 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/4981 ,  Y10T428/24777 ,  Y10T428/24917

Abstract: The present invention provides thin-laminate panels (i.e., thin-laminate panels having dielectric layers of about 0.006 inches or less and conductive layers on either side of the dielectric layer), wherein the edges of the dielectric layers of the panels are free of conductive material, such as copper. The thin-laminate panel is designed to provide necessary capacitance for all or a substantial number of the integrated circuits to be formed thereon. The thin-laminate panels of the present invention may be tested for manufacturing defects, such as short circuits, before further processing of the panels to produce PCBs. "Finishing" methods for shearing sheets of unfinished thin-laminate into the finished thin-laminate panels of the present invention in a manner that does not cause smearing of the conductive material onto the dielectric layer are also provided. To assure that conductive material from the conductive layers of an unfinished thin-laminate panel is not smeared onto the edges of the dielectric layer as the panel is sheared, the plane of rotation of a vertically mounted router bit coincides with the plane defined by the surface of the panel. Securing apparatus or fixtures for securing one or more unfinished thin-laminate panels to a surface for shearing of the edges of the panels to produce the finished thin-laminate panels of the present invention are also provided. The securing apparatus allow unfinished panels to be secured to a surface during the finishing process without the need to drill holes through or otherwise diminish the useful area or portions of the panels.

Abstract translation: 本发明提供薄层压板（即，具有约0.006英寸或更小的介电层和介电层两侧的导电层的薄层压板），其中板的电介质层的边缘不具有导电性 材料，如铜。 薄层压板被设计成为要在其上形成的所有或相当数量的集成电路提供必要的电容。 在进一步处理面板以制造PCB之前，可以测试本发明的薄层压板用于制造缺陷，例如短路。 还提供了用于将未完成的薄层压板的片材以不会导致导电材料污染到电介质层上的方式将本发明的成品薄层压板材剪切的方法。 为了确保当面板被剪切时，来自未完成的薄层压板的导电层的导电材料不会涂在电介质层的边缘上，垂直安装的路由器钻头的旋转平面与由表面限定的平面重合 的面板。 还提供了用于将一个或多个未完成的薄层压板固定到用于剪切板的边缘的表面以制造本发明的成品薄层压板的固定装置或固定装置。 固定装置允许未完成的面板在精加工过程中被固定到表面上，而不需要穿过或者减小面板的有用区域或部分的孔。

公开(公告)号：US5898218A

公开(公告)日：1999-04-27

申请号：US840073

申请日：1997-04-24

Applicant: Shinichi Hirose ,  Naohito Mizuno

Inventor： Shinichi Hirose ,  Naohito Mizuno

IPC: G01P15/00 ,  B60R16/02 ,  B60R16/023 ,  B60T8/36 ,  G01P1/02 ,  G01P15/08 ,  H01L23/12 ,  H01L23/52 ,  H01L25/04 ,  H01L25/18 ,  H01L29/84 ,  H05K3/34 ,  H01L23/10 ,  H01L23/06 ,  H01L23/48

CPC classification number: B60R16/0239 ,  B60T8/3675 ,  G01P1/023 ,  G01P15/08 ,  H05K3/3442 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16195 ,  H01L2924/19041 ,  H05K2201/09154 ,  H05K2201/10454 ,  H05K2201/10727 ,  H05K2201/10909 ,  Y02P70/613

Abstract: A semiconductor sensor chip such as an acceleration sensor chip and other electronic components such as controlling semiconductor chips are mounted on and connected to conductor patterns formed on a ceramic package. The ceramic package is heated together with a cap to hermetically seal the ceramic package containing the sensor chip and electronic components therein. The conductor pattern formed on the ceramic package is composed of a base film of, i.e., tungsten, an intermediate film of nickel plated on the base film and a thin surface film of gold which is formed on the intermediate film by flash plating. The conductor patterns are also formed at outside portions of the ceramic package. The ceramic package is mounted on a printed board by soldering at portions where the conductor patterns are formed. Though the surface gold film is thin and made at a low cost, it provides an excellent surface of the conductor patterns for securing a good solder wettability and bonding quality.

Abstract translation: 诸如加速度传感器芯片和诸如控制半导体芯片的其它电子部件的半导体传感器芯片安装在形成在陶瓷封装上的导体图案上并连接到形成在陶瓷封装上的导体图案。 陶瓷封装与盖一起被加热，以将包含传感器芯片和电子部件的陶瓷封装气密地密封。 形成在陶瓷封装上的导体图案由基底膜上镀镍的中间膜和通过闪镀形成在中间膜上的金的薄膜的基底膜构成。 导体图案也形成在陶瓷封装的外部。 通过在形成导体图案的部分通过焊接将陶瓷封装安装在印刷电路板上。 虽然表面金膜薄且制造成本低，但它提供了良好的导体图案表面，以确保良好的焊料润湿性和粘合质量。

公开(公告)号：US5600101A

公开(公告)日：1997-02-04

申请号：US504696

申请日：1995-07-20

Applicant: Norio Sakai

Inventor： Norio Sakai

IPC: H05K3/46 ,  H01G4/232 ,  H01L23/12 ,  H01L23/498 ,  H05K1/02 ,  H05K1/09 ,  H05K1/11 ,  H05K3/00 ,  H05K3/34 ,  H05K3/40 ,  H05K1/14

CPC classification number: H01G4/232 ,  H01L23/49805 ,  H05K3/403 ,  H01L2924/0002 ,  H05K1/092 ,  H05K2201/09154 ,  H05K2201/09181 ,  H05K2201/09563 ,  H05K3/0052 ,  H05K3/0097 ,  H05K3/3442 ,  H05K3/4061 ,  H05K3/4069 ,  Y10T29/4916 ,  Y10T29/49165

Abstract: A multilayer electronic component has a substrate having a major surface with an area which can be utilized for mounting another electronic component thereon, and external electrodes arranged with a small pitch. According to a method of manufacturing multilayer electronic components, the external electrodes can be easily formed, and the characteristics of respective multilayer electronic components in the parent laminate can be measured during manufacture.The parent laminate is formed by stacking a plurality of insulating sheets provided with via holes each having a conductor and internal circuits connected to the conductors. V-shaped slits are formed in one of the major surfaces of the parent laminate to divide the via holes and the conductors respectively filled in the via holes and expose the conductors within the slits. The exposed conductors respectively serve as the external electrodes of each of the multilayer electronic components obtained by cutting the parent laminate.

Abstract translation: 多层电子部件具有基板，其主表面具有可用于在其上安装另一电子部件的面积，以及以小间距排列的外部电极。 根据制造多层电子部件的方法，可以容易地形成外部电极，并且可以在制造期间测量母体层叠体中的各个多层电子部件的特性。 母层叠体通过层叠多个绝缘片而形成，绝缘片设置有各自具有导体的通路孔和内部电路连接到导体。 V形狭缝形成在母层压板的一个主表面中，以分开通孔和分别填充在通孔中的导体，并将导体暴露在狭缝内。 暴露的导体分别用作通过切割母体层压体而获得的每个多层电子部件的外部电极。

公开(公告)号：US5255738A

公开(公告)日：1993-10-26

申请号：US915460

申请日：1992-07-16

Applicant: Mark B. Przilas

Inventor： Mark B. Przilas

IPC: B32B5/08 ,  F28F21/00 ,  H05K7/20 ,  F28F7/00

CPC classification number: H05K7/205 ,  B32B5/08 ,  F28F21/00 ,  H05K1/0206 ,  H05K3/403 ,  H05K2201/09154 ,  H05K2201/0919 ,  H05K2201/09563 ,  H05K2201/09827 ,  H05K3/429 ,  Y10S165/905

Abstract: A tapered thermal substrate for transferring heat generated from a heat source to a heat sink comprising a composite core of parallel layers of thermally conductive fibers, the core having a tapered edge that maximizes fiber end exposure to the heat source or sink. The tapered edge is comprised of at least one angled surface formed by machining the composite core. A copper thermal tab is plated to each angled surface and machined to a desired size and shape to provide a contact surface for the heat source or sink and a means for facilitating transfer of generated heat to and from the fiber ends. A flashing of a thin coating of copper and nickel over the composite core and each copper thermal tab is also provided to environmentally seal the composite core.

Abstract translation: 用于将从热源产生的热传递到散热器的锥形热衬底，所述散热器包括平行导热纤维层的复合芯，所述芯具有使光纤末端暴露于热源或吸收槽最大化的渐缩边缘。 锥形边缘包括通过机加工复合型芯形成的至少一个成角度的表面。 将铜热接头镀覆到每个成角度的表面上并加工成所需的尺寸和形状以提供用于热源或水槽的接触表面，以及用于促进向纤维末端和/或从纤维端传递产生的热量的装置。 还提供了在复合芯和每个铜热接头上闪烁的铜和镍的薄涂层以环境地密封复合芯。

公开(公告)号：US5196652A

公开(公告)日：1993-03-23

申请号：US633923

申请日：1990-12-26

Applicant: James C. Mikkelsen, Jr. ,  William Meuli ,  Richard Bruce ,  Jackson Ho

Inventor： James C. Mikkelsen, Jr. ,  William Meuli ,  Richard Bruce ,  Jackson Ho

IPC: G09F9/00 ,  G09F9/35 ,  G09F9/40 ,  H01R4/02 ,  H01R4/04 ,  H01R12/52 ,  H05K1/11 ,  H05K1/14 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36

CPC classification number: H05K1/142 ,  G09F9/35 ,  H01R12/52 ,  H05K3/3405 ,  H05K3/36 ,  H01R4/02 ,  H05K1/117 ,  H05K2201/09154 ,  H05K2203/049 ,  H05K3/321 ,  H05K3/328 ,  Y10T29/49149

Abstract: A method for electrically connecting planar element substrates (12) to form an array (10) by forming conductive bridges (16) between metal pads (14) located on the surface of array elements (12). These bridges (16) are designed to transmit or receive visual, acoustical or other electromagnetic data and power. The conductive bridges (16) are formed to be nearly coplanar with the planar elements (12) and are made to connect the edges (14b) of pads (14) which are fused to the planar substrate (12). Metal wire (16a), solder (16b-c), a conductive polymer (16d), or a suspension of conductive particles in paste (16e) are used to bridge and electrically connect the pads (14) located on the array elements (12). The bridges (16) have a low profile, occupy a very small area and reduce the need for highly accurate alignment of adjacent substrates (12) within the tiled array (10) before electrical connections are formed. These low profile bridges (16) are especially advantageous in that they allow a protective plastic or similar cover sheet, or a liquid crystal laminate to be surface mounted on the composite array (10) without causing detrimental surface blemishes or ridges. The small area of the bridges (16) greatly reduces the non-transmitting area of the visual display. The bridges (16), being substantially narrower than the pads (14) which they connect, are more likely to connect the intended pads (14) and less likely to "short" pads (14) which are not in accurate alignment.

公开(公告)号：US4925347A

公开(公告)日：1990-05-15

申请号：US293114

申请日：1989-01-03

Applicant: Kameharu Seki ,  Isamu Kubo

Inventor： Kameharu Seki ,  Isamu Kubo

IPC: B23C3/12 ,  B23D79/00 ,  B24B9/00 ,  H05K1/02 ,  H05K3/00

CPC classification number: H05K3/0052 ,  B23C3/12 ,  H05K1/0269 ,  H05K2201/09154 ,  H05K2203/0228 ,  H05K2203/1536 ,  H05K2203/163 ,  H05K3/0008 ,  Y10T409/303808 ,  Y10T409/304144 ,  Y10T409/307336 ,  Y10T409/50246 ,  Y10T83/0259

Abstract: A method of chamfering the outer peripheral edges of plate members comprises stacking the plate members in face-to-face vertically aligned relation so that for each two adjacent plate members the upper outer peripheral edge of the lower plate member opposes the lower outer peripheral edge of the upper plate member, detecting the boundary between two adjacent plate members in the stack, positioning a rotary chamfering tool in response to detection of the boundary, and moving the rotary chamfering tool relative to the outer peripheral edges of the two adjacent plate members to simultaneously chamfer the upper edge of the lower plate member and the lower edge of the upper plate member. The detecting, positioning and chamfering steps are repeated for each two adjacent plate members in the stack to thereby chamfer both the upper and lower edges of the stacked plate members.

公开(公告)号：US4909742A

公开(公告)日：1990-03-20

申请号：US296175

申请日：1989-01-12

Applicant: Isao Ohkubo ,  Shintaro Aiba

Inventor： Isao Ohkubo ,  Shintaro Aiba

IPC: B42D15/02 ,  B42D15/10 ,  G06K7/00 ,  G06K19/077 ,  H05K1/11 ,  H05K3/40

CPC classification number: H05K1/117 ,  G06K19/07743 ,  G06K7/0047 ,  H05K2201/09154 ,  H05K2201/09645 ,  H05K2201/098 ,  H05K2203/0346 ,  H05K2203/1327 ,  H05K3/403

Abstract: A credit card type small thin rectangular IC Card has a battery and an IC comprising a CPU, a ROM and a RAM mounted on a flexible printed circuit and bonded within an insulative plastic material. The printed circuit of the card has a plurality of electrode terminals exposed in a parallel array along at least one edge of the card which are adapted to engage contacts of a mating socket. The printed circuit terminals are manufactured by coating copper, nickel and gold over polyamide resin and squeeze finishing the leading edge. The mating socket comprises a general U-shaped frame having a U-shaped channel adapted to receive the IC card and having internal recessed contacts adapted to engage the terminals of the IC card. The contacts extend from an exterior surface of the frame for interconnection with the circuits of a mating device. Downwardly projecting portions thereof are bent at least twice in the portion penetrating the bottom of the frame.

公开(公告)号：US4565922A

公开(公告)日：1986-01-21

申请号：US496044

申请日：1983-05-19

Applicant: Eric G. Anderson

Inventor： Eric G. Anderson

IPC: G06K19/067 ,  H05K1/00 ,  H05K1/11 ,  G06K19/06

CPC classification number: H05K1/117 ,  G06K19/067 ,  H05K1/029 ,  H05K2201/09154 ,  H05K2201/09227 ,  H05K2201/094 ,  H05K2203/175

Abstract: A series of first parallel printed contacts extends inward from a beveled first end of a card. Conductors extend over the surface on ends of the contact and are electrically connected together and with large contact terminals at the ends of the parallel series of contacts.A second parallel series of contacts extends inward from the beveled first edge on the second side of the card, and conductors are looped around each other and individually terminate in a triangular array of connectors which extend through the card to make electrical contact with the first conductors on the first surface. Large end contact terminals are provided at ends of the second series of contact. Adhesive-backed covers cover the conductors and connectors and inner portions of the contacts and terminals.The first conductors and second conductors are so arranged that large sections of each conductor in one group of conductors do not overlie conductors on the opposite side of the card. Holes can be punched through the card in selected locations to selectively interrupt conductors on one side of the card without interrupting conductors on the opposite side of the card.

Abstract translation: 一系列第一平行印刷触点从卡的斜面第一端向内延伸。 导体在接触端部的表面上延伸，并且在平行的触点系列的端部电连接在一起并具有大的接触端子。 第二平行串联的触点从卡的第二侧上的斜切第一边缘向内延伸，并且导体彼此环绕并且分别终止于延伸穿过卡的三角形连接器阵列以与第一导体电接触 在第一个表面。 大端接触端子设置在第二接触系列的端部。 胶粘背盖覆盖导体和连接器以及触点和端子的内部。 第一导体和第二导体被布置成使得一组导体中的每个导体的大部分不覆盖在卡的相对侧上的导体。 孔可以通过选定位置的卡片穿孔，以选择性地中断卡的一侧上的导体，而不会中断卡的相对侧上的导体。

公开(公告)号：US4289384A

公开(公告)日：1981-09-15

申请号：US34893

申请日：1979-04-30

Applicant: Norbert E. Samek

Inventor： Norbert E. Samek

IPC: G02F1/055 ,  H05K3/04 ,  H05K3/06 ,  H05K3/18 ,  H05K3/40 ,  H05K3/42 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K3/403 ,  G02F1/0551 ,  H05K2201/09154 ,  H05K2201/09172 ,  H05K2201/09181 ,  H05K2203/025 ,  H05K3/045 ,  H05K3/064 ,  H05K3/182 ,  H05K3/422 ,  Y10T29/49156

Abstract: Arrays of first and second electrodes extending in mutual registration on opposite faces of the same substrate to an edge portion thereof are mutually interconnected by a plurality of electrically conductive deposits extending across that edge portion. These conductive deposits are distributed along the edge portion in a pattern including a recurring deposit width smaller than the smallest spacing between any adjacent two electrodes of either of the first and second electrodes, alternating with a recurring deposit spacing smaller than the smallest width of any of the first and second electrodes.

Abstract translation: 通过在该边缘部分延伸的多个导电沉积物将相同基底的相对面上相互对准延伸到其边缘部分的第一和第二电极的阵列相互互连。 这些导电沉积物沿着边缘部分沿着图案分布，该图案包括比第一和第二电极中的任一个的任何相邻的两个电极之间的最小间隔小的重复沉积宽度，并且重复沉积间隔小于 第一和第二电极。

公开(公告)号：US20180017247A1

公开(公告)日：2018-01-18

申请号：US15548025

申请日：2016-01-25

Applicant: PHILIPS LIGHTING HOLDING B.V.

Inventor： ROBERT VAN ASSELT ,  MARK JOHANNES ANTONIUS VERHOEVEN ,  JORIS JAN VREHEN ,  GERARDUS FRANCISCUS CORNELIS MARIA LIJTEN ,  LAURENS BAX ,  CHRIS VAN DEN EERENBEEMD

IPC: F21V31/00 ,  F21V3/02 ,  F21V17/10 ,  F21V19/00 ,  H05K3/28 ,  F21V17/06 ,  H05K3/30 ,  H05K1/18

CPC classification number: F21V31/005 ,  F21K9/90 ,  F21V3/02 ,  F21V17/06 ,  F21V17/101 ,  F21V19/0015 ,  F21Y2115/10 ,  H05K1/056 ,  H05K1/181 ,  H05K3/28 ,  H05K3/284 ,  H05K3/303 ,  H05K2201/09154 ,  H05K2201/10106 ,  H05K2201/10522 ,  H05K2203/1147 ,  H05K2203/1316 ,  H05K2203/1327

Abstract: This invention relates to the field of lighting modules employing light emitting diodes (LEDs), and more particularly to LED modules suitable for exposed lens plate luminaires. There is herein provided an LED module having a printed circuit board comprising at least two layers, wherein the interface between two layers at a side surface of the printed circuit board is covered by a protrusion of an optically transmissive cover plate. The same said optically transmissive cover plate is also adapted to cover at least one LED positioned in or on the printed circuit board.