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21.
公开(公告)号:US10892186B2
公开(公告)日:2021-01-12
申请号:US16159128
申请日:2018-10-12
Applicant: Applied Materials, Inc.
Inventor: Ben-Li Sheu , Feng Q. Liu , Tae Hong Ha , Mei Chang , Shirish Pethe
IPC: H01L21/768 , C23C16/34 , C23C16/455 , C23C16/44 , C23C14/34 , C23C16/04 , C23C14/04 , C23C14/02 , C23C16/18 , C23C14/14
Abstract: Methods and apparatus to fill a feature with a seamless gapfill of copper are described. A copper gapfill seed layer is deposited on a substrate surface by atomic layer deposition followed by a copper deposition by physical vapor deposition to fill the gap with copper.
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公开(公告)号:US10714388B2
公开(公告)日:2020-07-14
申请号:US16222630
申请日:2018-12-17
Applicant: APPLIED MATERIALS, INC.
Inventor: Jin Hee Park , Tae Hong Ha , Sang-Hyeob Lee , Thomas Jongwan Kwon , Jaesoo Ahn , Xianmin Tang , Er-Xuan Ping , Sree Kesapragada
IPC: H01L21/768 , H01L21/285 , C23C16/48 , C23C16/455 , C23C16/04 , C23C16/16 , C23C16/18 , C23C16/56 , H01L21/67 , H01L23/532 , H01L27/11556 , H01L27/11582
Abstract: Methods and apparatus for depositing a cobalt layer in a feature, such as, a word line formed in a substrate, are provided herein. In some embodiments, method of processing a substrate includes: exposing a substrate at a first temperature to a cobalt containing precursor to deposit a cobalt layer within a word line feature formed in the substrate, wherein the word line feature is part of a 3D NAND device; and annealing the substrate to remove contaminants from the cobalt layer and to reflow the cobalt layer into the word line feature, wherein the substrate is at a second temperature greater than the first temperature during the annealing.
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公开(公告)号:US12211743B2
公开(公告)日:2025-01-28
申请号:US17466732
申请日:2021-09-03
Applicant: Applied Materials, Inc.
Inventor: Ge Qu , Zhiyuan Wu , Feng Chen , Carmen Leal Cervantes , Yong Jin Kim , Kevin Kashefi , Xianmin Tang , Wenjing Xu , Lu Chen , Tae Hong Ha
IPC: H01L21/768 , H01L21/285 , H01L23/532
Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. A self-assembled monolayer (SAM) is formed on the bottom of the gap, and a barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.
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公开(公告)号:US12157943B2
公开(公告)日:2024-12-03
申请号:US17011667
申请日:2020-09-03
Applicant: Applied Materials, Inc.
Inventor: Wenjing Xu , Gang Shen , Yufei Hu , Feng Chen , Tae Hong Ha
IPC: H01L21/02 , C23C16/02 , C23C16/18 , H01L21/285
Abstract: Methods for selective deposition are described herein. Further, methods for improving selectivity comprising an ammonia plasma pre-clean process are also described. In some embodiments, a silyl amine is used to selectively form a surfactant layer on a dielectric surface. A ruthenium film may then be selectively deposited on a conductive surface. In some embodiments, the ammonia plasma removes oxide contaminations from conductive surfaces without adversely affecting the dielectric surface.
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公开(公告)号:US11939666B2
公开(公告)日:2024-03-26
申请号:US16889017
申请日:2020-06-01
Applicant: APPLIED MATERIALS, INC.
Inventor: Xiangjin Xie , Carmen Leal Cervantes , Feng Chen , Lu Chen , Wenjing Xu , Aravind Kamath , Cheng-Hsiung Matthew Tsai , Tae Hong Ha , Alexander Jansen , Xianmin Tang
CPC classification number: C23C14/564 , H01J37/32082 , H01L21/02043 , H01L21/67017 , H01J2237/022
Abstract: Methods and apparatus for processing a substrate include cleaning and self-assembly monolayer (SAM) formation for subsequent reverse selective atomic layer deposition. An apparatus may include a process chamber with a processing volume and a substrate support including a pedestal, a remote plasma source fluidly coupled to the process chamber and configured to produce radicals or ionized gas mixture with radicals that flow into the processing volume to remove residue or oxides from a surface of the substrate, a first gas delivery system with a first ampoule configured to provide at least one first chemical into the processing volume to produce a SAM on the surface of the substrate, a heating system located in the pedestal and configured to heat a substrate by flowing gas on a backside of the substrate, and a vacuum system fluidly coupled to the process chamber and configured to control heating of the substrate.
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公开(公告)号:US20240038859A1
公开(公告)日:2024-02-01
申请号:US18379600
申请日:2023-10-12
Applicant: Applied Materials, Inc.
Inventor: Bencherki Mebarki , Joung Joo Lee , Wenting Hou , Takashi Kuratomi , Avgerinos V. Gelatos , Jianxin Lei , Liqi Wu , Raymond Hoiman Hung , Tae Hong Ha , Xianmin Tang
IPC: H01L29/417 , H01L21/8234 , H01L21/285
CPC classification number: H01L29/41791 , H01L21/823418 , H01L21/28518
Abstract: A contact stack of a semiconductor device comprises: a source/drain region; a metal silicide layer above the source/drain region; a metal cap layer directly on the metal silicide layer; and a conductor on the metal cap layer. A method comprises: depositing a metal silicide layer in a feature of a substrate; in the absence of an air break after the depositing of the metal silicide layer, preparing a metal cap layer directly on the metal silicide layer; and depositing a conductor on the metal cap layer.
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公开(公告)号:US11784127B2
公开(公告)日:2023-10-10
申请号:US17858274
申请日:2022-07-06
Applicant: Applied Materials, Inc.
Inventor: Wenjing Xu , Feng Chen , Tae Hong Ha , Xianmin Tang , Lu Chen , Zhiyuan Wu
IPC: H01L23/532 , H01L23/522 , H01L21/768
CPC classification number: H01L23/53238 , H01L21/76844 , H01L21/76846 , H01L21/76849 , H01L23/5226
Abstract: Electronic devices and methods of forming electronic devices using a ruthenium or doped ruthenium liner and cap layer are described. A liner with a ruthenium layer and a cobalt layer is formed on a barrier layer. A conductive fill forms a second conductive line in contact with the first conductive line.
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公开(公告)号:US20220336223A1
公开(公告)日:2022-10-20
申请号:US17846155
申请日:2022-06-22
Applicant: Applied Materials, Inc.
Inventor: Yu Lei , Xuesong Lu , Tae Hong Ha , Xianmin Tang , Andrew Nguyen , Tza-Jing Gung , Philip A. Kraus , Chung Nang Liu , Hui Sun , Yufei Hu
IPC: H01L21/311 , H01L21/02 , H01J37/32 , H01L21/683 , H01L21/3105 , H01L21/67 , H01L21/8234
Abstract: Described is a process to clean up junction interfaces for fabricating semiconductor devices involving forming low-resistance electrical connections between vertically separated regions. An etch can be performed to remove silicon oxide on silicon surface at the bottom of a recessed feature. Described are methods and apparatus for etching up the bottom oxide of a hole or trench while minimizing the effects to the underlying epitaxial layer and to the dielectric layers on the field and the corners of metal gate structures. The method for etching features involves a reaction chamber equipped with a combination of capacitively coupled plasma and inductive coupled plasma. CHxFy gases and plasma are used to form protection layer, which enables the selectively etching of bottom silicon dioxide by NH3—NF3 plasma. Ideally, silicon oxide on EPI is removed to ensure low-resistance electric contact while the epitaxial layer and field/corner dielectric layers are—etched only minimally or not at all.
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29.
公开(公告)号:US11417568B2
公开(公告)日:2022-08-16
申请号:US16845749
申请日:2020-04-10
Applicant: APPLIED MATERIALS, INC.
Inventor: Wei Lei , Yi Xu , Yu Lei , Tae Hong Ha , Raymond Hung , Shirish A. Pethe
IPC: H01L21/768 , H01L21/3213 , H01L21/285
Abstract: Methods and apparatus for selectively depositing a tungsten layer atop a dielectric surface. In embodiments the method includes: depositing a tungsten layer via a physical vapor deposition (PVD) process atop a substrate field and atop a sidewall and a dielectric bottom surface of a feature disposed in a substrate to form a first tungsten portion having a first thickness atop the substrate field, a second tungsten portion having a second thickness atop the sidewall, and a third tungsten portion having a third thickness atop the dielectric bottom surface, wherein the second thickness is less than the first thickness and third thickness; oxidizing a top surface of the tungsten layer to form a first oxidized tungsten portion atop the substrate field, a second oxidized tungsten portion atop the side wall, and a third oxidized tungsten portion atop the dielectric bottom surface; removing the first oxidized tungsten portion, the second oxidized tungsten portion and the third oxidized tungsten portion, wherein the second tungsten portion is completely removed from the sidewall; and passivating or completely removing the first tungsten portion from the substrate field.
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公开(公告)号:US20190341302A1
公开(公告)日:2019-11-07
申请号:US16401133
申请日:2019-05-02
Applicant: Applied Materials, Inc.
Inventor: Yu Lei , Sang-Hyeob Lee , Chris Pabelico , Yi Xu , Tae Hong Ha , Xianmin Tang , Jin Hee Park
IPC: H01L21/768 , H01L21/02
Abstract: Apparatuses and methods to provide electronic devices having metal films are provided. Some embodiments of the disclosure utilize a metallic tungsten layer as a liner that is filled with a metal film comprising cobalt. The metallic tungsten layer has good adhesion to the cobalt leading to enhanced cobalt gap-fill performance.
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