公开(公告)号：US20090026633A1

公开(公告)日：2009-01-29

申请号：US12216849

申请日：2008-07-11

Applicant: Shih-Ping Hsu

Inventor： Shih-Ping Hsu

IPC: H01L21/60 ,  H01L23/538

CPC classification number: H05K3/305 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H05K3/3436 ,  H05K2201/10234 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A flip chip package structure and a method for manufacturing the same are disclosed. The method for manufacturing a flip chip package structure comprises following steps: (a) providing a semiconductor chip including a plurality of electrode pads and a plurality of first solders, and providing a packaging substrate having a plurality of conductive pads and a plurality of second solders (b) forming a resin adhesive layer on the active surface of the semiconductor chip, and the first solders are exposed from the resin adhesive layer; (c) assembling the packaging substrate and the semiconductor chip with the resin adhesive layer formed thereon to form an assembly unit; and (d) reflow soldering the assembly unit to fuse the first solders of the semiconductor chip with the second solders of the packaging substrate to form fused solders, and the packaging substrate is adhered with the resin adhesive layer.

Abstract translation: 公开了一种倒装芯片封装结构及其制造方法。 制造倒装芯片封装结构的方法包括以下步骤：（a）提供包括多个电极焊盘和多个第一焊料的半导体芯片，并提供具有多个导电焊盘和多个第二焊料的封装衬底 （b）在半导体芯片的有效表面上形成树脂粘合剂层，第一焊料从树脂粘合剂层露出; （c）将所述封装基板和所述半导体芯片与形成在其上的树脂粘合剂层组装以形成组装单元; 和（d）回流焊接组装单元以将半导体芯片的第一焊料与包装基板的第二焊料熔合以形成熔融焊料，并且用树脂粘合剂层粘合包装基板。

公开(公告)号：US20080184555A1

公开(公告)日：2008-08-07

申请号：US12068270

申请日：2008-02-05

Applicant: Yoshihiro Machida

Inventor： Yoshihiro Machida

IPC: H05K3/36

CPC classification number: H05K3/462 ,  H05K3/4647 ,  H05K2201/10234 ,  H05K2203/063 ,  H05K2203/0733 ,  H05K2203/1327 ,  H05K2203/167 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: First, a plurality of wiring boards are fabricated at separate steps. The first wiring board includes a Cu post formed on a wiring layer on one surface of a substrate, and a first stopper layer formed at a desired position around the Cu post. The second wiring board includes a through hole for insertion of the Cu post therethrough, a connection terminal formed on a wiring layer on one surface of a substrate, and a second stopper layer that engages the first stopper layer and functions to suppress in-plane misalignment. The third wiring board includes a connection terminal formed on a wiring layer on one surface of a substrate. Then, the wiring boards are stacked up, as aligned with one another so that the wiring layers are interconnected via the Cu post and the connection terminals, to thereby electrically connect the wiring boards. Thereafter, resin is filled into gaps between the wiring boards.

Abstract translation: 首先，以分开的步骤制造多个布线板。 第一布线板包括形成在基板的一个表面上的布线层上的Cu柱和形成在Cu柱周围的期望位置的第一阻挡层。 第二布线板包括用于插入Cu柱的通孔，形成在基板的一个表面上的布线层上的连接端子和与第一阻挡层接合并用于抑制面内未对准的功能的第二阻挡层 。 第三布线板包括形成在基板的一个表面上的布线层上的连接端子。 然后，将布线基板彼此对准地堆叠起来，使得布线层经由铜柱和连接端子互连，从而电连接布线板。 此后，将树脂填充到布线板之间的间隙中。

公开(公告)号：US20080012131A1

公开(公告)日：2008-01-17

申请号：US11723395

申请日：2007-03-19

Applicant: Yasuo Tanaka

Inventor： Yasuo Tanaka

IPC: H05K7/02 ,  H01L23/48

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05568 ,  H01L2224/056 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/351 ,  H05K3/3436 ,  H05K2201/10234 ,  H05K2201/10719 ,  Y02P70/613 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A semiconductor pellet is mounted on a circuit board. The pellet has a first terminal pad and a first solder layer formed on the first terminal pad. The circuit board has a second terminal pad and a second solder layer formed on the second terminal pad. A metal ball is positioned between the first and the second solder layers such that when the solder layers are reflowed, an intermetallic compound is formed between the metal ball and the first terminal pad and between the ball and the second terminal pad, the intermetallic compound including a thickness not more than 10 μm in areas in which said metal ball is closest to the second terminal pad and to the first terminal. The metal ball has a surface neither in contact with the first solder layer nor the second solder layer.

Abstract translation: 半导体芯片安装在电路板上。 该颗粒具有第一端子焊盘和形成在第一端子焊盘上的第一焊料层。 电路板具有形成在第二端子焊盘上的第二端子焊盘和第二焊料层。 金属球位于第一和第二焊料层之间，使得当焊料层被回流时，在金属球和第一端子焊盘之间以及球和第二端子焊盘之间形成金属间化合物，金属间化合物包括 在所述金属球最接近第二端子垫的区域和第一端子处的厚度不大于10微米。 金属球的表面既不与第一焊料层接触也不与第二焊料层接触。

公开(公告)号：US20070290339A1

公开(公告)日：2007-12-20

申请号：US11425353

申请日：2006-06-20

Applicant: Daewoong Suh ,  Yongki Min

Inventor： Daewoong Suh ,  Yongki Min

IPC: H01L23/48

CPC classification number: H01L24/10 ,  C22C45/10 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/351 ,  H05K1/09 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/0116 ,  H05K2201/10234 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A foamed bulk metallic glass electrical connection is formed on a substrate of an integrated circuit package. The foamed bulk metallic glass electrical connection exhibits a low modulus that resists cracking during shock and dynamic loading. The foamed bulk metallic glass electrical connection is used as a solder bump for communication between an integrated circuit device and external structures. A process of forming the foamed bulk metallic glass electrical connection includes mixing bulk metallic glass with a blowing agent.

Abstract translation: 在集成电路封装的基板上形成发泡体金属玻璃电连接。 发泡体金属玻璃电气连接显示出低冲击强度和动态载荷下的抗开裂性能。 发泡体金属玻璃电连接用作集成电路器件和外部结构之间的通信的焊料凸块。 形成发泡体金属玻璃电连接的方法包括将块状金属玻璃与发泡剂混合。

公开(公告)号：US20070258223A1

公开(公告)日：2007-11-08

申请号：US11822137

申请日：2007-07-02

Applicant: Leon Khilchenko ,  Mark Gailus

Inventor： Leon Khilchenko ,  Mark Gailus

IPC: H05K1/02

CPC classification number: H05K3/4038 ,  H05K1/0298 ,  H05K3/321 ,  H05K3/3447 ,  H05K3/4046 ,  H05K3/4069 ,  H05K2201/0305 ,  H05K2201/0919 ,  H05K2201/10234 ,  H05K2201/1059 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/1446 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49147 ,  Y10T29/49165

Abstract: What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to intersect the conductor. A conductive body in an activated state is introduced into the non-conductive via, and upon contacting the conductor, the activated state conductive body adheres to the conductor. The activated state conductive body is then effected to a deactivated state, wherein the conductive body is affixed to the conductor to provide an electrical connection thereto.

Abstract translation: 提供的是具有多个堆叠的电介质层的多层PCB，设置在多个电介质层中的至少一个介质层上的导体，以及延伸穿过多个电介质层的至少一部分的非导电通孔， 与导体相交。 处于激活状态的导电体被引入到非导电通孔中，并且在与导体接触时，活化状态导电体粘附到导体。 然后使激活状态的导电体进入去激活状态，其中导电体固​​定到导体以提供与其的电连接。

公开(公告)号：US07265046B2

公开(公告)日：2007-09-04

申请号：US10529172

申请日：2003-09-24

Applicant: Masuo Kondo ,  Fumiaki Kikui

Inventor： Masuo Kondo ,  Fumiaki Kikui

IPC: H01L21/44

CPC classification number: H05K3/3436 ,  B23K35/0244 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05568 ,  H01L2224/05644 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15747 ,  H01L2924/15787 ,  H05K3/3463 ,  H05K2201/10234 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A solder ball 50 according to the present invention includes a spherical core 2 and a solder layer 4, which includes Sn and Ag and which is provided so as to wrap the core 2 up. The amount of water contained in the solder layer 4 is 100 μl/g or less when represented by the amount of water vapor in standard conditions.

Abstract translation: 根据本发明的焊球50包括球形芯2和焊料层4，其包括Sn和Ag，并且被设置成将芯2包裹起来。 当以标准条件下的水蒸气量表示时，焊料层4中所含的水的量为100mul / g以下。

公开(公告)号：US07240425B2

公开(公告)日：2007-07-10

申请号：US10422515

申请日：2003-04-24

Applicant: Leon M. Khilchenko ,  Mark W. Gailus

Inventor： Leon M. Khilchenko ,  Mark W. Gailus

IPC: H05K3/30

CPC classification number: H05K3/4038 ,  H05K1/0298 ,  H05K3/321 ,  H05K3/3447 ,  H05K3/4046 ,  H05K3/4069 ,  H05K2201/0305 ,  H05K2201/0919 ,  H05K2201/10234 ,  H05K2201/1059 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/1446 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49147 ,  Y10T29/49165

Abstract: What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to intersect the conductor. A conductive body in an activated state is introduced into the non-conductive via, and upon contacting the conductor, the activated state conductive body adheres to the conductor. The activated state conductive body is then effected to a deactivated state, wherein the conductive body is affixed to the conductor to provide an electrical connection thereto.

Abstract translation: 提供的是具有多个堆叠的电介质层的多层PCB，设置在多个电介质层中的至少一个介质层上的导体，以及延伸穿过多个电介质层的至少一部分的非导电通孔， 与导体相交。 处于激活状态的导电体被引入到非导电通孔中，并且在与导体接触时，活化状态导电体粘附到导体。 然后使激活状态的导电体进入去激活状态，其中导电体固​​定到导体以提供与其的电连接。

公开(公告)号：US20070148829A1

公开(公告)日：2007-06-28

申请号：US11622950

申请日：2007-01-12

Applicant: Toyokazu YOSHINO ,  Katsuya OKAMOTO ,  Shigeki OGATA ,  Shinji MORIMOTO ,  Kouji NAKASHIMA

Inventor： Toyokazu YOSHINO ,  Katsuya OKAMOTO ,  Shigeki OGATA ,  Shinji MORIMOTO ,  Kouji NAKASHIMA

IPC: H01L21/82

CPC classification number: H05K3/4046 ,  H05K1/0393 ,  H05K3/386 ,  H05K3/4084 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4635 ,  H05K2201/0195 ,  H05K2201/0221 ,  H05K2201/0379 ,  H05K2201/043 ,  H05K2201/096 ,  H05K2201/10234 ,  H05K2201/10416 ,  H05K2203/0278 ,  H05K2203/041 ,  H05K2203/082 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49213

Abstract: Provided is an FPC, which comprises an insulating layer 2, wiring layers 3 and 4 laminated above and under the insulating layer 2, and a layer connection for connecting the wiring layers 3 and 4 electrically. The layer connection is constituted to comprise: a conductor press-fit hole 5 of a cone shape extending through the insulating layer 2 and the upper and lower wiring layers 3 and 4 and expanded to the side of one wiring layer 3; and a conductor 6 filled and press-fitted without any clearance in the conductor press-fit hole such that it is jointed to the wiring upper layer 3 deformed into the cone shape of the conductor press-fit hole 5, and is protruded from the other wiring lower layer 4 to have its surface partially coated and jointed. As a result, the contact area between the wiring layers 3 and 4 and the conductor 6 filled in the conductor press-fit hole 5 can be enlarged to retain the contact strength between the wiring layers 3 and 4 and the conductor 6 sufficiently thereby to provide a high connection reliability for the layer connection.

Abstract translation: 提供一种FPC，其包括绝缘层2，层叠在绝缘层2上方和下方的布线层3和4以及用于电连接布线层3和4的层连接。 层连接构成为包括：延伸穿过绝缘层2和上下布线层3和4的锥形导体压入孔5，并扩展到一个布线层3的侧面; 导体6在导体压配合孔内填充并压配合而没有任何间隙，使其接合到变形为导体压配合孔5的锥形的布线上层3，并从另一个突出 布线下层4以使其表面部分涂覆和接合。 结果，可以扩大布线层3和4与填充在导体压入孔5中的导体6之间的接触面积，以充分地保持布线层3和4与导体6之间的接触强度，从而提供 层连接的高连接可靠性。

公开(公告)号：US20070131141A1

公开(公告)日：2007-06-14

申请号：US10556516

申请日：2004-05-17

Applicant: Tamiharu Masatoki ,  Arata Tsurusaki ,  Masashi Kumagai ,  Takashi Ouchi ,  Takashi Kinase ,  Masataka Sugioka ,  Takeshi Nakano

Inventor： Tamiharu Masatoki ,  Arata Tsurusaki ,  Masashi Kumagai ,  Takashi Ouchi ,  Takashi Kinase ,  Masataka Sugioka ,  Takeshi Nakano

IPC: B32B15/08 ,  C09D183/04 ,  B05D3/02 ,  B05D1/36

CPC classification number: C23C28/00 ,  B23K35/0244 ,  C23C2/08 ,  C23C2/26 ,  C23C22/03 ,  C23C28/021 ,  C23C2222/20 ,  H01L23/49816 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/0224 ,  H05K2201/10234 ,  Y02P70/613 ,  Y10T428/12569 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: There is disclosed is a method comprising surface-processing a Sn based, Sn alloy based or Sn—Zn alloy based solder particle (1), applied as a coating, such as by electrical plating or melt plating, to the surface of a metal material, such as iron, a steel plate or copper, with a phosphate and a silicium containing compound, to form a protective film (2). There are also disclosed a solder material (6) in which a protective film (2) formed of a phosphate and a silicium containing compound is formed on the surface of the Sn—Zn based solder particle (1), and a solder paste formed of this solder material (6) and the flux.

Abstract translation: 公开了一种方法，其特征在于，将基于Sn，Sn合金或Sn-Zn合金的焊料粒子（1）进行表面处理，作为涂层，例如通过电镀或熔融镀敷，涂敷到金属材料的表面 ，例如铁，钢板或铜，与磷酸盐和含硅化合物形成保护膜（2）。 还公开了一种焊料（6），其中在Sn-Zn基焊料颗粒（1）的表面上形成由磷酸盐和含硅化合物形成的保护膜（2）和由 这种焊料（6）和焊剂。

公开(公告)号：US20070084904A1

公开(公告)日：2007-04-19

申请号：US10557698

申请日：2004-05-24

Applicant: Masato Sumikawa ,  Rina Murayama ,  Masashi Ogawa ,  Kiyoto Matsushita

Inventor： Masato Sumikawa ,  Rina Murayama ,  Masashi Ogawa ,  Kiyoto Matsushita

IPC: A47J36/02

CPC classification number: H05K3/3436 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05655 ,  H01L2224/11 ,  H05K3/3463 ,  H05K2201/10234 ,  Y02P70/613 ,  H01L2924/00014

Abstract: A conductive ball is formed by coating a generally spherical-shaped core made of a non-metallic material with a coating layer composed of a Cu layer and an Sn-5.5Ag alloy layer of non-eutectic composition. The conductive ball is disposed on a land of an electronic component via flux and reflown at heating temperatures whose peak temperatures reach 250 to 260° C. The Sn-5.5Ag alloy of non-eutectic composition is put in the state in which a solidus portion and a liquidus portion coexist to keep flowability relatively small. The conductive ball is fixed on the land without exposing an SnCu layer formed on the Cu layer. An electrode is formed without exposing the SnCu layer having relatively poor solder wettability. Between the electronic component and a circuit board, a joint section having a good electric conduction property and mechanical strength may be formed.

Abstract translation: 通过涂覆由非金属材料制成的大致球形的芯由具有Cu层和非共晶组成的Sn-5.5Ag合金层的涂层形成导电球。 导电球通过焊剂置于电子部件的焊盘上，并在峰值温度达到250〜260℃的加热温度下进行退火。将非共晶组合物的Sn-5.5Ag合金置于固体部分 并且液相部分共存以保持流动性相对较小。 导电球固定在焊盘上，而不暴露形成在Cu层上的SnCu层。 形成电极，而不会使焊锡润湿性差的SnCu层露出。 在电子部件与电路基板之间，可以形成具有良好的导电性和机械强度的接合部。