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    Process for encapsulating a micro-device by attaching a cap and depositing getter through the cap
    31.
    发明授权
    Process for encapsulating a micro-device by attaching a cap and depositing getter through the cap 有权
    用于通过附接帽并通过盖子沉积吸气剂来封装微器件的方法

    公开(公告)号：US08999762B2

    公开(公告)日：2015-04-07

    申请号：US13645717

    申请日：2012-10-05

    Applicant: Commissariat à l'énergie atomique et aux énergies alternatives

    Inventor： Xavier Baillin ,  Jean-Louis Pornin

    IPC: H01L21/16 ,  B81C1/00 ,  H01L23/26 ,  H01L21/50

    CPC classification number: B81C1/00285 ,  B81C2201/019 ,  B81C2203/0118 ,  B81C2203/0145 ,  H01L21/50 ,  H01L23/26 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A process for encapsulating a micro-device in a cavity formed between a first and a second substrate is provided, including producing the micro-device in or on the first substrate; attaching and securing the second substrate to the first substrate, thereby forming the cavity in which the micro-device is placed; producing at least one hole through one of the two substrates, leading into the cavity opposite a portion of the other of the two substrates; depositing at least one getter material portion through the hole on said portion of the other of the two substrates; and hermetically sealing the cavity by closing the hole.

    Abstract translation: 提供了一种用于将微器件封装在形成在第一和第二衬底之间的空腔中的方法，包括在第一衬底中或第一衬底上产生微器件; 将第二基板附接并固定到第一基板，从而形成其中放置微型装置的空腔; 通过两个基板中的一个产生至少一个孔，导致与两个基板中另一个的一部分相对的空腔; 通过所述两个基板中另一个的所述部分上的所述孔沉积至少一个吸气材料部分; 并通过关闭孔气密封空腔。

    Micro-electromechanical semiconductor comprising stress measuring element and stiffening braces separating wall depressions
    32.
    发明授权
    Micro-electromechanical semiconductor comprising stress measuring element and stiffening braces separating wall depressions 有权
    微机电半导体包括应力测量元件和分隔壁凹的加强支架

    公开(公告)号：US08994128B2

    公开(公告)日：2015-03-31

    申请号：US13521158

    申请日：2011-01-10

    Applicant: Arnd Ten Have

    Inventor： Arnd Ten Have

    IPC: G01L9/00 ,  B81B3/00 ,  B81C1/00

    CPC classification number: B81C1/00158 ,  B81B3/0018 ,  B81B3/0021 ,  B81B3/007 ,  B81B3/0072 ,  B81B3/0081 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C1/00626 ,  B81C99/0035 ,  B81C2201/019 ,  G01L9/0047 ,  H01L29/4916 ,  H01L29/84

    Abstract: The micro-electromechanical semiconductor component is provided with a semiconductor substrate in which a cavity is formed, which is delimited by lateral walls and by a top and a bottom wall. In order to form a flexible connection to the region of the semiconductor substrate, the top or bottom wall is provided with trenches around the cavity, and bending webs are formed between said trenches. At least one measuring element that is sensitive to mechanical stresses is formed within at least one of said bending webs. Within the central region surrounded by the trenches, the top or bottom wall comprises a plurality of depressions reducing the mass of the central region and a plurality of stiffening braces separating the depressions.

    Abstract translation: 微机电半导体部件设置有半导体基板，其中形成有由侧壁和顶壁和底壁限定的空腔。 为了形成与半导体衬底的区域的柔性连接，顶壁或底壁在空腔周围设置有沟槽，并且在所述沟槽之间形成弯曲腹板。 在至少一个所述弯曲腹板内形成至少一个对机械应力敏感的测量元件。 在由沟槽围绕的中心区域内，顶壁或底壁包括减少中心区域的质量的多个凹陷和分开凹陷的多个加强支架。

    METHOD OF ENCAPSULATING A MICRO-DEVICE BY ANODIC BONDING
    35.
    发明申请
    METHOD OF ENCAPSULATING A MICRO-DEVICE BY ANODIC BONDING 有权
    通过阳极结合封装微型器件的方法

    公开(公告)号：US20140273351A1

    公开(公告)日：2014-09-18

    申请号：US14198947

    申请日：2014-03-06

    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

    Inventor： Stephane NICOLAS

    IPC: B81C1/00

    CPC classification number: B81C1/00269 ,  B81C1/00285 ,  B81C2201/019 ,  B81C2203/0118 ,  B81C2203/031

    Abstract: A method for encapsulating at least one micro-device, comprising at least the following steps: bonding a face of a first substrate comprising at least one material impermeable to noble gases, in contact with a second substrate comprising glass and with a thickness of about 300 μm or more; etching at least one cavity through the second substrate such that side walls of the cavity are at least partly formed by remaining portions of the second substrate and that an upper wall of the cavity is formed by part of said face of the first substrate; anodic bonding of the remaining portions of the second substrate in contact with a third substrate in which the micro-device is formed, such that the micro-device is encapsulated in the cavity.

    Abstract translation: 一种用于封装至少一个微器件的方法，包括至少以下步骤：将包含至少一种不可渗透的材料的第一基底的表面与惰性气体接触，所述第一基底与含有玻璃的第二基底接触并具有约300的厚度 μm以上; 通过所述第二基板蚀刻至少一个空腔，使得所述空腔的侧壁至少部分地由所述第二基板的剩余部分形成，并且所述空腔的上壁由所述第一基板的所述面的一部分形成; 与形成有微器件的第三基板接触的第二基板的剩余部分的阳极接合，使得微器件被封装在空腔中。

    SENSOR PACKAGING METHOD AND SENSOR PACKAGES
    37.
    发明申请
    SENSOR PACKAGING METHOD AND SENSOR PACKAGES 有权
    传感器包装方法和传感器包装

    公开(公告)号：US20140124958A1

    公开(公告)日：2014-05-08

    申请号：US14151305

    申请日：2014-01-09

    Applicant: Philip H. Bowles ,  Paige M. Holm ,  Stephen R. Hooper ,  Raymond M. Roop

    Inventor： Philip H. Bowles ,  Paige M. Holm ,  Stephen R. Hooper ,  Raymond M. Roop

    IPC: H01L23/528

    CPC classification number: H01L23/528 ,  B81C1/0023 ,  B81C1/00238 ,  B81C2201/019 ,  B81C2203/0792 ,  H01L2224/48091 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: A method (80) entails providing (82) a structure (117), providing (100) a controller element (102, 24), and bonding (116) the controller element to an outer surface (52, 64) of the structure. The structure includes a sensor wafer (92) and a cap wafer (94) Inner surfaces (34, 36) of the wafers (92, 94) are coupled together, with sensors (30) interposed between the wafers. One wafer (94, 92) includes a substrate portion (40, 76) with bond pads (42) formed on its inner surface (34, 36). The other wafer (94, 92) conceals the substrate portion (40, 76). After bonding, methodology (80) entails forming (120) conductive elements (60) on the element (102, 24), removing (126) material sections (96, 98, 107) from the wafers to expose the bond pads, forming (130) electrical interconnects (56), applying (134) packaging material (64), and singulating (138) to produce sensor packages (20, 70).

    Abstract translation: 方法（80）需要提供（82）结构（117），提供（100）控制器元件（102,24），并将控制器元件（116）结合（116）到结构的外表面（52,64）。 该结构包括传感器晶片（92）和盖晶片（94）晶片（92,94）的内表面（34,36）被耦合在一起，传感器（30）插入晶片之间。 一个晶片（94,92）包括具有形成在其内表面（34,36）上的接合焊盘（42）的衬底部分（40,76）。 另一个晶片（94,92）隐藏基板部分（40,76）。 在结合之后，方法学（80）需要在元件（102,24）上形成（120）导电元件（60），从晶片去除（126）材料部分（96,98,107）以暴露接合焊盘，形成 130）电互连（56），施加（134）包装材料（64）和单分离（138）以产生传感器封装（20,70）。

    Method for making a structure comprising at least one multi-thick active part
    38.
    发明授权
    Method for making a structure comprising at least one multi-thick active part 有权
    制造包括至少一个多厚活性部分的结构的方法

    公开(公告)号：US08716052B2

    公开(公告)日：2014-05-06

    申请号：US13688746

    申请日：2012-11-29

    Applicant: Commissariat a l'energie atomique et aux energies alternatives

    Inventor： Philippe Robert

    IPC: H01L21/00

    CPC classification number: H01L21/20 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81C1/00626 ,  B81C2201/0115 ,  B81C2201/019 ,  G01P15/0802

    Abstract: A method for making a structure comprising an active part comprising at least two layers from a first single crystal silicon substrate, said method comprising the steps of: a) making at least one porous silicon zone in the first substrate, b) making an epitaxial growth deposition of a single crystal silicon layer on the entire surface of the first substrate and the surface of the porous silicon zone, c) machining the epitaxially grown single crystal layer at the porous silicon zone to make a first suspended zone, d) removing or oxidizing the porous silicon, e) depositing a sacrificial layer being selective towards silicon, f) machining the first substrate, g) releasing the suspended zones by withdrawing the sacrificial layer.

    Abstract translation: 一种用于制造包括由第一单晶硅衬底至少包含两层的有源部分的结构的方法，所述方法包括以下步骤：a）在所述第一衬底中制备至少一个多孔硅区，b）制备外延生长 在第一基板的整个表面和多孔硅区域的表面上沉积单晶硅层，c）在多孔硅区域加工外延生长的单晶层以制成第一悬浮区，d）去除或氧化 多孔硅，e）沉积对硅有选择性的牺牲层，f）加工第一衬底，g）通过抽出牺牲层来释放悬浮区。

    SENSOR PACKAGING METHOD AND SENSOR PACKAGES
    39.
    发明申请
    SENSOR PACKAGING METHOD AND SENSOR PACKAGES 有权
    传感器包装方法和传感器包装

    公开(公告)号：US20140061948A1

    公开(公告)日：2014-03-06

    申请号：US13597824

    申请日：2012-08-29

    Applicant: Philip H. Bowles ,  Paige M. Holm ,  Stephen R. Hooper ,  Raymond M. Roop

    Inventor： Philip H. Bowles ,  Paige M. Holm ,  Stephen R. Hooper ,  Raymond M. Roop

    IPC: H01L23/52 ,  H01L21/50

    CPC classification number: H01L23/528 ,  B81C1/0023 ,  B81C1/00238 ,  B81C2201/019 ,  B81C2203/0792 ,  H01L2224/48091 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: A method (80) entails providing (82) a structure (117), providing (100) a controller element (102, 24), and bonding (116) the controller element to an outer surface (52, 64) of the structure (117). The structure includes a sensor wafer (92) and a cap wafer (94). Inner surfaces (34, 36) of the wafers (92, 94) are coupled together, with sensors (30) interposed between the wafers (92, 94). One wafer (94, 92) includes a substrate portion (40, 76) with bond pads (42) formed on its inner surface (34, 36). The other wafer (94, 92) conceals the substrate portion (40, 76). After bonding, methodology (80) entails forming (120) conductive elements (60) on the element (102, 24), removing (126) material sections (96, 98, 107) from the wafers (92, 94, 102) to expose the bond pads (42), forming (130) electrical interconnects (56), applying (134) packaging material (64), and singulating (138) to produce sensor packages (20, 70).

    Abstract translation: 方法（80）需要提供（82）结构（117），提供（100）控制器元件（102,24），并且将所述控制器元件（116）结合（116）到所述结构的外表面（52,64） 117）。 该结构包括传感器晶片（92）和盖晶片（94）。 晶片（92,94）的内表面（34,36）被耦合在一起，传感器（30）置于晶片（92,94）之间。 一个晶片（94,92）包括具有形成在其内表面（34,36）上的接合焊盘（42）的衬底部分（40,76）。 另一个晶片（94,92）隐藏基板部分（40,76）。 在键合之后，方法（80）需要在元件（102,24）上形成（120）导电元件（60），将材料部分（96,98,107）从晶片（92,94,107）移除到 露出接合焊盘（42），形成（130）电互连（56），施加（134）包装材料（64）和单分离（138）以产生传感器封装（20,70）。

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