公开(公告)号：US09093401B2

公开(公告)日：2015-07-28

申请号：US14473266

申请日：2014-08-29

Applicant: GLOBALFOUNDRIES, INC.

Inventor： Xunyuan Zhang ,  Xiuyu Cai

IPC: H01L21/3213 ,  H01L21/321 ,  H05K3/00 ,  H01L21/768 ,  H01L23/532 ,  H01L45/00 ,  C09G1/02 ,  H01L21/283 ,  H05K3/26

CPC classification number: H01L21/3212 ,  C09G1/02 ,  H01L21/283 ,  H01L21/32115 ,  H01L21/7684 ,  H01L21/76888 ,  H01L23/53228 ,  H01L45/1633 ,  H01L2924/0002 ,  H05K3/00 ,  H05K3/26 ,  H05K2201/0376 ,  H05K2203/0346 ,  H01L2924/00

Abstract: Greater planarity is achieved between surfaces of a conductive structure and a layer within which the conductive structure resides. A portion of the conductive structure protruding above the surface of the layer is selectively oxidized, at least in part, to form an oxidized portion. The oxidized portion is then removed, at least partially, to facilitate achieving greater planarity. The protruding portions may optionally be formed by selectively disposing conductive material over the conductive structure, when that the conductive structure is initially recessed below the surface of the layer. A further embodiment includes selectively oxidizing a portion of the conductive structure below the surface of the layer, removing at least some of the oxidized portion so that an upper surface of the conductive structure is below the upper surface of the layer, and planarizing the upper surface of the layer to the upper surface of the conductive structure.

Abstract translation: 在导电结构的表面和导电结构所在的层之间实现更大的平坦度。 突出在层表面之上的导电结构的一部分被至少部分地选择性地氧化以形成氧化部分。 至少部分地去除氧化部分，以便于实现更大的平坦度。 当导电结构最初凹陷在层的表面下方时，可以可选地通过在导电结构上方选择性地设置导电材料来形成突出部分。 另一个实施例包括选择性地将导电结构的一部分氧化在该层的表面之下，去除至少一些氧化部分，使得导电结构的上表面在该层的上表面之下，并平坦化上表面 的层到导电结构的上表面。

公开(公告)号：US09082438B2

公开(公告)日：2015-07-14

申请号：US14196370

申请日：2014-03-04

Applicant: PANASONIC CORPORATION

Inventor： Shingo Yoshioka ,  Hiroaki Fujiwara ,  Hiromitsu Takashita ,  Tsuyoshi Takeda

IPC: H01L23/48 ,  G11B5/48 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H05K1/11 ,  H05K1/18 ,  H05K3/18 ,  H01L21/66 ,  H01L23/31 ,  H01L21/56

CPC classification number: G11B5/486 ,  H01L21/565 ,  H01L22/12 ,  H01L23/3121 ,  H01L24/24 ,  H01L24/25 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/82 ,  H01L24/83 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/2405 ,  H01L2224/24051 ,  H01L2224/241 ,  H01L2224/24137 ,  H01L2224/24146 ,  H01L2224/24226 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73267 ,  H01L2224/82009 ,  H01L2224/82039 ,  H01L2224/82101 ,  H01L2224/82105 ,  H01L2224/82931 ,  H01L2224/82947 ,  H01L2224/8385 ,  H01L2224/85 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/386 ,  H01L2924/3862 ,  H05K1/111 ,  H05K1/181 ,  H05K3/184 ,  H05K2201/0376 ,  H05K2201/09472 ,  H05K2203/1461 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/82102 ,  H01L2224/8284 ,  H01L2224/0401 ,  H01L2224/45015 ,  H01L2924/207

Abstract: One aspect of the present invention is a three-dimensional structure that has a concave-convex form including a gutter for wiring having at least partially a width of 20 μm or less, wherein at least a part of a wiring conductor is embedded in the gutter for wiring, and a wiring that extends in such a manner as to creep along the concave-convex form is provided.

Abstract translation: 本发明的一个方面是具有凹凸形状的三维结构，该凹凸形状包括具有至少部分宽度为20μm或更小的布线的布线槽，其中布线导体的至少一部分嵌入沟槽 并且布线以沿凹凸形状蠕动的方式延伸。

公开(公告)号：US20150092358A1

公开(公告)日：2015-04-02

申请号：US14072803

申请日：2013-11-06

Applicant: Chin-Sheng Wang ,  Ching-Sheng Chen ,  Chao-Min Wang

Inventor： Chin-Sheng Wang ,  Ching-Sheng Chen ,  Chao-Min Wang

IPC: H05K1/11

CPC classification number: H05K3/007 ,  H01L2224/48091 ,  H01L2224/48228 ,  H01L2924/15311 ,  H05K3/3452 ,  H05K2201/0376 ,  H05K2203/0156 ,  H01L2924/00014

Abstract: A package carrier including a removable supporting plate and a circuit board is provided. The removable supporting plate includes a dielectric layer, a copper foil layer and a releasing layer. The dielectric layer is disposed between the copper foil layer and the releasing layer. The circuit board is disposed on the removable supporting plate and directly contacts the releasing layer. A thickness of the circuit board is between 30 μm and 100 μm.

Abstract translation: 提供一种包括可拆卸支撑板和电路板的封装载体。 可移除的支撑板包括介电层，铜箔层和释放层。 介电层设置在铜箔层和释放层之间。 电路板设置在可拆卸的支撑板上并直接接触释放层。 电路板的厚度在30μm和100μm之间。

公开(公告)号：US20150041181A1

公开(公告)日：2015-02-12

申请号：US14454182

申请日：2014-08-07

Applicant: TAIYO INK MFG. CO., LTD.

Inventor： Takayuki CHUJO ,  Arata ENDO

IPC: H05K1/02 ,  H05K1/03 ,  H05K3/18 ,  H05K3/00 ,  H05K3/10

CPC classification number: H05K3/107 ,  H05K3/0032 ,  H05K3/465 ,  H05K2201/0376 ,  H05K2203/308 ,  Y10T428/31515

Abstract: A process for the preparation of a printed wiring board that can prevent generation of crack and warpage is provided. A process for the preparation of a printed wiring board, comprising a step of forming a curable resin layer and a non-curable resin layer sequentially on a surface of a substrate; a step of forming depressions in the non-curable resin layer and the curable resin layer from the non-curable resin layer side; a step of applying a catalyst for plating to a surface of the non-curable resin layer and surfaces of the depressions; a step of removing the non-curable resin layer and the catalyst for plating provided on the surface of the non-curable resin layer; and a step of electroless plating the surfaces of the depressions.

Abstract translation: 提供了一种制备可防止产生裂缝和翘曲的印刷线路板的方法。 一种制备印刷电路板的方法，包括在基板的表面上依次形成固化树脂层和非固化树脂层的步骤; 从非固化树脂层侧在非固化树脂层和固化树脂层中形成凹陷的步骤; 在非固化性树脂层的表面和凹部的表面涂布电镀用催化剂的工序; 在非固化树脂层的表面上除去非固化性树脂层和镀覆用催化剂的工序; 以及对凹陷的表面进行无电镀的步骤。

公开(公告)号：US20140377455A1

公开(公告)日：2014-12-25

申请号：US14481273

申请日：2014-09-09

Applicant: Inktec Co., Ltd.

Inventor： Kwang Choon Chung ,  Ji Hoon Yoo ,  Su-Han Kim ,  Byung Hun Kim

IPC: H05K3/18

CPC classification number: H05K3/1258 ,  C23C18/165 ,  C23C18/1868 ,  C23C18/204 ,  H05K1/092 ,  H05K1/097 ,  H05K3/0026 ,  H05K3/107 ,  H05K3/245 ,  H05K2201/0112 ,  H05K2201/0376 ,  H05K2201/09036 ,  H05K2203/0568 ,  H05K2203/072 ,  H05K2203/0723 ,  H05K2203/1126

Abstract: The present invention relates to a method for fabricating blackened conductive patterns, which includes (i) forming a resist layer on a non-conductive substrate; (ii) forming fine pattern grooves in the resist layer using a laser beam; (iii) forming a mixture layer containing a conductive material and a blackening material in the fine pattern grooves; and (iv) removing the resist layer remained on the non-conductive substrate.

Abstract translation: 本发明涉及一种制造黑化导电图案的方法，其包括（i）在非导电基底上形成抗蚀剂层; （ii）使用激光束在抗蚀剂层中形成精细图案凹槽; （iii）在精细图案槽中形成含有导电材料和变黑材料的混合层; 和（iv）去除残留在非导电基底上的抗蚀剂层。

公开(公告)号：US20140338192A1

公开(公告)日：2014-11-20

申请号：US14367492

申请日：2012-12-24

Applicant: INKTEC CO., LTD.

Inventor： Kwang-Choon Chung ,  Nam Boo Cho ,  Young-Koo Han ,  Myung Bong Yoo ,  Woong Ku On

IPC: H05K3/12 ,  H05K3/38

CPC classification number: H05K3/007 ,  H05K3/0014 ,  H05K3/0061 ,  H05K3/207 ,  H05K2201/0376 ,  Y10T29/49155

Abstract: Provided is a method for manufacturing a metal printed circuit board, the method including: printing a circuit pattern on a release film; applying a heat conductive insulating layer on the circuit pattern; laminating a heat conductive base layer on the heat conductive insulating layer and hot pressing the laminated heat conductive base layer and the heat conductive insulating layer; and removing the release film therefrom.

Abstract translation: 提供一种金属印刷电路板的制造方法，该方法包括：将印刷电路图案印刷在剥离膜上; 在电路图案上施加导热绝缘层; 在导热绝缘层上层压导热基层，热压叠层导热基层和导热绝缘层; 并从中去除脱模膜。

公开(公告)号：US20140263168A1

公开(公告)日：2014-09-18

申请号：US14088782

申请日：2013-11-25

Applicant: Unimicron Technology Corporation

Inventor： Shih-Lian Cheng ,  Jui-Jung Chien

IPC: H05K3/00 ,  H05K3/10

CPC classification number: H05K3/0017 ,  H01L21/486 ,  H05K3/107 ,  H05K2201/0376 ,  H05K2201/09036

Abstract: A method for manufacturing a package substrate is provided, including etching a substrate to form trenches each having a buffer portion, and forming a circuit in each of the trenches. The trenches are formed by etching instead of excimer laser to increase the aspect ratio of the trench, thereby solving the problem that the metallic layer is not thick enough and achieving a high yield of the circuit and a good process capability index.

Abstract translation: 提供了一种制造封装衬底的方法，包括蚀刻衬底以形成各自具有缓冲部分的沟槽，并且在每个沟槽中形成电路。 通过蚀刻而不是准分子激光形成沟槽，以增加沟槽的纵横比，从而解决了金属层不够厚并且实现电路的高产率和良好的工艺能力指数的问题。

公开(公告)号：US20140251664A1

公开(公告)日：2014-09-11

申请号：US14219412

申请日：2014-03-19

Applicant: NGK Insulators, Ltd.

Inventor： Yukio AISAKA ,  Hirofumi YAMAGUCHI ,  Shinsuke YANO

IPC: H05K1/03

CPC classification number: H05K1/0306 ,  H05K1/0265 ,  H05K2201/0376 ,  H05K2201/098 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2203/1126

Abstract: In a ceramics substrate comprising a surface layer conductor having a sufficient thickness for a flow of a large current, wherein the conductor is buried in a surface region of the substrate, a crack caused by a temperature change of the substrate is effectively suppressed. In the ceramics substrate comprising the surface layer conductor having the sufficient thickness for the flow of the large current, wherein the conductor is buried in the surface region of the substrate, a shape of a cross section of a part of the surface layer conductor, the part being buried in a base, cut by a plane perpendicular to the surface is configured such that an end portion of the buried part at a side of the surface is wider than an end portion of the buried part at a side opposite to the surface.

Abstract translation: 在包含具有足够厚度的用于大电流的表面层导体的陶瓷基板中，其中导体被埋在基板的表面区域中，有效地抑制了由基板的温度变化引起的裂纹。 在包括表面层导体的陶瓷衬底中，其表面层导体具有足够的大电流流动的厚度，其中导体被埋在衬底的表面区域中，表面层导体的一部分的横截面形状， 掩埋在基体上的部分被垂直于该表面的平面切割，以使得该表面一侧的掩埋部分的端部比与该表面相反的一侧的该埋入部分的端部更宽。

公开(公告)号：US20140209359A1

公开(公告)日：2014-07-31

申请号：US13751464

申请日：2013-01-28

Applicant: JOHN ANDREW LEBENS ,  David Paul Trauernicht ,  Yongcai Wang ,  Ronald Steven Cok

Inventor： JOHN ANDREW LEBENS ,  David Paul Trauernicht ,  Yongcai Wang ,  Ronald Steven Cok

IPC: H05K1/02

CPC classification number: H05K1/0296 ,  G06F3/044 ,  H05K1/02 ,  H05K1/0289 ,  H05K3/1258 ,  H05K2201/0108 ,  H05K2201/0376 ,  H05K2201/09227 ,  H05K2201/09272 ,  H05K2201/09681 ,  H05K2201/09727 ,  Y10T428/26

Abstract: A conductive micro-wire structure includes a substrate. A plurality of spaced-apart electrically connected micro-wires is formed on or in the substrate forming the conductive micro-wire structure. The conductive micro-wire structure has a transparency of less than 75% and greater than 0%.

Abstract translation: 导电微线结构包括衬底。 多个间隔开的电连接的微线形成在形成导电微线结构的衬底上或衬底中。 导电微线结构具有小于75％且大于0％的透明度。

公开(公告)号：US08779561B2

公开(公告)日：2014-07-15

申请号：US12779695

申请日：2010-05-13

Applicant: Gi Ho Jeong ,  Si Young Yang ,  Jae Wook Kwon ,  Jeong Hoon Park ,  Hyun Ju Yi ,  Choon Keun Lee

Inventor： Gi Ho Jeong ,  Si Young Yang ,  Jae Wook Kwon ,  Jeong Hoon Park ,  Hyun Ju Yi ,  Choon Keun Lee

IPC: H01L23/58

CPC classification number: H01L33/62 ,  H01L2224/48091 ,  H01L2924/01019 ,  H05K1/056 ,  H05K3/045 ,  H05K2201/0376 ,  H05K2201/09036 ,  H05K2201/10106 ,  H05K2203/0108 ,  H05K2203/025 ,  Y10T29/49158 ,  Y10T29/49172 ,  H01L2924/00014

Abstract: Disclosed herein is a Light Emitting Diode (LED) backlight unit without a Printed Circuit board (PCB). The LED backlight unit includes a chassis, insulating resin layer, and one or more light source modules. The insulating resin layer is formed on the chassis. The circuit patterns are formed on the insulating resin layer. The light source modules are mounted on the insulating resin layer and are electrically connected to the circuit patterns. The insulating resin layer has a thickness of 200 μm or less, and is formed by laminating solid film insulating resin on the chassis or by applying liquid insulating resin to the chassis using a molding method employing spin coating or blade coating. Furthermore, the circuit patterns are formed by filling the engraved circuit patterns of the insulating resin layer with metal material.

Abstract translation: 本文公开了一种没有印刷电路板（PCB）的发光二极管（LED）背光单元。 LED背光单元包括底盘，绝缘树脂层和一个或多个光源模块。 绝缘树脂层形成在底座上。 电路图案形成在绝缘树脂层上。 光源模块安装在绝缘树脂层上并电连接到电路图案。 绝缘树脂层的厚度为200μm以下，通过在底盘上层叠固体膜绝缘树脂或者通过使用旋转涂布或刮刀涂布的成型方法将液体绝缘树脂施加到底架而形成。 此外，通过用金属材料填充绝缘树脂层的雕刻电路图案来形成电路图案。