Abstract:
A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.
Abstract:
Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
Abstract:
Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
Abstract:
The present invention provides a circuit board structure, the circuit board structure consisting of a carrier board having a first surface and an opposed second surface, the carrier board being formed with at least one through hole penetrating the first and second surfaces; a conductive pillar formed in the through hole by electroplating; and a first circuit layer and a second circuit layer respectively formed on the first and second surfaces of the carrier board, the first and second circuit layers being electrically connected to the two end portions of the conductive pillar, thereby reducing spacing between adjacent conductive pillars of the carrier board and achieving high density circuit layout.
Abstract:
Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
Abstract:
An electronic assembly is disclosed. The electronic assembly includes a lower portion and a first elongate trace formed on an upper surface of the lower portion. The trace is covered by an upper portion, and an opening formed through an upper surface of the upper portion extends to the trace to expose a portion of the trace. A second elongate trace is formed on the upper portion. A portion of the second elongate trace positioned in the opening formed through the upper surface of the upper portion contacts the first elongate trace through the opening to form an electrical interconnection between the first trace and the second trace.
Abstract:
A laminated substrate structure composed of a plurality of dielectric layers and a plurality of circuit layers stacked with each other. Each of the dielectric layers has a plurality of via studs, and the circuit layers are electrically coupled with each other through the via studs. The laminated substrate structure of the present invention is characterized by adopting the embedded structure landless design that provides high reliability and better adherence. The present invention also provides a laminated substrate manufacture method. The dielectric layers having the patterned circuit and the dielectric layers having the via holes are formed first, and after the dielectric layers having the patterned circuit and the dielectric layers having the via holes are formed, they are aligned and laminated synchronously to complete the manufacture of the laminated substrate.
Abstract:
The printed circuit board is produced without soldering lands around the contacting, supporting or interconnecting holes of a simple faced, double-faced or multilayer circuit.The inner wall of the hole is covered with a copper layer which extends only until the free surfaces of the naked board, i.e. levels that surface, or does not fully extend until this level. The said layer is covered with a tin-lead metallization layer which services as a soldering link element. The solder mounts towards the wire or pin of the soldered component but does not touch nor spoil the free, insulating surface of the support.One necessary condition of the making process of the board is the precise, clean, proper and sharp drilling of the holes.
Abstract:
A multi-layer printed circuit board (21) has through holes (15-17) which are plated without conventional pads. This avoids circuit board rejections which would occur from cosmetic defects resulting from incomplete solder coverage of the pads and from pad lifting. In order to provide the through holes (15-17) with an adequate supply of solder during solder operations, wicks (45) are provided for each through hole (15-16) which is isolated from circuit traces (37, 38) on the exterior surface (33) of the printed circuit board (21). If the through hole (17) is connected to a circuit trace (38) on the exterior surface (33), then a connecting run (48) is used to provide wicking action in lieu of a tab (45).