公开(公告)号：US20130003333A1

公开(公告)日：2013-01-03

申请号：US13583884

申请日：2011-02-18

Applicant: Hiroshi Toyao ,  Manabu Kusumoto ,  Naoki Kobayashi ,  Noriaki Ando

Inventor： Hiroshi Toyao ,  Manabu Kusumoto ,  Naoki Kobayashi ,  Noriaki Ando

IPC: H05K7/06

CPC classification number: H05K1/0236 ,  H05K1/0218 ,  H05K1/0243 ,  H05K1/0298 ,  H05K1/116 ,  H05K1/162 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/09618 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/0979 ,  H05K2201/10371 ,  H05K2201/10674

Abstract: A wiring board includes a metal cap pad that is arranged so as to surround a mounting position of an electronic component and is connected to an end portion of a metal cap, a power source plane that is connected to the electronic component through a connection member and has a gap, a ground plane that is connected to the electronic component through a connection member, and a plurality of conductive body elements that are repeatedly arranged so as to surround the connection members and the gap. The power source plane and the ground plane extend so as to include at least a part of an area that is surrounded by the plurality of conductive body elements and at least a part of an area facing the plurality of conductive body elements.

Abstract translation: 布线基板包括金属盖焊盘，其被设置为围绕电子部件的安装位置并且连接到金属盖的端部，电源平面，其通过连接构件连接到电子部件， 具有间隙，通过连接构件连接到电子部件的接地平面，以及重复地布置成围绕连接构件和间隙的多个导电体元件。 电源平面和接地平面延伸成包括由多个导电体元件围绕的区域的至少一部分和面向多个导电体元件的区域的至少一部分。

公开(公告)号：US08304667B2

公开(公告)日：2012-11-06

申请号：US12920426

申请日：2009-03-24

Applicant: Takashi Yoshinaga ,  Kenji Kataoka ,  Michihito Otsuki

Inventor： Takashi Yoshinaga ,  Kenji Kataoka ,  Michihito Otsuki

IPC: H05K1/11

CPC classification number: H05K1/0216 ,  H05K1/0222 ,  H05K1/0237 ,  H05K1/181 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09609 ,  H05K2201/09618 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2201/10545 ,  H05K2201/10689

Abstract: A multilayer printed circuit board, including: a signal interconnection which transmits and receives an electrical signal between electronic components; a ground interconnection connected to a ground of a circuit; a power interconnection connected to a power layer to supply power to electronic components; at least one ground layer installed in an inner layer; at least one clearance which passes through the ground layer; and a ground via which connects the ground interconnection with the ground layer. The signal interconnection and the ground interconnection or the signal interconnection and the power interconnection are installed in a pair, and a pair of interconnection vias for interlayer connection are inserted through the clearance installed in the ground layer so that one of the pair of interconnection vias is connected to the ground layer by the ground interconnection.

Abstract translation: 一种多层印刷电路板，包括：在电子部件之间传输和接收电信号的信号互连; 连接到电路的地的接地互连; 连接到功率层以向电子部件供电的电力互连; 至少一个地层安装在内层中; 至少一个通过地层的间隙; 以及将接地互连与接地层连接的接地。 信号互连和接地互连，信号互连和电源互连成对安装，并且用于层间连接的一对互连通孔穿过安装在接地层中的间隙插入，使得一对互连通孔中的一个 通过地面互连连接到地层。

公开(公告)号：US20120273258A1

公开(公告)日：2012-11-01

申请号：US13156359

申请日：2011-06-09

Applicant: YUNG-CHIEH CHEN ,  SHOU-KUO HSU ,  HSIEN-CHUAN LIANG ,  SHIN-TING YEN ,  DAN-CHEN WU

Inventor： YUNG-CHIEH CHEN ,  SHOU-KUO HSU ,  HSIEN-CHUAN LIANG ,  SHIN-TING YEN ,  DAN-CHEN WU

IPC: H05K1/09

CPC classification number: H05K1/0251 ,  H05K1/0245 ,  H05K2201/09309 ,  H05K2201/09672 ,  H05K2201/09836

Abstract: A printed circuit board includes a first signal layer, a first reference layer, a second signal layer, and a third signal layer in that order and includes a first slanted via and a second slanted via. The first signal layer includes an parallel first transmission wire and a second transmission wire. The first and second transmission wires are coupled with each other and cooperatively constitute a first differential pair with an edge-coupled structure. The second signal layer includes a third transmission wire. The third signal layer includes a fourth transmission wire parallel to and coupled with the third transmission wire. The third and fourth transmission wires cooperatively constitute a second differential pair with a broadside-coupled structure. The first slanted via obliquely are interconnected between the first transmission wire and the third transmission wire. The second slanted via obliquely are interconnected between the second transmission wire and the fourth transmission wire.

Abstract translation: 印刷电路板依次包括第一信号层，第一参考层，第二信号层和第三信号层，并且包括第一倾斜通孔和第二倾斜通孔。 第一信号层包括并行的第一传输线和第二传输线。 第一和第二传输线彼此耦合并协同地构成具有边缘耦合结构的第一差分对。 第二信号层包括第三传输线。 第三信号层包括与第三传输线并联并与第三传输线耦合的第四传输线。 第三和第四传输线协作地构成具有宽边耦合结构的第二差分对。 第一倾斜地倾斜地在第一传输线和第三传输线之间互连。 第二倾斜地倾斜地在第二传输线和第四传输线之间互连。

公开(公告)号：US08289099B2

公开(公告)日：2012-10-16

申请号：US12568362

申请日：2009-09-28

Applicant: Han Kim ,  Ja-Bu Koo ,  Dae-Hyun Park

Inventor： Han Kim ,  Ja-Bu Koo ,  Dae-Hyun Park

IPC: H03H7/00

CPC classification number: H01P1/2005 ,  H01P1/203 ,  H05K1/0236 ,  H05K2201/09309 ,  H05K2201/09627 ,  H05K2201/09681

Abstract: An electromagnetic bandgap structure includes: first conductive plates, placed on a first planar surface, in which the first conductive plates are lined up in a first direction; second conductive plates, placed on a second planar surface and arranged at an area corresponding to an area in which the first conductive plates are disposed, in which the second conductive plates are lined up in the first direction; a first stitching via, electrically connecting any two adjacent conductive portions with each other and in which the two adjacent conductive portions are lined up in a direction that is different from the first direction on the first planar surface; and a second stitching via, electrically connecting any two adjacent conductive portions with each other and in which the two adjacent conductive portions are lined up in a direction that is different from the first direction on the second planar surface.

Abstract translation: 电磁带隙结构包括：第一导电板，放置在第一平面上，第一导电板沿第一方向排列; 第二导电板，放置在第二平坦表面上并且布置在与设置有第一导电板的区域相对应的区域中，其中第二导电板沿第一方向排列; 第一缝合通孔，将任何两个相邻的导电部分彼此电连接，并且其中两个相邻的导电部分沿与第一平坦表面上的第一方向不同的方向排列; 以及第二缝合通孔，将任何两个相邻的导电部彼此电连接，并且其中两个相邻的导电部分在与第二平面上的第一方向不同的方向上排列。

公开(公告)号：US20120229993A1

公开(公告)日：2012-09-13

申请号：US13108997

申请日：2011-05-17

Applicant: WEI-CHIEH CHOU ,  YING-TSO LAI ,  YUNG-CHIEH CHEN

Inventor： WEI-CHIEH CHOU ,  YING-TSO LAI ,  YUNG-CHIEH CHEN

IPC: H05K7/14 ,  H05K1/02 ,  H05F3/00

CPC classification number: H05K9/0067 ,  H05K1/0215 ,  H05K1/0259 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/10189

Abstract: An exemplary antistatic circuit board includes a first outer layer, a second outer layer, a first ground layer, and a second ground layer. The first ground layer and the second ground layer are positioned between the first outer layer and the second outer layer. The first ground layer is adjacent to the first outer layer and the second ground layer is adjacent to the second outer layer. The antistatic circuit board defines two position holes each penetrating through the first ground layer and the second ground layer. Two circuit grounds are wired on the first ground layer and the second ground layer, respectively. The second ground layer further includes a chassis ground. Each of the position holes also penetrates through the chassis ground.

Abstract translation: 示例性的抗静电电路板包括第一外层，第二外层，第一接地层和第二接地层。 第一接地层和第二接地层位于第一外层和第二外层之间。 第一接地层与第一外层相邻，第二接地层与第二外层相邻。 抗静电电路板限定了穿过第一接地层和第二接地层的两个位置孔。 两个电路接地分别布置在第一接地层和第二接地层上。 第二接地层还包括底盘接地。 每个位置孔也穿过底盘地面。

公开(公告)号：US20120223047A1

公开(公告)日：2012-09-06

申请号：US12909983

申请日：2010-10-22

Applicant: Rabindra N. Das ,  Frank D. Egitto ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich

Inventor： Rabindra N. Das ,  Frank D. Egitto ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich

IPC: H01G4/002 ,  G03F7/30 ,  G03F7/20

CPC classification number: H01G4/206 ,  H01G4/232 ,  H01G4/33 ,  H05K1/162 ,  H05K3/06 ,  H05K3/125 ,  H05K3/18 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0257 ,  H05K2201/09309 ,  Y10T156/10

Abstract: Methods of forming embedded, multilayer capacitors in printed circuit boards wherein copper or other electrically conductive channels are formed on a dielectric substrate. The channels may be preformed using etching or deposition techniques. A photoimageable dielectric is an upper surface of the laminate. Exposing and etching the photoimageable dielectric exposes the space between the copper traces. These spaces are then filled with a capacitor material. Finally, copper is either laminated or deposited atop the structure. This upper copper layer is then etched to provide electrical interconnections to the capacitor elements. Traces may be formed to a height to meet a plane defining the upper surface of the dielectric substrate or thin traces may be formed on the remaining dielectric surface and a secondary copper plating process is utilized to raise the height of the traces.

Abstract translation: 在印刷电路板中形成嵌入式多层电容器的方法，其中在电介质基板上形成铜或其它导电通道。 通道可以使用蚀刻或沉积技术进行。 可光成像的电介质是层叠体的上表面。 曝光和蚀刻可光成像电介质暴露铜迹线之间的空间。 然后用电容器材料填充这些空间。 最后，铜层压或沉积在结构的顶部。 然后对该上铜层进行蚀刻，以提供与电容器元件的电互连。 迹线可以形成为高度以满足限定电介质基板的上表面的平面，或者可以在剩余的电介质表面上形成薄迹线，并且使用二次镀铜工艺来提高迹线的高度。

公开(公告)号：US08253026B2

公开(公告)日：2012-08-28

申请号：US12414780

申请日：2009-03-31

Applicant: Steffen Strauss ,  Michael Weis

Inventor： Steffen Strauss ,  Michael Weis

IPC: H05K7/20

CPC classification number: H05K1/0207 ,  F21K9/00 ,  H01L23/3677 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/10106 ,  H05K2201/10416 ,  H01L2924/00

Abstract: A printed circuit board is provided with at least one via hole, in which a heat dissipating element is arranged, wherein at least one radiant source is arranged on the heat dissipating element. The lighting device is provided with at least one such printed circuit board.

Abstract translation: 印刷电路板设置有至少一个通孔，其中布置有散热元件，其中至少一个辐射源设置在散热元件上。 照明装置设置有至少一个这样的印刷电路板。

公开(公告)号：US08227709B2

公开(公告)日：2012-07-24

申请号：US12702354

申请日：2010-02-09

Applicant: Daita Tsubamoto

Inventor： Daita Tsubamoto

IPC: H05K1/11

CPC classification number: G06F17/5081 ,  H05K1/0234 ,  H05K1/0251 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/0323 ,  H05K2201/09309 ,  H05K2201/09718 ,  H05K2201/09781 ,  Y10T29/49155

Abstract: A multi-layer printed wiring board includes a first insulating layer, a second insulating layer having a dissipation factor higher than a dissipation factor of the first insulating layer, a first conductive layer, and a first via connected to a lead wire in the first conductive layer. The first via includes a stub extending through the second insulating layer.

Abstract translation: 多层印刷布线板包括第一绝缘层，具有高于第一绝缘层的耗散因数的第二绝缘层，第一导电层和连接到第一导电层中的引线的第一通孔 层。 第一通孔包括延伸穿过第二绝缘层的短截线。

公开(公告)号：US08223504B2

公开(公告)日：2012-07-17

申请号：US12630232

申请日：2009-12-03

Applicant: Kazunori Kotani

Inventor： Kazunori Kotani

IPC: H05K9/00

CPC classification number: H05K7/142 ,  H05K1/0215 ,  H05K1/0298 ,  H05K3/325 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/09309 ,  H05K2201/09481 ,  H05K2201/099

Abstract: A structure for supporting a printed wiring board housed in a housing of an electronic device. The supporting structure includes a first projection formed on the housing and projecting toward the printed wiring board. The electronic device includes a conductor plate, which is grounded and accommodated in the housing. A second projection is formed on the conductor plate and projects toward the printed wiring board. The printed wiring board includes a substrate and a ground layer, which is arranged on the substrate. The first projection of the housing and the second projection of the conductor plate hold and support the printed wiring board in between and thereby electrically connect the ground layer to the conductor plate.

Abstract translation: 一种用于支撑容纳在电子设备的壳体中的印刷线路板的结构。 支撑结构包括形成在壳体上并朝向印刷线路板突出的第一突起。 电子设备包括导体板，其被接地并容纳在壳体中。 在导体板上形成第二突起，朝向印刷线路板突出。 印刷布线板包括布置在基板上的基板和接地层。 壳体的第一突起和导体板的第二突起将印刷线路板保持并支撑在其间，从而将接地层与导体板电连接。

公开(公告)号：US08219954B2

公开(公告)日：2012-07-10

申请号：US12518563

申请日：2007-12-06

Applicant: Naoki Kobayashi

Inventor： Naoki Kobayashi

IPC: G06F17/50

CPC classification number: G06F17/5068 ,  H05K1/0216 ,  H05K1/0298 ,  H05K3/0005 ,  H05K2201/09309 ,  H05K2201/09618

Abstract: A printed circuit board analyzing system for analyzing the whole circuit of a multilayer printed circuit board to perform circuit analysis of noise propagation in the printed circuit board having structure in which the shapes of stacked conductor planes are different or planes are provided side by side in the same layer by quickly providing an adjacent interference part equivalent circuit model representing noise interference parts causing interference between adjacent opposed planes and by coupling the plane pairs to the adjacent interference part equivalent circuit.

Abstract translation: 一种印刷电路板分析系统，用于分析多层印刷电路板的整个电路，以进行印刷电路板中的噪声传播的电路分析，所述印刷电路板具有层叠导体平面的形状不同的结构或平面，并排设置在 通过快速提供相邻的干扰部分等效电路模型来表示相邻相对的平面之间的干扰并且将平面对耦合到相邻干扰部分等效电路的相邻干扰部分等效电路模型。