公开(公告)号：US20160212838A1

公开(公告)日：2016-07-21

申请号：US14800805

申请日：2015-07-16

Applicant: Sumsung Display Co., Ltd.

Inventor： Hee-Kwon LEE

IPC: H05K1/02 ,  H05K1/09 ,  G09G3/36 ,  H05K1/11

CPC classification number: H05K1/028 ,  G09G3/3611 ,  H05K1/09 ,  H05K1/111 ,  H05K3/284 ,  H05K3/361 ,  H05K2201/09036 ,  H05K2201/09781 ,  H05K2201/09845 ,  H05K2201/10128

Abstract: A display device, including a display panel displaying an image; a chip on film (COF) connected to the display panel and on which a driving integrated circuit is mounted; and a printed circuit board (PCB) connected to the COF and including a driving circuit for driving the display panel, in the COF, on a film, a first pad portion being connected to the driving integrated circuit by a first wiring line, a second pad portion being connected to the driving integrated circuit by a second wiring line, and a solder resist being applied to the first and second wiring lines, the second pad portion being spaced from and offset from the first pad portion, and the PCB including stepped portions at sides of first and second corresponding pad portions connected with the first and second pad portions, respectively, to receive a portion of the solder resist.

Abstract translation: 一种显示装置，包括显示图像的显示面板; 连接到显示面板并且安装有驱动集成电路的胶片上的芯片（COF） 以及连接到COF的印刷电路板（PCB），并且包括用于在COF中在膜上驱动显示面板的驱动电路，第一焊盘部分通过第一布线连接到驱动集成电路，第二焊盘部分 焊盘部分通过第二布线连接到驱动集成电路，并且阻焊剂被施加到第一和第二布线，第二焊盘部分与第一焊盘部分间隔开并偏离第一焊盘部分，并且PCB包括阶梯部分 在分别与第一和第二焊盘部分连接的第一和第二对应焊盘部分的侧面处，以接收阻焊剂的一部分。

公开(公告)号：US09377641B2

公开(公告)日：2016-06-28

申请号：US14257612

申请日：2014-04-21

Applicant: Samsung Display Co., Ltd.

Inventor： Il-Hwan Yoon ,  Seung-Chang Woo

IPC: G02F1/1345 ,  G02F1/1333 ,  H05K1/02 ,  H05K1/14 ,  H05K1/18

CPC classification number: G02F1/133305 ,  G02F1/13452 ,  H05K1/0281 ,  H05K1/147 ,  H05K1/189 ,  H05K2201/09045 ,  H05K2201/09781 ,  H05K2201/10136 ,  H05K2201/10681

Abstract: A tape package includes a body portion including a flexible material, a driving circuit disposed on the body portion, a first sub-connection portion extending from the body portion in a first direction, a first main-connection portion extending from the first sub-connection portion in the first direction, a first lead line including a first end electrically connected to the driving circuit and a second end extending in the first direction, the first end being opposite to the second end and a protrusion extending from the first sub-connection portion in a third direction perpendicular to the first direction on a same plane with the first sub-connection portion. Accordingly, a crack of the lead line may be reduced or effectively prevented.

Abstract translation: 一种胶带包装体包括：主体部分，包括柔性材料;驱动电路，设置在主体部分上;第一副连接部分，从本体部分沿第一方向延伸;第一主连接部分，从第一子连接部分 所述第一引线包括电连接到所述驱动电路的第一端和沿所述第一方向延伸的第二端，所述第一端与所述第二端相对，所述第一端与所述第一子连接部分延伸， 在与第一子连接部分相同的平面上在垂直于第一方向的第三方向上。 因此，可以降低或有效地防止引线的裂纹。

公开(公告)号：US09332649B2

公开(公告)日：2016-05-03

申请号：US14066905

申请日：2013-10-30

Applicant: Magnachip Semiconductor, Ltd.

Inventor： DoYoung Kim ,  KyungDuk Kim

IPC: H01L23/495 ,  H05K3/10 ,  H01L23/498 ,  H01L23/552 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K3/10 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/552 ,  H01L2224/73204 ,  H05K1/0219 ,  H05K1/189 ,  H05K2201/09618 ,  H05K2201/09781 ,  Y10T29/49155

Abstract: A flexible circuit board, a semiconductor package, and methods of forming the same are provided. The flexible circuit board includes: a base film; an input line pattern, an output line pattern, and a dummy pattern on a first surface of the base film; and a ground pattern on a second surface of the base film and electrically connected with the dummy pattern.

Abstract translation: 提供了柔性电路板，半导体封装及其形成方法。 柔性电路板包括：基膜; 在基膜的第一表面上的输入线图案，输出线图案和虚设图案; 以及在基膜的第二表面上的接地图案，并与虚设图案电连接。

公开(公告)号：US09320185B2

公开(公告)日：2016-04-19

申请号：US13824437

申请日：2010-10-01

Applicant: Yoshio Imamura ,  Tohru Matsumoto ,  Ryoichi Shimizu

Inventor： Yoshio Imamura ,  Tohru Matsumoto ,  Ryoichi Shimizu

IPC: H05K13/00 ,  H05K1/02 ,  H05K1/18 ,  H05K1/16

CPC classification number: H05K13/00 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/544 ,  H01L2221/68359 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/26175 ,  H01L2224/32245 ,  H01L2224/83005 ,  H01L2224/83132 ,  H05K1/0269 ,  H05K1/16 ,  H05K1/188 ,  H05K2201/09781 ,  H05K2201/09918

Abstract: A thin conductive layer which is to form a conductor pattern (18) is prepared, a mask layer (3) is formed on the conductive layer except a plurality of actual connection spots and at least one dummy connection spot on the conductive layer, actual solder pads (6) and a dummy solder pad (7) are formed, with use of solder, on the actual connection spots and the dummy connection spot, respectively, where the conductive layer is exposed, connection terminals (9) of an electric or electronic component (8) are connected to the actual solder pads (6), an insulating base (16) of resin is formed which is laminated directly on or indirectly via the mask layer (3) on the conductive layer and in which the component (8) is embedded, and part of the conductive layer is removed by using the dummy solder pad (7) as a reference, to form the conductor pattern (18).

Abstract translation: 准备形成导体图案（18）的薄导电层，除了导电层上的多个实际连接点和至少一个虚设连接点之外，在导电层上形成掩模层（3），实际焊料 在导电层暴露的实际连接点和虚拟连接点上，使用焊料形成焊盘（6）和虚拟焊盘（7），电或电子的连接端子（9） 组件（8）连接到实际的焊盘（6），形成树脂的绝缘基底（16），其直接层压在导电层上或通过掩模层（3）间接地层叠，其中部件（8） ），并且通过使用虚拟焊盘（7）作为参考来去除导电层的一部分，以形成导体图案（18）。

公开(公告)号：US09317644B2

公开(公告)日：2016-04-19

申请号：US13887491

申请日：2013-05-06

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ibrahim M. Elfadel ,  Tarek Ali El Moselhy ,  David J. Widiger

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5036 ,  G06F17/5068 ,  G06F17/5081 ,  G06F2217/12 ,  H05K2201/09781

Abstract: A computer system selects a signal conductor from an electronic circuit design layout and assigns a first potential to the selected signal conductor. Next, the computer system assigns a second potential to other signal conductors included in the electronic circuit design layout. The computer system then selects a metal fill from the electronic circuit design layout, which is void from carrying an electrical signal, and generates a zero charge equation for the selected metal fill. The zero charge equation establishes that a total charge residing on the selected metal fill is equal to zero. The computer system includes the zero charge equation in a system of equations, which includes grid point potential equations, and solves the system of equations. In turn, the computer system computes capacitance values for the signal conductors based upon the system of equation solutions, and simulates the electronic circuit design layout using the computed capacitance values.

公开(公告)号：US09310417B2

公开(公告)日：2016-04-12

申请号：US14036712

申请日：2013-09-25

Applicant: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.

Inventor： Jordan HP Chin ,  Timothy M. Wiwel

IPC: G01R31/11 ,  H05K3/10 ,  G01R31/28 ,  H05K3/00 ,  H05K1/02

CPC classification number: G01R31/11 ,  G01R31/2805 ,  G01R31/2818 ,  H05K1/0248 ,  H05K1/0268 ,  H05K3/0047 ,  H05K2201/09263 ,  H05K2201/09618 ,  H05K2201/09627 ,  H05K2201/09781 ,  H05K2203/163 ,  H05K2203/171 ,  H05K2203/175 ,  Y10T29/49155

Abstract: A method uses time-domain reflectometry to measure a signal reflection delay in a conductive trace formed on a specific passive printed circuit board, and uses the measured signal reflection delay as an index into a table storing a predetermined association between signal reflection delay and passive printed circuit board manufacturing information, wherein the table includes a plurality of predetermined signal reflection delay values, and wherein each of the predetermined signal reflection delay values is associated with unique passive printed circuit board manufacturing information. During manufacturing of the passive printed circuit board, a hole is drilled through the passive printed circuit board so that the hole intersects with the conductive trace and divides the conductive trace into a proximal segment extending from the connector to the hole and a distal segment that is electrically isolated from the proximal segment by the hole.

Abstract translation: 一种方法使用时域反射测量来测量在特定无源印刷电路板上形成的导电迹线中的信号反射延迟，并且使用测量的信号反射延迟作为索引，存储在信号反射延迟和被动印刷之间的预定关联 电路板制造信息，其中所述表包括多个预定信号反射延迟值，并且其中每个预定信号反射延迟值与唯一的被动印刷电路板制造信息相关联。 在无源印刷电路板的制造期间，通过无源印刷电路板钻出孔，使得孔与导电迹线相交，并将导电迹线分成从连接器延伸到孔的近端段，以及远端段 通过孔与近端段电隔离。

公开(公告)号：US09307655B2

公开(公告)日：2016-04-05

申请号：US14321995

申请日：2014-07-02

Applicant: AU Optronics Corporation

Inventor： Chih-Hung Chen ,  Po-Fu Huang ,  Chih-Hao Wang

IPC: H05K3/36 ,  H05K1/02 ,  H05K3/32 ,  H05K3/40

CPC classification number: H05K3/361 ,  H05K1/0269 ,  H05K3/323 ,  H05K3/4015 ,  H05K2201/0233 ,  H05K2201/09745 ,  H05K2201/09781 ,  H05K2201/10136

Abstract: A circuit board module includes a first circuit board, an electrically conductive structure, a first bump, a second circuit board and an electrically conductive film. The electrically conductive structure and the first bump are disposed on the supporting surface of the first circuit board. The electrically conductive structure and the first bump respectively have a first maximal thickness T1 and a second maximal thickness T2 along the normal direction of the supporting surface. The second circuit board is disposed on the electrically conductive structure and the first bump. The electrically conductive film is disposed between the second circuit board and the electrically conductive structure, and it has a plurality of electrically conductive particles. An average particle diameter D of the electrically conductive particles when undeformed satisfies: 0

Abstract translation: 电路板模块包括第一电路板，导电结构，第一凸块，第二电路板和导电膜。 导电结构和第一凸块设置在第一电路板的支撑表面上。 导电结构和第一凸块分别具有沿着支撑表面的法线方向的第一最大厚度T1和第二最大厚度T2。 第二电路板设置在导电结构和第一凸块上。 导电膜设置在第二电路板和导电结构之间，并且其具有多个导电颗粒。 当未变形时导电颗粒的平均粒径D满足：0

公开(公告)号：US20160087175A1

公开(公告)日：2016-03-24

申请号：US14581474

申请日：2014-12-23

Applicant: LG Display Co., Ltd.

Inventor： Dong Hun Lee

IPC: H01L33/62 ,  H05K1/18 ,  F21V8/00 ,  F21V23/00

CPC classification number: H01L33/62 ,  G02B6/0068 ,  G02B6/0073 ,  G02B6/0083 ,  H01L33/486 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H05K1/181 ,  H05K2201/09781 ,  H05K2201/10106 ,  H05K2201/10136 ,  H05K2201/10204 ,  Y02P70/611 ,  H01L2924/00014

Abstract: Disclosed is a light emitting diode (LED) package, which can be used for, for example, a light source module, a backlight unit and a display device, that may, for example, include an LED chip in a body portion of the LED package; first and second lead frames separated from each other in the body portion, each of the first and second lead frames including first and second leads that are electrically connected to the LED chip and are used as one of anode and cathode leads; and first and second dummy lead frames separated from each other in the body portion and electrically insulated from the first and second lead frames.

Abstract translation: 公开了一种发光二极管（LED）封装，其可以用于例如光源模块，背光单元和显示装置，其可以例如在LED的主体部分中包括LED芯片 包; 第一引线框架和第二引线框架在主体部分中彼此分离，第一引线框架和第二引线框架中的每一个包括电连接到LED芯片的第一引线和第二引线，并且用作阳极引线和阴极引线之一; 以及在主体部分彼此分离并与第一和第二引线框架电绝缘的第一和第二虚拟引线框架。

公开(公告)号：US09295155B2

公开(公告)日：2016-03-22

申请号：US13590908

申请日：2012-08-21

Applicant: Naoki Nakamura ,  Shigeru Sugino ,  Nobuo Taketomi ,  Ryo Kanai

Inventor： Naoki Nakamura ,  Shigeru Sugino ,  Nobuo Taketomi ,  Ryo Kanai

IPC: H05K1/00 ,  H05K1/11 ,  H05K1/02

CPC classification number: H05K1/118 ,  H05K1/0281 ,  H05K1/117 ,  H05K2201/09709 ,  H05K2201/09727 ,  H05K2201/09781 ,  H05K2201/2009

Abstract: A flexible printed board includes a base material, first conductive pads arranged along an imaginary line on the base material and extending with a first width from front end to rear end on a front side of the imaginary line, second conductive pads arranged along the imaginary line and extending with a second width from front end on a rear side of the imaginary line to rear end, first wiring patterns provided between the second conductive pads, and extending with a third width to front end connected to the rear ends of the first conductive pads, and a reinforcing layer for reinforcing a reinforcing area over the first conductive pads and the first wiring patterns, and having a front edge on a front side of rear ends of the first conductive pads and a rear edge on a rear side of the rear ends of the second conductive pads.

Abstract translation: 柔性印刷电路板包括基材，第一导电焊盘沿着假想线布置在基体材料上并且沿着假想线的前侧从前端到后端的第一宽度延伸，沿假想线布置的第二导电焊盘 并且以假想线的后侧的前端延伸到第二宽度，第一布线图案设置在第二导电焊盘之间，并且第三宽度延伸到连接到第一导电焊盘的后端的前端 ，以及用于加强第一导电焊盘和第一布线图案上的加强区域的加强层，并且在第一导电焊盘的后端的前侧具有前边缘，在后端的后侧具有后边缘 的第二导电焊盘。

公开(公告)号：US09265928B2

公开(公告)日：2016-02-23

申请号：US13713115

申请日：2012-12-13

Applicant: NeuroNexus Technologies, Inc.

Inventor： David S. Pellinen ,  Mayurachat Ning Gulari ,  Jamille Farraye Hetke ,  David J. Anderson ,  Daryl R. Kipke ,  Rio J. Vetter

IPC: A61N1/375 ,  A61N1/05 ,  H05K1/11 ,  H05K1/03 ,  H05K3/46

CPC classification number: A61N1/05 ,  A61B5/04001 ,  A61B2562/0209 ,  A61N1/0529 ,  A61N1/0551 ,  H05K1/0393 ,  H05K1/113 ,  H05K3/4644 ,  H05K2201/09781 ,  H05K2201/2072 ,  Y10T29/49117

Abstract: The implantable electrode system of the preferred embodiments includes a conductor, an interconnect coupled to the conductor, an insulator that insulates the interconnect, and an anchor that is connected to both the conductor and the insulating element. The anchor is mechanically interlocked with at least one of the conductor and the insulator.