公开(公告)号：US07304862B2

公开(公告)日：2007-12-04

申请号：US11559928

申请日：2006-11-15

Applicant: Galliano R. Busletta ,  Robert J. Roessler

Inventor： Galliano R. Busletta ,  Robert J. Roessler

IPC: H05K7/00

CPC classification number: H05K1/165 ,  H01F2027/2819 ,  H05K3/429 ,  H05K2201/086 ,  H05K2201/09063 ,  H05K2201/092 ,  H05K2201/09645

Abstract: The present invention provides a PWB for attaching electrical components thereto. The PWB includes a stack of insulating layers, conductive layers located between the insulating layers, wherein the conductive layers terminate at an edge of the PWB, and an edge plate interconnect located on the edge. The edge plate interconnect is free of a complementary via and contacts and electrically interconnects the conductive layers. The present invention also provides a method of making the PWB and also provides a power converter implementing the edge plate interconnects.

Abstract translation: 本发明提供一种用于将电气部件附接到其上的PWB。 PWB包括堆叠的绝缘层，位于绝缘层之间的导电层，其中导电层终止于PWB的边缘，以及位于边缘上的边缘板互连。 边缘板互连件没有互补的通孔和触点，并且电连接导电层。 本发明还提供一种制造PWB的方法，并且还提供实现边缘板互连的功率转换器。

公开(公告)号：US07273401B2

公开(公告)日：2007-09-25

申请号：US10515299

申请日：2004-03-15

Applicant: Victor Zaderej ,  David L. Brunker ,  Phillip J. Dambach

Inventor： Victor Zaderej ,  David L. Brunker ,  Phillip J. Dambach

IPC: H01R9/24

CPC classification number: H01R43/24 ,  H01P1/04 ,  H01P3/02 ,  H01R12/724 ,  H01R13/405 ,  H01R13/6461 ,  H01R13/6474 ,  H05K1/024 ,  H05K3/107 ,  H05K3/308 ,  H05K3/403 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09118 ,  H05K2201/09645 ,  H05K2201/09981 ,  H05K2201/10893 ,  Y10S439/931 ,  Y10T29/4922 ,  Y10T29/49222

Abstract: A pedestal connector that incorporates one or more grouped element channel link transmission lines is seen to have a dielectric body and two opposing contact ends that are intended to contact opposing contacts or traces. The dielectric body has an S-shaped configuration such that the transmission lines supported thereon make at least one change in direction, thereby permitting the use of such connector to interconnect elements lying in two different planes. The transmission lines include slots that extend within the frame and which define opposing, conductive surfaces formed on the dielectric body which are separated by an intervening air gap.

Abstract translation: 包含一个或多个分组的元件通道连杆传输线的基座连接器被看到具有电介质体和旨在接触相对的触点或迹线的两个相对的接触端。 电介质体具有S形构造，使得支撑在其上的传输线至少一个方向改变，从而允许使用这种连接器来互连在两个不同平面中的元件。 传输线包括在框架内延伸并且限定形成在电介质体上的相对的导电表面的槽，它们由中间的气隙隔开。

公开(公告)号：US20070169961A1

公开(公告)日：2007-07-26

申请号：US11723851

申请日：2007-03-22

Applicant: Herman Kwong ,  Larry Marcanti ,  Aneta Wyrzykowska ,  Kah Soh

Inventor： Herman Kwong ,  Larry Marcanti ,  Aneta Wyrzykowska ,  Kah Soh

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K3/403 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0044 ,  H05K3/045 ,  H05K3/107 ,  H05K3/1258 ,  H05K3/4069 ,  H05K3/429 ,  H05K2201/09645 ,  H05K2201/09854 ,  H05K2203/1476 ,  Y10T29/49016 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A technique for reducing via capacitance is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for reducing via capacitance. The method may comprise forming, in a circuit board, a via hole that bridges a first trace and a second trace. The method may also comprise forming a channel in a sidewall of the via hole. The method may further comprise filling the via hole and the channel with a conductive material. The method may additionally comprise removing the conductive material from the via hole without depleting the channel, thereby forming an interconnect that couples the first trace to the second trace.

公开(公告)号：US20070151753A1

公开(公告)日：2007-07-05

申请号：US11323366

申请日：2005-12-29

Applicant: Soo Thor ,  Amir Wagiman ,  Chee Yoon

Inventor： Soo Thor ,  Amir Wagiman ,  Chee Yoon

IPC: H05K1/00 ,  H05K3/00

CPC classification number: H05K3/403 ,  H05K1/115 ,  H05K3/027 ,  H05K3/42 ,  H05K2201/0959 ,  H05K2201/09645 ,  Y10T29/49124 ,  Y10T29/49155

Abstract: A method of fabricating a printed circuit board, a printed circuit board formed according to the method, and a system including the printed circuit board. The method comprises: providing a substrate; providing a through hole opening in the substrate; metallizing walls of the opening to provide a conductive coating thereon defining a hollow region within the opening; providing gaps in the conductive coating to yield a corresponding number of conductive coating portions separated by the gaps and by the hollow region; filling the gaps and the hollow region with an electrically insulating material to electrically isolate the conductive coating portions from one another to provide a plated through hole including a plurality of connections; wherein each of the conductive coating portions defines at least part of a connection of the plurality of connections; and circuitizing the substrate to provide conductive traces thereon connected to corresponding ones of the plurality of connections to yield the printed circuit board.

Abstract translation: 一种制造印刷电路板的方法，根据该方法形成的印刷电路板以及包括印刷电路板的系统。 该方法包括：提供衬底; 在所述基板中设置通孔开口; 开口的金属化壁以在其上提供导电涂层，其在开口内限定中空区域; 在导电涂层中提供间隙以产生由间隙和中空区域分隔的相应数量的导电涂层部分; 用电绝缘材料填充间隙和中空区域以将导电涂层部分彼此电隔离以提供包括多个连接的电镀通孔; 其中每个所述导电涂层部分限定所述多个连接件的连接的至少一部分; 以及电路化所述衬底以提供其上连接到所述多个连接中的相应连接的导电迹线以产生所述印刷电路板。

公开(公告)号：US20070125570A1

公开(公告)日：2007-06-07

申请号：US11564944

申请日：2006-11-30

Applicant: Chin Wei HO

Inventor： Chin Wei HO

IPC: H05K1/03 ,  H05K1/16

CPC classification number: H05K3/403 ,  H05K1/115 ,  H05K3/043 ,  H05K3/42 ,  H05K2201/09645

Abstract: A via structure of a printed circuit board includes an insulation layer having a first surface and a second surface, a through-hole and a plurality of internal conducting coatings. The through-hole is throughout the first surface and the second surface of the insulation layer and the internal conductive coatings connected to a wall of the through-hole are mutually electrically insulated so that different signals can be transmitted between both sides of the substrate through a single via.

Abstract translation: 印刷电路板的通孔结构包括具有第一表面和第二表面的绝缘层，通孔和多个内部导电涂层。 通孔遍及整个绝缘层的第一表面和第二表面，连接到通孔的壁的内部导电涂层相互电绝缘，使得不同的信号可以通过一个 单通道。

公开(公告)号：US20070117339A1

公开(公告)日：2007-05-24

申请号：US11626606

申请日：2007-01-24

Applicant: Todd Myers ,  Nicholas Watts ,  Eric Palmer ,  Renee Defeo ,  Jui Lim

Inventor： Todd Myers ,  Nicholas Watts ,  Eric Palmer ,  Renee Defeo ,  Jui Lim

IPC: H01L21/00 ,  H01L21/20 ,  H01L23/02

CPC classification number: H01L23/49827 ,  H01L2924/0002 ,  H05K1/115 ,  H05K3/064 ,  H05K3/403 ,  H05K3/4644 ,  H05K2201/09645 ,  H05K2201/09827 ,  H01L2924/00

Abstract: A method for forming an plurality of paths on a substrate includes drilling an opening for a via to a depth to expose a first pad and a second pad, lining the opening with a conductive material, and insulating a first portion of the lining in the opening from a second portion of the lining in the opening to form a first electrical path contacting the first pad and a second electrical path contacting the second pad.

Abstract translation: 一种用于在基板上形成多个路径的方法包括：将用于通孔的开口钻出一定深度，以暴露第一垫和第二垫，用导电材料衬套开口，并将开口的第一部分在开口 从开口中的衬里的第二部分形成接触第一焊盘的第一电路径和接触第二焊盘的第二电路径。

公开(公告)号：US07219843B2

公开(公告)日：2007-05-22

申请号：US10453796

申请日：2003-06-03

Applicant: William H. Havens ,  Charles P. Barber ,  Colleen Gannon ,  Robert C. Gardiner ,  Robert J. Hennick ,  John A. Pettinelli

Inventor： William H. Havens ,  Charles P. Barber ,  Colleen Gannon ,  Robert C. Gardiner ,  Robert J. Hennick ,  John A. Pettinelli

IPC: G06K7/10

CPC classification number: G06K7/10881 ,  G06K7/10574 ,  G06K7/10584 ,  G06K7/10722 ,  G06K7/10801 ,  G06K7/10861 ,  G06K7/1098 ,  G06K7/14 ,  G06K7/1417 ,  H05K1/18 ,  H05K3/244 ,  H05K2201/09072 ,  H05K2201/09463 ,  H05K2201/0949 ,  H05K2201/09645 ,  H05K2201/09809 ,  H05K2201/10121

Abstract: The invention is an optical reader having a plurality of image sensors. Each image sensor of a plural image sensor optical reader can be disposed on an imaging module that can include a light source. In one embodiment, a frame of image data captured via actuation of an image sensor of a first imaging module and actuation of illumination of a second imaging module is subjected to decoding. The various modules of a multiple imaging module reader can be adapted to have different best focus positions so that a field depth of the reader is improved.

Abstract translation: 本发明是具有多个图像传感器的光学读取器。 可以将多个图像传感器光学读取器的每个图像传感器设置在可以包括光源的成像模块上。 在一个实施例中，经由第一成像模块的图像传感器的致动和第二成像模块的照明的致动所捕获的图像数据的帧被进行解码。 多成像模块读取器的各种模块可以适于具有不同的最佳焦点位置，从而改善读取器的场深。

公开(公告)号：US20070089292A1

公开(公告)日：2007-04-26

申请号：US11483321

申请日：2006-07-07

Applicant: Joseph Tourne ,  Joe Dickson

Inventor： Joseph Tourne ,  Joe Dickson

IPC: H05K1/11

CPC classification number: H05K1/115 ,  H05K1/114 ,  H05K3/0047 ,  H05K3/062 ,  H05K3/403 ,  H05K3/42 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2203/0207 ,  H05K2203/0242 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method for producing a printed circuit board is described. A substrate having a via is provided with the via being coated with a conductive layer defining a perimeter of the via. The conductive layer defining an open via hole. The open via hole is filled with a non-conductive filling material. Then, the substrate is planed to remove any residue of the filling material on the surface of the substrate. Then, at least two holes are formed in the substrate with each hole overlapping the perimeter of the via and thereby removing a portion of the conductive layer and the filling material whereby the two holes in the substrate cooperate to form at least two electrically isolated segments in the conductive layer.

Abstract translation: 对印刷电路板的制造方法进行说明。 具有通孔的基板设置有通孔，该导电层限定通孔的周边的导电层。 导电层限定开放的通孔。 开放通孔填充有非导电填充材料。 然后，平铺基板以去除衬底表面上的填充材料的任何残留物。 然后，在衬底中形成至少两个孔，每个孔与通孔的周边重叠，从而去除导电层和填充材料的一部分，由此衬底中的两个孔协作形成至少两个电隔离段 导电层。

公开(公告)号：US07168957B2

公开(公告)日：2007-01-30

申请号：US11400217

申请日：2006-04-10

Applicant: Tonglong Zhang

Inventor： Tonglong Zhang

IPC: H01R12/00

CPC classification number: H05K1/115 ,  H01R12/523 ,  H05K3/0047 ,  H05K3/403 ,  H05K3/42 ,  H05K3/429 ,  H05K2201/09181 ,  H05K2201/09645 ,  H05K2201/09854 ,  H05K2203/1476

Abstract: A via provides a plurality of electrical connections between conductors on different layers of a circuit board. The via includes an opening through the circuit board formed by a plurality of substantially partially overlapping bores. An electrically conductive plating is formed on an inner surface of the opening. The plating forms a plurality of distinct electrically conductive paths.

公开(公告)号：US20060082984A1

公开(公告)日：2006-04-20

申请号：US11023897

申请日：2004-12-28

Applicant: Shin-Hsien Wu

Inventor： Shin-Hsien Wu

IPC: H05K7/06

CPC classification number: H05K1/162 ,  H05K1/115 ,  H05K1/167 ,  H05K3/027 ,  H05K3/043 ,  H05K3/403 ,  H05K3/4092 ,  H05K3/42 ,  H05K2201/0959 ,  H05K2201/09645

Abstract: A cut via structure for and a manufacturing method of connecting separate conductors are provided. The cut via structure is electrically connected to a substrate. It comprises at least two separate conductors. These conductors form a central-hollow via structure. Alternatively, the central hole can be filled with desired materials (central-filling structure). The conductors are separated by gaps among them. The gaps are formed in a vertically or slantly cut direction with respect to the substrate surface. The cut via structure further comprises a filling layer filled in between the separate conductors. Determined by the material property of the filling layer, the cut via structure can be used as a capacitor or a resistor, or for signal shielding. The cut via structure is made after the formation of a conventional via structure that has no signal shielding effect. This invention has the advantages of low manufacturing cost as well as flexible circuit board design due to its adjustable electrical parameters.

Abstract translation: 提供了一种用于连接分离的导体的切割通孔结构和制造方法。 切割通孔结构电连接到基板。 它包括至少两个独立的导体。 这些导体形成中心的中空通孔结构。 或者，中心孔可以填充所需的材料（中心填充结构）。 导线之间由间隙分开。 间隙相对于基板表面以垂直或倾斜的方向形成。 切割通孔结构还包括填充在分离的导体之间的填充层。 由填充层的材料性质决定，切割通孔结构可以用作电容器或电阻器，或用于信号屏蔽。 切割通孔结构在形成不具有信号屏蔽效果的常规通孔结构之后进行。 本发明由于其可调整的电参数而具有制造成本低，电路板设计灵活的优点。