公开(公告)号：US20060050497A1

公开(公告)日：2006-03-09

申请号：US11007551

申请日：2004-12-08

Applicant: Paul Goodwin

Inventor： Paul Goodwin

IPC: H05K1/14

CPC classification number: G11C5/04 ,  H01L23/34 ,  H01L23/36 ,  H01L25/0652 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H05K1/0203 ,  H05K1/118 ,  H05K1/181 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/056 ,  H05K2201/1056 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/1572 ,  H01L2224/0401

Abstract: Multiple fully buffered DIMM circuits or instantiations are presented in a single module. In a preferred embodiment, memory integrated circuits (preferably CSPs) and accompanying AMBs are arranged in two ranks in two fields on each side of a flexible circuit. The flexible circuit has expansion contacts disposed along one side. The flexible circuit is disposed about a supporting substrate or board to place one complete FB-DIMM circuit or instantiation on each side of the constructed module. In alternative but also preferred embodiments, the ICs on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. Other embodiments may only populate one side of the flexible circuit or may only remove enough substrate material to reduce but not eliminate the entire substrate contribution to overall profile. The flexible circuit may exhibit one or two or more conductive layers, and may have changes in the layered structure or have split layers. Other embodiments may stagger or offset the ICs or include greater numbers of ICs.

公开(公告)号：US20060049512A1

公开(公告)日：2006-03-09

申请号：US11173450

申请日：2005-07-01

Applicant: Paul Goodwin

Inventor： Paul Goodwin

IPC: H01L23/34

CPC classification number: G11C5/04 ,  H01L23/34 ,  H01L23/36 ,  H01L25/0652 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H05K1/0203 ,  H05K1/118 ,  H05K1/181 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/056 ,  H05K2201/1056 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/1572 ,  H01L2224/0401

Abstract: A flex circuit populated with integrated circuits on one or both sides and in one or more fields along the flex circuitry is wrapped about an edge of a supporting substrate. One side of the flex circuitry has a connective facility implemented in a preferred embodiment with edge connector contacts such as those that would allow the resulting module to be connected to an expansion socket. In a preferred embodiment, integrated circuits (preferably memory CSPs) and any accompanying circuitry or buffers are arranged on one or both sides of a flexible circuit. In some embodiments, one or more thermal sensors or other indicators are thermally coupled to the module substrate. In some embodiments that employ a metallic material substrate with extensions, the ICs of the module have exhibited reduced temperature variations when compared to like capacity DIMMs devised according to the well known planar strategy.

Abstract translation: 在柔性电路的一侧或两侧以及一个或多个场中填充有集成电路的柔性电路围绕支撑衬底的边缘缠绕。 柔性电路的一侧具有在优选实施例中实现的连接设备，其具有边缘连接器触点，例如将允许所得到的模块连接到扩展插座的连接器触点。 在优选实施例中，集成电路（优选存储器CSP）和任何伴随的电路或缓冲器布置在柔性电路的一侧或两侧。 在一些实施例中，一个或多个热传感器或其它指示器热耦合到模块基板。 在采用具有延伸部分的金属材料基板的一些实施例中，与根据众所周知的平面策略设计的类似容量的DIMM相比，模块的IC具有降低的温度变化。

公开(公告)号：US20060049500A1

公开(公告)日：2006-03-09

申请号：US11058979

申请日：2005-02-16

Applicant: Paul Goodwin

Inventor： Paul Goodwin

IPC: H01L23/02

CPC classification number: G11C5/04 ,  H01L2224/16225 ,  H05K1/0203 ,  H05K1/118 ,  H05K1/181 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/056 ,  H05K2201/1056 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/1572

Abstract: Modules with larger areas for device mounting but minimized profiles are provided. In preferred embodiments, modules that employ one or more flex circuits have sculpted supportive substrates to selectively accommodate larger or taller profile devices. In several preferred embodiments, higher profile circuits such as AMBs, for example, are disposed in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. In other preferred embodiments, both the substrate and the flexible circuitry have openings into which a device of greater profile such as, for example, an AMB or a logic device with or without a resident heat sink are provided with a volume to occupy without adding the full profile of the taller device to the profile of the module itself.

Abstract translation: 提供了更大面积的模块，用于器件安装，但最小化配置文件。 在优选实施例中，采用一个或多个柔性电路的模块具有雕刻的支撑衬底以选择性地容纳更大或更高的轮廓设备。 在几个优选实施例中，例如，诸如AMB的更高轮廓的电路被布置在优选实施例中，衬底中的窗口，凹部或切口区域是什么。 在其它优选实施例中，基板和柔性电路都具有开口，其中具有较大轮廓的装置（例如AMB或具有或不具有驻留散热器的逻辑装置）具有容积以便占据而不增加 更高的设备的完整配置文件到模块本身的配置文件。

公开(公告)号：US20060048385A1

公开(公告)日：2006-03-09

申请号：US11242962

申请日：2005-10-04

Applicant: James Cady ,  James Wehrly ,  Paul Goodwin

Inventor： James Cady ,  James Wehrly ,  Paul Goodwin

IPC: H01R43/02

CPC classification number: G11C5/143 ,  G11C5/04 ,  H01L23/5387 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/50 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K1/118 ,  H05K1/181 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/056 ,  H05K2201/1056 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/1572 ,  Y10T29/4913 ,  Y10T29/49179 ,  H01L2924/00

Abstract: Flexible circuitry is populated on one or both sides with integrated circuits (ICs) each of which ICs has an IC profile (height). A substantially flat, windowed fixture with a fixture profile less than the IC profiles of the ICs is applied over an IC-populated side of the flexible circuitry causing at least a part of the ICs to emerge from respective fixture windows. Material is removed simultaneously from that portion of the ICs that emerge from the windows to result in lower-profile ICs which, in a preferred embodiment exhibit profiles substantially coincident with the fixture profile established by the upper surface of the fixture. The method is used to advantage in devising circuit modules by disposing the flexible circuitry about a rigid substrate to form the circuit module with a low profile. Some embodiments use substrates that are windowed or have inset areas into which the lower profile CSPs may be set to reach profile requirements.

Abstract translation: 灵活的电路在一侧或两侧安装集成电路（IC），每个IC都具有IC配置文件（高度）。 具有小于IC的IC轮廓的夹具轮廓的基本平坦的窗口固定件被施加在柔性电路的IC填充侧上，导致至少一部分IC从相应的固定窗口出来。 从窗口出现的IC的那部分同时移除材料以产生较小轮廓的IC，其在优选实施例中表现出与由固定装置的上表面确定的夹具轮廓基本一致的轮廓。 该方法用于通过将柔性电路围绕刚性衬底设置以形成具有低轮廓的电路模块来设计电路模块。 一些实施例使用被窗口化或具有插入区域的衬底，下部轮廓CSP可设置到其中以达到轮廓要求。

公开(公告)号：US06967843B2

公开(公告)日：2005-11-22

申请号：US10364093

申请日：2003-02-11

Applicant: Brandon A. Rubenstein ,  Bradley E. Clements

Inventor： Brandon A. Rubenstein ,  Bradley E. Clements

IPC: F28F13/00 ,  H01L23/36 ,  H01L25/04 ,  H01L25/18 ,  H05K1/02 ,  H05K3/28 ,  H05K7/20

CPC classification number: F28F13/00 ,  H05K1/0209 ,  H05K3/284 ,  H05K7/20463 ,  H05K2201/0209 ,  H05K2201/1056 ,  H05K2201/10689

Abstract: Disclosed is an electronic board comprising a plurality of individual devices, each device having a plurality of connectors, the connectors mated to receptacles on the board, and a heat dissipating cover connected to the board and forming a cavity incarcerating the plurality of devices, the cover thermally contacting a plurality of the individual devices, the cover having a dimensional pattern such that its outer surface area is greater than its planar area.

Abstract translation: 公开了一种电子板，其包括多个单独的装置，每个装置具有多个连接器，连接器配合到板上的插座，以及散热盖，其与板连接并形成封闭多个装置的空腔， 热接触多个单独的装置，所述盖具有使其外表面积大于其平面面积的尺寸图案。

公开(公告)号：US20050243558A1

公开(公告)日：2005-11-03

申请号：US10836479

申请日：2004-04-30

Applicant: Paul Van Duyn

Inventor： Paul Van Duyn

IPC: F21V29/00 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K1/182 ,  F21S41/141 ,  F21S41/192 ,  F21S41/30 ,  F21S41/32 ,  F21S43/14 ,  F21S43/15 ,  F21S43/195 ,  F21S43/30 ,  F21S43/31 ,  F21S45/47 ,  F21V19/001 ,  F21V29/75 ,  F21V29/763 ,  F21W2107/10 ,  F21Y2103/10 ,  F21Y2115/10 ,  H05K1/0203 ,  H05K2201/10106 ,  H05K2201/10477 ,  H05K2201/1056

Abstract: A lamp assembly and methods of assembling the lamp assembly are provided. The lamp assembly comprises a printed circuit board (PCB) having a face surface, a rear surface opposite the face surface, electrical traces on the rear surface, and an opening extending from the face surface to the rear surface, and a light emitting diode (LED) emitter having a dome portion, a body, and a plurality of electrical terminals connected to the body, wherein the body of the LED emitter is adjacent the rear surface, the dome portion of the LED emitter extends through the opening in the PCB to the face surface, and the electrical terminals are connected to the electrical traces on the rear surface.

Abstract translation: 提供了灯组件和组装灯组件的方法。 灯组件包括具有面表面的印刷电路板（PCB），与表面相对的后表面，后表面上的电迹线和从表面延伸到后表面的开口;以及发光二极管（ LED）发射器，其具有圆顶部分，主体和连接到主体的多个电端子，其中LED发射器的主体邻近后表面，LED发射器的圆顶部分延伸穿过PCB中的开口， 面表面和电端子连接到后表面上的电迹线。

公开(公告)号：US20050024838A1

公开(公告)日：2005-02-03

申请号：US10925792

申请日：2004-08-24

Applicant: John Maxwell

Inventor： John Maxwell

IPC: H01L23/538 ,  H01L25/11 ,  H05K1/02 ,  H05K1/14 ,  H05K1/16 ,  H05K7/06 ,  H05K7/20

CPC classification number: H01L23/5385 ,  H01L25/115 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/1305 ,  H05K1/0203 ,  H05K1/145 ,  H05K1/165 ,  H05K2201/086 ,  H05K2201/09063 ,  H05K2201/1056 ,  H05K2201/10674 ,  H01L2924/00

Abstract: A packaging system for a high current, low voltage power supply. The power supply uses bare die power FETs which are directly mounted to a thermally conductive substrate by a solder attachment made to the drain electrode metallization on the back side of the FETs. The source electrode and gate electrode of each FET are coupled to the circuitry on an overhanging printed circuit board, using CSP solder balls affixed to the front side of the FET die. The heat generated by the FETs is effectively dissipated by the close coupling of the FETs to the thermally conductive underlying substrate. High interconnect densities are achieved through the use of a multilayer printed circuit board. This high interconnect density, with the addition of a magnetic core element, allows the power supply packaging system to incorporate transformer windings for an isolation transformer or an inductor.

Abstract translation: 用于大电流，低压电源的封装系统。 电源使用裸芯片功率FET，其通过在FET的背面上与漏电极金属化形成的焊接附件直接安装到导热基板。 每个FET的源电极和栅极电极使用固定在FET裸片正面的CSP焊球与偶数印刷电路板上的电路相连。 由FET产生的热量通过FET与导热底层基板的紧密耦合而被有效消散。 通过使用多层印刷电路板实现高互连密度。 这种高互连密度，通过添加磁芯元件，允许电源封装系统将用于隔离变压器或电感器的变压器绕组。

公开(公告)号：US20040156174A1

公开(公告)日：2004-08-12

申请号：US10364093

申请日：2003-02-11

Inventor： Brandon A. Rubenstein ,  Bradley E. Clements

IPC: H05K007/20

CPC classification number: F28F13/00 ,  H05K1/0209 ,  H05K3/284 ,  H05K7/20463 ,  H05K2201/0209 ,  H05K2201/1056 ,  H05K2201/10689

Abstract: Disclosed is an electronic board comprising a plurality of individual devices, each device having a plurality of connectors, the connectors mated to receptacles on the board, and a heat dissipating cover connected to the board and forming a cavity incarcerating the plurality of devices, the cover thermally contacting a plurality of the individual devices, the cover having a dimensional pattern such that its outer surface area is greater than its planar area.

Abstract translation: 公开了一种电子板，其包括多个单独的装置，每个装置具有多个连接器，连接器配合到板上的插座，以及散热盖，其与板连接并形成封闭多个装置的空腔， 热接触多个单独的装置，所述盖具有使其外表面积大于其平面面积的尺寸图案。

公开(公告)号：US06775141B2

公开(公告)日：2004-08-10

申请号：US10368399

申请日：2003-02-20

Applicant: Ryuji Yoshida ,  Masato Watanabe

Inventor： Ryuji Yoshida ,  Masato Watanabe

IPC: H05K0720

CPC classification number: H05K1/021 ,  H01L23/42 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/85455 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/13091 ,  H01L2924/16152 ,  H01L2924/181 ,  H05K1/182 ,  H05K3/0061 ,  H05K2201/0209 ,  H05K2201/09745 ,  H05K2201/1003 ,  H05K2201/10166 ,  H05K2201/1056 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: To provide a heat dissipation structure for an electronic circuit board, a recessed portion is formed in a surface of a heat dissipation board to extend to at least one side surface thereof. A gel-like resin having a high thermal conductivity is coated over the recessed portion. The electronic circuit board is brought into facial contact with the heat dissipation board with the electrical insulation sheet interposed therebetween so that at least one electronic component is buried in the gel-like resin. The gel-like resin coated in the recessed portion is such an amount that a gap between the electronic component and side surfaces and bottom surface of the recessed portion is filled with the gel-like resin and an excess amount of the gel-like resin is expelled out of the side surface of the heat dissipation board The gel-like resin protruded from the side surfaces of the heat dissipation board is removed.

Abstract translation: 为了提供一种用于电子电路板的散热结构，在散热板的表面上形成一个凹进部分，以延伸至至少一个侧表面。 具有高导热性的凝胶状树脂涂覆在凹部上。 将电子电路板与散热板进行面接触，其间插入有电绝缘片，使得至少一个电子部件埋设在凝胶状树脂中。 涂布在凹部中的凝胶状树脂的量使得电子部件与侧面之间的间隙和凹部的底面的间隙被凝胶状树脂填充，过量的凝胶状树脂为 从散热板的侧面排出从散热板的侧面突出的凝胶状树脂被除去。

公开(公告)号：US20030206392A1

公开(公告)日：2003-11-06

申请号：US10396399

申请日：2003-03-26

Inventor： Hiroyuki Kawata

IPC: H02B001/04

CPC classification number: H05K1/0203 ,  B62D5/0406 ,  H05K7/1432 ,  H05K2201/10166 ,  H05K2201/10484 ,  H05K2201/1056

Abstract: A switching device for controlling a large amount of current includes a circuit board carrying electronic components thereon, a power-switching element electrically connected to the circuit board, and a housing disposed underneath the circuit board and containing the power-switching element therein. The housing made of a heat-conductive material includes a heat-sink block having a sloped surface on which the power-switching element is mounted. Connecting leads extending from the power-switching element are positioned at an upper portion of the sloped surface which is close to the circuit board. In this manner, the length of connecting leads is shortened and heat and noises generated therein are suppressed.

Abstract translation: 用于控制大量电流的开关装置包括在其上承载电子部件的电路板，电连接到电路板的电源开关元件以及设置在电路板下方并且在其中容纳电力开关元件的壳体。 由导热材料制成的壳体包括具有安装有功率开关元件的倾斜表面的散热块。 从电源开关元件延伸的连接引线位于靠近电路板的倾斜表面的上部。 以这种方式，连接引线的长度被缩短，并且抑制了其中产生的热和噪声。