公开(公告)号：US07265983B2

公开(公告)日：2007-09-04

申请号：US10958614

申请日：2004-10-05

Applicant: Michael Frisch

Inventor： Michael Frisch

IPC: H05K7/20 ,  F28F7/00

CPC classification number: H05K1/0204 ,  H01L23/3677 ,  H01L2924/0002 ,  H05K2201/0397 ,  H05K2201/09054 ,  H05K2201/10166 ,  H01L2924/00

Abstract: The present invention relates to a power unit comprising at least one power electronics module, a circuit carrier, which is connected to said power electronics module, and at least one heat sink, which is connected to said power electronics module, in order to dissipate heat. The invention also relates to an associated heat sink and a corresponding assembly method. In order to provide a power unit and an associated assembly method which allows improved dissipation of air heat, as well as adequate electrical insulation of the power modules and simplified implementation, the circuit carrier comprises at least one through hole. At least one contact extension located on the heat sink, which is at least partially received by the through hole. The contact extension of the heat sink is thermally contacted with the power electronics module by means of a heat-conductive material.

Abstract translation: 本发明涉及一种功率单元，其包括至少一个功率电子模块，连接到所述功率电子模块的电路载体和连接到所述功率电子模块的至少一个散热器，以便散热 。 本发明还涉及相关联的散热器和相应的组装方法。 为了提供功率单元和相关联的组装方法，其允许改善空气热的耗散，以及功率模块的充分的电绝缘和简化的实现，电路载体包括至少一个通孔。 位于散热器上的至少一个接触延伸部分，其至少部分地被通孔接收。 散热器的接触延伸通过导热材料与电力电子模块热接触。

公开(公告)号：US20070151661A1

公开(公告)日：2007-07-05

申请号：US11685065

申请日：2007-03-12

Applicant: Guoping Mao ,  Rui Yang

Inventor： Guoping Mao ,  Rui Yang

IPC: B32B37/00

CPC classification number: B32B15/08 ,  B32B38/10 ,  B32B2311/00 ,  B32B2379/08 ,  C08J7/12 ,  C09K13/02 ,  G11B5/484 ,  G11B5/486 ,  H05K1/028 ,  H05K1/0393 ,  H05K1/056 ,  H05K3/002 ,  H05K3/381 ,  H05K2201/0141 ,  H05K2201/0154 ,  H05K2201/0191 ,  H05K2201/0397 ,  H05K2201/09036 ,  H05K2203/0353 ,  H05K2203/0786 ,  H05K2203/0793 ,  Y10T156/1052 ,  Y10T428/12

Abstract: An etched dielectric film for use in a hard disk drive. The dielectric film has a thickness of about 25 μm or greater when it is attached to a supporting metal substrate, and is subsequently etched to a thickness of about 20 μm or less.

Abstract translation: 用于硬盘驱动器的蚀刻电介质膜。 当电介质膜连接到支撑金属基底上时，该介电膜具有约25μm或更大的厚度，随后被蚀刻至约20μm或更小的厚度。

公开(公告)号：US20070046313A1

公开(公告)日：2007-03-01

申请号：US11552856

申请日：2006-10-25

Applicant: Benjamin Eldridge ,  Gary Grube ,  Igor Khandros ,  Ga tan Mathieu

Inventor： Benjamin Eldridge ,  Gary Grube ,  Igor Khandros ,  Ga tan Mathieu

IPC: G01R31/26

CPC classification number: H05K7/1069 ,  B23K1/0008 ,  B23K20/004 ,  B23K2101/40 ,  C23C18/1605 ,  C23C18/165 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/07342 ,  G01R31/2856 ,  G01R31/2863 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/49811 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/27 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/16 ,  H01L2223/54453 ,  H01L2224/02311 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0558 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/11003 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/13022 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45572 ,  H01L2224/45599 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/48844 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/90 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10S977/712 ,  Y10S977/723 ,  Y10T29/49004 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T29/49171 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/4922 ,  Y10T29/49812 ,  Y10T428/12396 ,  Y10T428/12528 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/48744 ,  H01L2224/29099 ,  H01L2224/29075 ,  H01L2224/85399 ,  H01L2924/206

Abstract: Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150° C., and can be completed in less than 60 minutes.

Abstract translation: 弹性接触结构直接安装在半导体晶片上的接合焊盘上，在裸片与半导体晶片分离（分离）之前。 这使得半导体管芯能够通过具有设置在其表面上的多个端子的电路板等连接到半导体管芯来进行（例如，测试和/或烧入）。 接下来，半导体管芯可以从半导体晶片分离，因此可以使用相同的弹性接触结构来实现半导体管芯和其他电子部件（例如布线基板，半导体封装等）之间的互连。 使用本发明的全金属复合互连元件作为弹性接触结构，可以在至少150℃的温度下进行老化，并且可以在少于60分钟内完成。

公开(公告)号：US07180006B2

公开(公告)日：2007-02-20

申请号：US10724219

申请日：2003-12-01

Applicant: Soon Bog Kwon ,  Sang Hun Lee ,  Yang Sik Moon ,  Ki Pyo Hong ,  Yoon Kuen Cho

Inventor： Soon Bog Kwon ,  Sang Hun Lee ,  Yang Sik Moon ,  Ki Pyo Hong ,  Yoon Kuen Cho

IPC: B32B3/00 ,  H05K1/09

CPC classification number: H05K3/244 ,  H01L23/49572 ,  H01L23/49582 ,  H01L2924/0002 ,  H05K1/0393 ,  H05K3/28 ,  H05K2201/0397 ,  H05K2203/1105 ,  Y10S428/901 ,  Y10T29/49155 ,  Y10T29/4916 ,  Y10T428/24917 ,  Y10T428/325 ,  H01L2924/00

Abstract: A tape substrate including an insulating film, a copper foil pattern formed on the insulating film at one side of the insulating film, and provided with a connecting area where an electronic element is to be mounted, a barrier layer plated on the copper foil pattern at the connecting area, and formed with a plurality of pores, and a tin layer plated on the barrier layer, and alloyed with a portion of the copper foil pattern corresponding to the connecting area, through the pores. A method for fabricating the tape substrate is also disclosed. In accordance with the invention, it is possible to reduce the time taken for the copper foil pattern to come into contact with the electroless tin plating solution used in the tin plating process, thereby preventing the copper component of the copper foil pattern from being eluted. Accordingly, there is no open-circuit fault caused by formation of pores. The barrier layer makes it possible to obtain an improved plating efficiency and to reduce the thickness of the alloy layer. In addition, the barrier layer serves to reduce internal stress generated at the interface between the tin layer and the copper foil pattern, thereby suppressing formation of voids. Accordingly, there is an effect of preventing a short circuit caused by the growth of whiskers.

Abstract translation: 一种带状基板，包括绝缘膜，在绝缘膜的一侧上的绝缘膜上形成的铜箔图案，并且设置有要安装电子元件的连接区域，镀在铜箔图案上的阻挡层 连接区域，并且形成有多个孔，以及镀在阻挡层上的锡层，并且与对应于连接区域的铜箔图案的一部分合金化。 还公开了一种用于制造带基材的方法。 根据本发明，可以减少铜箔图案与镀锡工艺中使用的化学镀锡溶液接触所花费的时间，从而防止铜箔图案的铜成分被洗脱。 因此，没有由孔形成引起的开路故障。 阻挡层可以获得提高的电镀效率并减小合金层的厚度。 此外，阻挡层用于减少在锡层和铜箔图案之间的界面处产生的内应力，从而抑制空隙的形成。 因此，存在防止晶须生长引起的短路的效果。

公开(公告)号：US07166914B2

公开(公告)日：2007-01-23

申请号：US10876897

申请日：2004-06-25

Applicant: Thomas H. DiStefano ,  John W. Smith ,  Tony Faraci

Inventor： Thomas H. DiStefano ,  John W. Smith ,  Tony Faraci

IPC: H01L23/34 ,  H01L29/0623 ,  H01L23/495 ,  H01L23/06 ,  H01L23/10

CPC classification number: H01L21/4839 ,  H01L23/22 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/642 ,  H01L24/72 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/73253 ,  H01L2224/81904 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2203/063 ,  H01L2924/00 ,  H01L2224/48

Abstract: A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.

Abstract translation: 包括芯片的封装半导体芯片和诸如散热器的封装元件通过将芯片上的触点之间的柔性引线和诸如片材或板之类的电介质元件上的端子连接并将片或板远离芯片 并且注入液体材料以形成填充封装元件和电介质元件之间的空间并且围绕引线的柔性层。 介质元件和封装元件向外延伸超过芯片的边缘，并物理保护芯片。 组件可以通过常规的表面安装技术来处理和安装。 组件可以包括附加电路元件，例如与芯片结合使用的电容器。

公开(公告)号：US20070007833A1

公开(公告)日：2007-01-11

申请号：US11455927

申请日：2006-06-20

Applicant: Takayuki Kitagawa

Inventor： Takayuki Kitagawa

IPC: H02K3/24 ,  H02K11/00 ,  H02K5/18

CPC classification number: H05K3/326 ,  H02K5/225 ,  H02K11/33 ,  H02K2211/03 ,  H05K3/202 ,  H05K3/306 ,  H05K2201/0382 ,  H05K2201/0397 ,  H05K2201/09118 ,  H05K2201/1059 ,  Y10S310/03

Abstract: A control circuit device for a motor is provided with a circuit board which has an electrically-conductive terminal for electrically connecting the motor with an exterior connector, a heat radiating unit which is connected with the circuit board to radiate heat generated by the circuit board. The heat radiating unit has a convex member at a surface thereof of the side where the electrically conductive terminal is arranged. The electrically conductive terminal is integrally formed with a concave member for being engaged with the convex member. The convex member is engaged with the concave member. Thus, a heat sink can be readily mounted without increasing the cost.

Abstract translation: 一种用于电动机的控制电路装置设置有电路板，该电路板具有用于将电动机与外部连接器电连接的导电端子，与电路板连接以辐射由电路板产生的热量的散热单元。 散热单元在布置导电端子的一侧的表面具有凸形构件。 导电端子与凹形构件整体形成，用于与凸形构件接合。 凸形构件与凹形构件接合。 因此，可以容易地安装散热器而不增加成本。

公开(公告)号：US07152315B1

公开(公告)日：2006-12-26

申请号：US10826019

申请日：2004-04-17

Applicant: Mohan R. Paruchuri

Inventor： Mohan R. Paruchuri

IPC: H05K3/20

CPC classification number: H05K3/44 ,  H05K3/4038 ,  H05K3/445 ,  H05K2201/0305 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09554 ,  H05K2203/063 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155

Abstract: A method 10, 80, 81 for making multi-layer electronic circuit boards 77, 137, 139 having metallized apertures 18, 20, 34, 40, 104, 106, 120.

Abstract translation: 一种用于制造具有金属化孔18,20,34,40,104,106,120的多层电子电路板77,137,139的方法10,80,81。

公开(公告)号：US07142000B2

公开(公告)日：2006-11-28

申请号：US10673686

申请日：2003-09-29

Applicant: Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan L. Mathieu

Inventor： Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan L. Mathieu

IPC: G01R31/28 ,  G01R1/073

CPC classification number: H05K7/1069 ,  B23K1/0008 ,  B23K20/004 ,  B23K2101/40 ,  C23C18/1605 ,  C23C18/165 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/07342 ,  G01R31/2856 ,  G01R31/2863 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/49811 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/27 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/16 ,  H01L2223/54453 ,  H01L2224/02311 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0558 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/11003 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/13022 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45572 ,  H01L2224/45599 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/48844 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/90 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10S977/712 ,  Y10S977/723 ,  Y10T29/49004 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T29/49171 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/4922 ,  Y10T29/49812 ,  Y10T428/12396 ,  Y10T428/12528 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/48744 ,  H01L2224/29099 ,  H01L2224/29075 ,  H01L2224/85399

Abstract: Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150° C., and can be completed in less than 60 minutes.

Abstract translation: 弹性接触结构直接安装在半导体晶片上的接合焊盘上，在裸片与半导体晶片分离（分离）之前。 这使得半导体管芯能够通过具有设置在其表面上的多个端子的电路板等连接到半导体管芯来进行（例如，测试和/或烧入）。 接下来，半导体管芯可以从半导体晶片分离，因此可以使用相同的弹性接触结构来实现半导体管芯和其他电子部件（例如布线基板，半导体封装等）之间的互连。 使用本发明的全金属复合互连元件作为弹性接触结构，可以在至少150℃的温度下进行老化，并且可以在少于60分钟内完成。

公开(公告)号：US07137852B2

公开(公告)日：2006-11-21

申请号：US11146645

申请日：2005-06-06

Applicant: Hironori Tsukamoto

Inventor： Hironori Tsukamoto

IPC: H01R33/00

CPC classification number: H05K3/326 ,  H01R4/16 ,  H01R33/05 ,  H05K3/202 ,  H05K2201/0397 ,  H05K2201/10106 ,  H05K2201/10651

Abstract: The invention provides a fixing structure for an electron device that enables an electron device to be attached and removed from wiring with one touch. The structure is provided with bus bars formed from conductive plate material that are connected to a power source, and an LED which has lead electrodes fixed to the bus bars and which is supplied with electricity therefrom. Fixing portions of the bus bars are provided with position determining tabs for positioning the lead electrodes, and an elastic contacting tab that elastically holds each lead electrode. The position determining tabs and the elastic contacting tabs are formed by bending portions of the bus bars. Accordingly, there is no need to provide components separate from the bus bars. When attachment and removal is performed, the LED is pushed downward toward or lifted up from the fixing portions of the bus bars.

Abstract translation: 本发明提供了一种电子器件的固定结构，其能够使电子器件能够通过一触即可将布线附着和移除。 该结构设置有由连接到电源的导电板材料形成的汇流条，以及具有固定到汇流条上并由其供应电力的引线电极的LED。 母线的固定部分设置有用于定位引线电极的位置确定片，以及弹性地保持每个引线电极的弹性接触片。 位置确定片和弹性接触突片通过弯曲母线的部分而形成。 因此，不需要提供与母线分开的部件。 当执行附接和移除时，LED从汇流条的固定部分向下推或向上推。

公开(公告)号：US07137189B2

公开(公告)日：2006-11-21

申请号：US10964224

申请日：2004-10-13

Applicant: Tatsumi Tsuchiya ,  Yuhsuke Matsumoto ,  Takaaki Murokawa ,  Naoki Fujii ,  Takuya Satoh ,  Yasuhiro Mita ,  Hiroyasu Tsuchida ,  Yoshio Uematsu

Inventor： Tatsumi Tsuchiya ,  Yuhsuke Matsumoto ,  Takaaki Murokawa ,  Naoki Fujii ,  Takuya Satoh ,  Yasuhiro Mita ,  Hiroyasu Tsuchida ,  Yoshio Uematsu

IPC: G11B5/127 ,  H04R31/00

CPC classification number: G11B5/4853 ,  G11B5/484 ,  G11B5/486 ,  H01L2224/742 ,  H05K1/189 ,  H05K3/3442 ,  H05K3/3494 ,  H05K2201/0397 ,  H05K2201/09663 ,  H05K2201/09745 ,  H05K2203/041 ,  H05K2203/107 ,  H05K2203/159 ,  Y02P70/613 ,  Y10T29/49025 ,  Y10T29/4903 ,  Y10T29/49032 ,  Y10T29/49046 ,  Y10T29/49144 ,  Y10T29/49179

Abstract: An integrated lead suspension includes a solder ball that is placed between a lead wiring pad provided on a flexure of the suspension, and a bonding pad provided on a slider of a head gimbal section. The lead wiring pad and bonding pad are soldered by melting the solder ball. As a result, there is provided a recessed section into which a solder ball is placed by way of surface raised sections, using gravitational force, in the vicinity of the center line of the surface of the lead wiring pad. In this way the position of the solder ball is not displaced from the center line when a bonding pad and lead wiring pad are connected by means of a solder ball.