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    Two signal one power plane circuit board
    61.
    发明授权
    Two signal one power plane circuit board 有权
    两个信号一个电源平面电路板

    公开(公告)号：US06204453B1

    公开(公告)日：2001-03-20

    申请号：US09203956

    申请日：1998-12-02

    Applicant: Kenneth Fallon ,  Miguel A. Jimarez ,  Ross W. Keesler ,  John M. Lauffer ,  Roy H. Magnuson ,  Voya R. Markovich ,  Irv Memis ,  Jim P. Paoletti ,  Marybeth Perrino ,  John A. Welsh ,  William E. Wilson

    Inventor： Kenneth Fallon ,  Miguel A. Jimarez ,  Ross W. Keesler ,  John M. Lauffer ,  Roy H. Magnuson ,  Voya R. Markovich ,  Irv Memis ,  Jim P. Paoletti ,  Marybeth Perrino ,  John A. Welsh ,  William E. Wilson

    IPC: H05K103

    CPC classification number: H05K3/44 ,  H05K1/056 ,  H05K3/0023 ,  H05K3/108 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09554 ,  H05K2203/0733

    Abstract: A method of forming a printed circuit board or circuit card is provided with a metal layer which serves as a power plane sandwiched between a pair of photoimageable dielectric layers. Photoformed metal filled vias and photoformed plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials and connected to the vias and plated through holes. A border may be around the board or card including a metal layer terminating in from the edge of one of the dielectric layers. A copper foil is provided with clearance holes. First and second layers of photoimageable curable dielectric material is disposed on opposite sides of the copper which are photoimageable material. The patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. At the clearance holes in the copper, through holes are developed where holes were patterned in both dielectric layers. Thereafter, the surfaces of the photoimageable material, vias and through holes are metalized by copper plating. This is preferably done by protecting the remainder of the circuitry with photoresist and utilizing photolithographic techniques. The photoresist is thereafter removed, leaving a circuit board or card having metalization on both sides, vias extending from both sides to the copper layer in the center, plated through holes connecting the two outer circuitized copper layers.

    Abstract translation: 形成印刷电路板或电路卡的方法设置有用作夹在一对可光成像的电介质层之间的电力平面的金属层。 光刻图形金属填充的通孔和光成像的电镀通孔位于光图案化材料中，信号电路位于每个介电材料的表面上，并连接到通孔和电镀通孔。 边界可以在板或卡周围，包括从电介质层之一的边缘终止的金属层。 铜箔上设有间隙孔。 可光成像的可固化介电材料的第一和第二层设置在作为可光成像的材料的铜的相对侧上。 图案在可光成象材料的第一层和第二层上显影，以通过通孔显露金属层。 在铜中的间隙孔处，通孔被开发成在两个电介质层中图案化孔。 此后，可光成像材料，通孔和通孔的表面通过镀铜进行金属化。 这优选通过用光致抗蚀剂和利用光刻技术保护电路的其余部分来实现。 然后去除光致抗蚀剂，留下在两侧具有金属化的电路板或卡，其中心的两侧延伸到铜层，通孔连接两个外部电路化的铜层。

    Feedthrough via connection on solder resistant layer
    62.
    发明授权
    Feedthrough via connection on solder resistant layer 失效
    通过连接在耐焊层上

    公开(公告)号：US06172307B2

    公开(公告)日：2001-01-09

    申请号：US08410616

    申请日：1995-03-24

    Applicant: Fred E. Ostrem ,  Alfred G. Ocken

    Inventor： Fred E. Ostrem ,  Alfred G. Ocken

    IPC: H01R909

    CPC classification number: H05K3/44 ,  H05K1/0206 ,  H05K1/0393 ,  H05K1/05 ,  H05K1/111 ,  H05K3/0061 ,  H05K3/305 ,  H05K3/3452 ,  H05K3/363 ,  H05K3/4038 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/0347 ,  H05K2201/09554 ,  H05K2201/10666 ,  H05K2201/10977

    Abstract: A method for constructing a feedthrough via connection and a corresponding apparatus includes a metallic plate (101), or rigidizer, preferably composed of an aluminum material. A solderable contact area (103), is located on the plate (101). This contact area (103) is preferable comprised of a copper material selectively disposed by a plasma spraying process. Next, an electrically insulating adhesive layer (105) is disposed onto the plate (101). This adhesive layer (105) has a feedthrough via (106) disposed therethrough aligned with the contact area (103). Then, a substrate (109), preferably composed of a flexible composite polyimide material, is disposed onto the adhesive layer (105). This flexible substrate (109) has a via (110) disposed therethrough with a solderable area (111) disposed thereon. Then, a quantity of solder (113) is disposed onto the solderable area (111), and the assembly (100) is heated so that the solder (113) flows into the vias (106) and (110), thereby providing an electrical connection including the solderable area (111) of the via (110), the solder (113), and the contact area (103). During this reflow step, the structure of the adhesive layer (105) acts as a soldermask preventing the solder (113) from flowing outside of an area defined by the via (106).

    Abstract translation: 通过连接构造馈通方法和相应的装置包括优选由铝材料组成的金属板（101）或刚性机构。 可焊接接触区域（103）位于板（101）上。 该接触区域（103）优选由通过等离子体喷涂工艺选择性地设置的铜材料构成。 接下来，将电绝缘性粘合剂层（105）设置在板（101）上。 该粘合剂层（105）具有穿过通孔（106），其穿过与接触区域（103）对齐。 然后，将优选由柔性复合聚酰亚胺材料构成的基板（109）设置在粘合剂层（105）上。 该柔性基板（109）具有穿过其中设置有可焊接区域（111）的通孔（110）。 然后，将一定量的焊料（113）设置在可焊接区域（111）上，并且组装（100）被加热，使得焊料（113）流入通孔（106）和（110），从而提供电气 包括通孔（110）的可焊接区域（111），焊料（113）和接触区域（103）的连接。 在该回流步骤期间，粘合剂层（105）的结构用作焊接掩模，防止焊料（113）流过由通孔（106）限定的区域的外部。

    Manufacturing process of a high density substrate design
    66.
    发明授权
    Manufacturing process of a high density substrate design 失效
    高密度基板设计的制造工艺

    公开(公告)号：US5146674A

    公开(公告)日：1992-09-15

    申请号：US724245

    申请日：1991-07-01

    Applicant: Richard F. Frankeny ,  Karl Hermann ,  Ronald L. Imken ,  Joseph LaTorre

    Inventor： Richard F. Frankeny ,  Karl Hermann ,  Ronald L. Imken ,  Joseph LaTorre

    IPC: H01L21/48 ,  H01L23/538 ,  H05K3/00 ,  H05K3/20 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46

    CPC classification number: H05K3/462 ,  H01L21/4857 ,  H01L23/5383 ,  H05K3/445 ,  H01L2924/0002 ,  H05K2201/09318 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2203/0152 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K3/0023 ,  H05K3/205 ,  H05K3/423 ,  H05K3/4641 ,  H05K3/4647 ,  Y10T29/49126 ,  Y10T29/49156

    Abstract: Substrate layers with individual bumps and cavities are provided which can be manufactured and tested in parallel and then joined into a multilayer substrate. The method of manufacturing these layers, as contemplated by the present invention, includes initially forming a plurality of vias in a layer of electrically conductive material. Next, a dielectric material, is placed adjacent the layer of conductive material. Holes which are coaxial with the vias are then formed in the dielectric material. Electrically conductive material is then deposited within the vias, thereby forming a conductive stud. Additional electrically conductive material is then deposited, on the side of the dielectric opposite the conductive material to form a signal layer, as well projections of electrically conductive material extending from the studs. A continuous layer of dielectric material is then placed adjacent the side of the substrate opposite the projections. A portion of this layer, adjacent the stud, is then removed, thereby exposing the stud and forming a cavity. The substrate layers can then be joined to form a multilayer substrate module.

    Abstract translation: 提供具有单独凸块和空腔的基板层，其可以并联制造和测试，然后连接到多层基板中。 如本发明所设想的制造这些层的方法包括最初在导电材料层中形成多个通孔。 接下来，将电介质材料放置在邻近导电材料层的位置。 然后在电介质材料中形成与通孔同轴的孔。 然后将导电材料沉积在通孔内，从而形成导电柱。 然后在电介质的与导电材料相对的一侧上沉积附加的导电材料以形成信号层，以及从螺柱延伸的导电材料的突起。 然后将连续的介电材料层放置成与衬底相对的与突起相对的一侧。 然后去除邻近螺柱的该层的一部分，从而暴露螺柱并形成空腔。 然后可以将衬底层接合以形成多层衬底模块。

    METHOD FOR PROCESSING PRINTED CIRCUIT BOARD, PRINTED CIRCUIT BOARD AND ELECTRONIC APPARATUS
    68.
    发明申请
    METHOD FOR PROCESSING PRINTED CIRCUIT BOARD, PRINTED CIRCUIT BOARD AND ELECTRONIC APPARATUS 有权
    印刷电路板，印刷电路板和电子设备的处理方法

    公开(公告)号：US20150163909A1

    公开(公告)日：2015-06-11

    申请号：US14000566

    申请日：2012-06-19

    Applicant: SHENNAN CIRCUITS CO LTD.

    Inventor： Chuanzhi Li ,  Hua Miao ,  Zhanhao Xie ,  Jun Peng

    IPC: H05K1/11 ,  H05K3/00 ,  H05K1/02

    CPC classification number: H05K1/115 ,  H05K1/0204 ,  H05K1/021 ,  H05K1/0215 ,  H05K1/0216 ,  H05K1/0218 ,  H05K1/0243 ,  H05K1/0298 ,  H05K3/0094 ,  H05K3/4635 ,  H05K2201/0792 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09618 ,  H05K2201/09845 ,  H05K2201/10242 ,  H05K2201/10416 ,  Y10T29/49165

    Abstract: A printed circuit board (PCB) a method for processing PCB and an electronic apparatus are provided. The method for processing PCB may include: forming a hole in the PCB, wherein the PCB includes a metal matrix and at least two substrate layers, at least one of the at least two substrate layers has an geoelectric layer thereon; the metal matrix is fixed in a slot provided its the substrate, the formed hole contacts with both the geoelectric layer and the metal matrix; and providing conductive substances in the hole, with the conductive substances in the hole being in contact with the inner geoelectric layer and the metal matrix, so that the inner geoelectric layer and the metal matrix are in conduction with each other. The solutions of the embodiments of the application are beneficial to improve reliability of connection between the geoelectric layer and the metal matrix of the PCB, and improve transmission performance of a high frequency signal.

    Abstract translation: 提供印刷电路板（PCB）用于处理PCB和电子设备的方法。 用于处理PCB的方法可以包括：在PCB中形成孔，其中PCB包括金属基体和至少两个基底层，至少两个基底层中的至少一个在其上具有地电层; 金属基体固定在设置其基板的槽中，形成的孔与地电电极和金属基体接触; 并且在孔中提供导电物质，孔中的导电物质与内部地电电极和金属基体接触，使得内部地电电介质层和金属基体彼此导通。 本申请的实施例的解决方案有利于提高PCB上的地电层和金属矩阵之间的连接的可靠性，并提高高频信号的传输性能。

    Ground vias for enhanced preamp heat release in hard disk drives
    69.
    发明授权
    Ground vias for enhanced preamp heat release in hard disk drives 有权
    用于硬盘驱动器中增强前置放热释放的通孔

    公开(公告)号：US08730684B2

    公开(公告)日：2014-05-20

    申请号：US13526887

    申请日：2012-06-19

    Applicant: Alex Cayaban ,  Szu-Han Hu ,  Yasunari Ooyabu ,  Martin John McCaslin

    Inventor： Alex Cayaban ,  Szu-Han Hu ,  Yasunari Ooyabu ,  Martin John McCaslin

    IPC: H05K7/10 ,  H05K7/12

    CPC classification number: G11B33/1426 ,  G11B33/123 ,  H05K1/0206 ,  H05K1/056 ,  H05K1/189 ,  H05K2201/09509 ,  H05K2201/09554

    Abstract: Described is a preamp flex cable for use in a hard drive. The flex cable incorporates a stiffener layer operable to provide a mechanical support, an insulating layer provided over the stiffener layer and having at least one via provided therein to expose the stiffener layer, and at least one conductive layer provided over the insulating layer. The at least one conductive layer forms an electrical circuit and at least one heat removing element that extends through the via and establishes a contact with the stiffener layer.

    Abstract translation: 描述了一种用于硬盘驱动器的前置放大器柔性电缆。 柔性电缆包括可操作以提供机械支撑件的加强层，设置在加强层上的绝缘层，并且具有设置在其中的至少一个通孔以露出加强层，以及设置在绝缘层上的至少一个导电层。 所述至少一个导电层形成电路和至少一个散热元件，其延伸穿过所述通孔并与所述加强层建立接触。

    Wired circuit board
    70.
    发明授权
    Wired circuit board 有权
    有线电路板

    公开(公告)号：US08669479B2

    公开(公告)日：2014-03-11

    申请号：US13681961

    申请日：2012-11-20

    Applicant: Nitto Denko Corporation

    Inventor： Jun Ishii

    IPC: H05K1/11 ,  H05K1/09

    CPC classification number: H05K1/115 ,  G11B5/484 ,  G11B5/486 ,  G11B5/4873 ,  H05K1/056 ,  H05K1/118 ,  H05K3/40 ,  H05K2201/0394 ,  H05K2201/09554

    Abstract: A wired circuit board includes an insulating layer formed with a first opening and a second opening, a conductive layer formed on the insulating layer and including a terminal overlapping the first opening, and a wire having a part thereof overlapping the second opening and continued to the terminal, a metal pedestal portion formed under the insulating layer and disposed around the first opening so as to overlap the second opening and support an electronic element, and a conductive portion filling the second opening to provide electrical conduction between the wire and the metal pedestal portion.

    Abstract translation: 布线电路板包括形成有第一开口和第二开口的绝缘层，形成在绝缘层上并包括与第一开口重叠的端子的导电层，以及具有与第二开口重叠的部分的导线， 端子，金属基座部分，形成在所述绝缘层下方并且设置在所述第一开口周围以与所述第二开口重叠并且支撑电子元件;以及导电部分，其填充所述第二开口以在所述电线和所述金属基座部分之间提供导电 。

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