公开(公告)号：US20100252304A1

公开(公告)日：2010-10-07

申请号：US12752692

申请日：2010-04-01

Applicant: Shigetsugu Muramatsu ,  Yasuhiko Kusama

Inventor： Shigetsugu Muramatsu ,  Yasuhiko Kusama

IPC: H05K1/11 ,  H05K1/09 ,  H05K3/00

CPC classification number: H05K3/3452 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15151 ,  H05K1/111 ,  H05K3/0044 ,  H05K3/243 ,  H05K3/305 ,  H05K2201/0191 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/025 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method of manufacturing a wiring board for use in mounting of an electronic component includes: forming an outermost wiring layer on a surface side where the electronic component is mounted; forming an insulating layer so as to cover the wiring layer; and forming a concave portion in the insulating layer. The concave portion is formed by removing, using a mask formed in a required shape by patterning, an exposed portion of the insulating layer in a step-like shape until a surface of a pad defined at a portion of the wiring layer is exposed. The concave portion is preferably formed by removing the portion of the insulating layer by sand blast.

Abstract translation: 制造电子部件安装用布线基板的方法包括：在安装有电子部件的表面侧形成最外层布线层; 形成绝缘层以覆盖所述布线层; 以及在所述绝缘层中形成凹部。 通过使用通过图案化形成所需形状的掩模，以阶梯状形状除去绝缘层的露出部分，直到露出布线层的一部分的焊盘的表面来形成凹部。 凹部优选通过用喷砂除去绝缘层的一部分而形成。

公开(公告)号：US07807932B2

公开(公告)日：2010-10-05

申请号：US11589905

申请日：2006-10-31

Applicant: Tatsunori Yamamoto

Inventor： Tatsunori Yamamoto

IPC: H01R12/04 ,  H05K1/11

CPC classification number: H05K3/281 ,  H05K1/111 ,  H05K3/243 ,  H05K3/386 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/09745 ,  H05K2203/0369

Abstract: An embodiment of a printed circuit board according to the present invention is provided with an insulating layer, a conductive layer that is laminated on the insulating layer and that has a connecting portion and a circuit pattern portion formed connected to the connecting portion, and a film cover layer that covers the insulating layer and the conductive layer via an adhesive layer and that has an opening for connecting a mounted component to the connecting portion. The circuit pattern portion is provided with a recessed portion that is concave with respect to the connecting portion.

Abstract translation: 根据本发明的印刷电路板的一个实施例设置有绝缘层，层压在绝缘层上的导电层，并且具有连接部分和连接到连接部分的电路图形部分，以及膜 覆盖层，其通过粘合剂层覆盖绝缘层和导电层，并且具有用于将安装部件连接到连接部分的开口。 电路图形部分设置有相对于连接部分凹入的凹部。

公开(公告)号：US20100221414A1

公开(公告)日：2010-09-02

申请号：US12491282

申请日：2009-06-25

Applicant: Toru Furuta ,  Kotaro Takagi ,  Michio Ido ,  Fumitaka Takagi

Inventor： Toru Furuta ,  Kotaro Takagi ,  Michio Ido ,  Fumitaka Takagi

IPC: B05D5/12

CPC classification number: H05K1/111 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16237 ,  H01L2924/0002 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15151 ,  H05K3/06 ,  H05K3/108 ,  H05K3/243 ,  H05K3/244 ,  H05K3/323 ,  H05K3/3452 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/0989 ,  H05K2203/0369 ,  H05K2203/0574 ,  Y02P70/611 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A method for manufacturing a printed wiring board includes preparing insulative board having first and second surfaces, forming metal film on the first surface, plating resist on the metal film and plated-metal film on the metal film exposed by the plating resist, covering portion of the plated-metal film with etching resist, etching to reduce thickness of the plated-metal film exposed by the etching resist, removing the etching and plating resists, by removing the metal film exposed after removing the plating resist, forming wiring comprising pad for electronic component having gold bump and conductive circuit which is thinner than the pad, forming solder-resist layer on the first surface and the wiring, and forming opening in the solder-resist layer to expose the pad and portion of the conductive circuit contiguous to the pad and metal coating on the pad and portion of the conductive circuit, which are exposed through the opening.

Abstract translation: 一种制造印刷电路板的方法，包括制备具有第一表面和第二表面的绝缘板，在第一表面上形成金属膜，在金属膜上形成电镀抗蚀剂和在电镀抗蚀剂暴露的金属膜上的镀金属膜，覆盖部分 具有抗蚀剂的电镀金属膜，通过去除在去除电镀抗蚀剂之后暴露的金属膜，蚀刻以减少由抗蚀剂暴露的电镀金属膜的厚度，去除蚀刻和电镀抗蚀剂的蚀刻，形成包括用于电子的焊盘的布线 具有比焊盘薄的金凸块和导电电路的部件，在第一表面和布线上形成阻焊层，以及在阻焊层中形成开口以暴露焊盘和与焊盘相邻的导电电路的部分 以及通过开口暴露在焊盘和导电电路的部分上的金属涂层。

公开(公告)号：US20100109834A1

公开(公告)日：2010-05-06

申请号：US12607952

申请日：2009-10-28

Applicant: Lex Kosowsky ,  Robert Fleming ,  Ning Shi

Inventor： Lex Kosowsky ,  Robert Fleming ,  Ning Shi

IPC: H01C7/00

CPC classification number: H01C7/12 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/115 ,  H05K1/167 ,  H05K2201/0738 ,  H05K2201/09736 ,  H05K2201/09781

Abstract: A substrate device includes a layer of non-linear resistive transient protective material and a plurality of conductive elements that form part of a conductive layer. The conductive elements include a pair of electrodes that are spaced by a gap, but which electrically interconnect when the transient protective material is conductive. The substrate includes features to linearize a transient electrical path that is formed across the gap.

Abstract translation: 衬底装置包括形成导电层的一部分的非线性电阻性瞬态保护材料层和多个导电元件。 导电元件包括​​一对间隔开的电极，但当瞬态保护材料是导电的时，它们进行电互连。 衬底包括使跨越间隙形成的瞬态电路线性化的特征。

公开(公告)号：US20100071950A1

公开(公告)日：2010-03-25

申请号：US12562956

申请日：2009-09-18

Applicant: Kohichi OHSUMI

Inventor： Kohichi OHSUMI

IPC: H05K1/11 ,  H05K3/00

CPC classification number: H05K3/3452 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K3/0044 ,  H05K3/243 ,  H05K2201/094 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2201/099 ,  H05K2201/10734 ,  H05K2203/025 ,  H05K2203/0574

Abstract: A wiring board is comprised of a plurality of circular semiconductor element connection pads deposited in a lattice form onto a mounting portion of an insulation substrate, their upper surfaces being connected to electrodes of a semiconductor element, and a solder resist layer deposited onto the insulation substrate, which covers the side surfaces of these pads and exposes the upper surfaces of these pads. The solder resist layer has a concave part whose bottom surface corresponds to at least all the upper surfaces of these pads. A method of manufacturing a wiring board includes the step of forming a plurality of circular semiconductor element connection pads in a lattice form on a mounting portion of an insulation substrate; the step of depositing onto the insulation substrate a resin layer for a solder resist layer for burying these pads; and forming a solder resist layer by partially removing the resin layer, the solder resist layer covering the side surfaces of these pads and having a concave part whose bottom surface corresponds to at least all the upper surfaces of the pads.

Abstract translation: 布线板由以晶格形式沉积到绝缘基板的安装部分上的多个圆形半导体元件连接焊盘构成，其上表面连接到半导体元件的电极，以及沉积在绝缘基板上的阻焊层 ，其覆盖这些焊盘的侧表面并且暴露这些焊盘的上表面。 阻焊层具有凹部，其底表面至少对应于这些焊盘的所有上表面。 制造布线板的方法包括以下步骤：在绝缘基板的安装部分上形成格子状的多个圆形半导体元件连接焊盘; 在绝缘基板上沉积用于掩埋这些焊盘的阻焊层的树脂层的步骤; 以及通过部分地除去树脂层而形成阻焊层，所述阻焊层覆盖这些焊盘的侧表面，并且具有其底表面至少对应于焊盘的所有上表面的凹部。

公开(公告)号：US20100021627A1

公开(公告)日：2010-01-28

申请号：US12574287

申请日：2009-10-06

Applicant: Michimasa Takahashi ,  Yukinobu Mikado ,  Hiroyuki Yanagisawa

Inventor： Michimasa Takahashi ,  Yukinobu Mikado ,  Hiroyuki Yanagisawa

IPC: B05D5/12

CPC classification number: H05K1/167 ,  H05K3/205 ,  H05K3/4644 ,  H05K2201/0376 ,  H05K2201/09736 ,  H05K2203/1453

Abstract: A manufacturing method of a printed wiring board, including forming a plurality of electrodes on a conductive layer formed on a substrate by a plating method, forming an insulation layer on the electrodes and the conductive layer, removing the substrate from the conductive layer, patterning the conductive layer except for a resistor forming region reserved for forming a resistor, thereby forming an external connection conductive pattern, and forming a resistor in the resistor forming region such that the resistor is separated by a space from the external connection conductive pattern.

Abstract translation: 一种印刷电路板的制造方法，其特征在于，在电镀形成于基板上的导电层上形成多个电极，在所述电极和所述导电层上形成绝缘层，从所述导电层除去所述基板， 导电层除了保留用于形成电阻器的电阻器形成区域，从而形成外部连接导电图案，并且在电阻器形成区域中形成电阻器，使得电阻器与外部连接导电图案间隔开。

公开(公告)号：US07638872B2

公开(公告)日：2009-12-29

申请号：US11595082

申请日：2006-11-09

Applicant: Christian Goebl ,  Karlheinz Augustin

Inventor： Christian Goebl ,  Karlheinz Augustin

IPC: H01L23/48

CPC classification number: H05K3/4007 ,  H01L23/49833 ,  H01L23/4985 ,  H01L23/5385 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L25/072 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/19107 ,  H01L2924/20757 ,  H05K1/0265 ,  H05K1/0393 ,  H05K1/09 ,  H05K3/4046 ,  H05K2201/0352 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/10166 ,  H05K2203/049 ,  H01L2924/00

Abstract: A power semiconductor module is presented. The power semiconductor module has a substrate, a composite film, and a power semiconductor component between the substrate and the composite film. The composite film has a thin circuit-structured logic metal layer and a thick circuit-structured power metal layer and between them a thin electrically insulating plastic film. The composite film includes contact nubs, which provide bonding to the power semiconductor component. Feedthrough holes are provided between the logic metal layer and the power metal layer. The plastic film in the region of the respective through-plated hole includes a recess in a region that is free of the logic metal layer. A segment of a flexible thin wire extends through the free region of the logic metal layer and through the recess in the plastic film and is bonded to the logic metal layer and the power metal layer by means of bonding sites.

Abstract translation: 介绍了功率半导体模块。 功率半导体模块在基板和复合膜之间具有基板，复合膜和功率半导体部件。 复合膜具有薄的电路结构的逻辑金属层和厚电路结构的功率金属层，并且在它们之间是薄的电绝缘塑料膜。 复合膜包括提供与功率半导体部件的接合的接触凸块。 在逻辑金属层和功率金属层之间提供穿通孔。 在相应的通孔的区域中的塑料膜包括在没有逻辑金属层的区域中的凹部。 柔性细线的一段延伸穿过逻辑金属层的自由区域并穿过塑料膜中的凹槽，并通过结合位点结合到逻辑金属层和功率金属层。

公开(公告)号：US20090289030A1

公开(公告)日：2009-11-26

申请号：US12396790

申请日：2009-03-03

Applicant: Yukihiro UENO

Inventor： Yukihiro UENO

IPC: H01B13/00

CPC classification number: H05K3/0035 ,  H05K1/116 ,  H05K3/061 ,  H05K3/184 ,  H05K3/421 ,  H05K3/427 ,  H05K3/4661 ,  H05K2201/09736 ,  H05K2203/0554

Abstract: A method of fabricating a printed wiring board that is capable of forming a minute via hole with high accuracy is provided. This method of fabricating a printed wiring board 1 comprises: a step of forming an insulation resin layer on at least one surface side of a core wiring board; a step of forming a first resist layer on a predetermined region of a surface of the insulation resin layer; a step of forming a first metal layer with a plating method on a region of the surface of the insulation resin layer except the region where the first resist layer is formed; and a step of forming a via hole by laser machining using the first metal layer as a mask.

Abstract translation: 提供一种制造能够高精度地形成微通孔的印刷电路板的方法。 制造印刷电路板1的方法包括：在芯线基板的至少一个表面侧上形成绝缘树脂层的步骤; 在所述绝缘树脂层的表面的规定区域形成第一抗蚀剂层的工序; 在除了形成第一抗蚀剂层的区域之外的绝缘树脂层的表面的区域上形成具有镀覆方法的第一金属层的步骤; 以及通过使用第一金属层作为掩模的激光加工形成通孔的步骤。

公开(公告)号：US20090288872A1

公开(公告)日：2009-11-26

申请号：US12219078

申请日：2008-07-15

Applicant: Han Kim ,  Mi Sun Hwang ,  Suk Won Lee ,  Chang Gun Oh

Inventor： Han Kim ,  Mi Sun Hwang ,  Suk Won Lee ,  Chang Gun Oh

IPC: H05K1/02 ,  H05K3/36

CPC classification number: H05K3/462 ,  H05K1/0265 ,  H05K1/0366 ,  H05K3/025 ,  H05K3/108 ,  H05K3/4623 ,  H05K2201/0352 ,  H05K2201/0394 ,  H05K2201/09527 ,  H05K2201/09545 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09736 ,  Y10T29/49126 ,  Y10T29/49165

Abstract: Disclosed herein is a printed circuit board including an outmost fine circuit pattern. In the board, an end of a via, which has the minimum diameter, is connected to the outmost circuit layer of a substrate. The end surface, having the minimum diameter, is positioned at the outmost layer, so that the outmost circuit layer of the substrate, which needs to have a relatively high density in order to mount chips, compared to other circuit layers, can be more finely formed.

Abstract translation: 这里公开了包括最外部的精细电路图案的印刷电路板。 在板中，具有最小直径的通孔的端部连接到基板的最外层电路层。 具有最小直径的端面位于最外层，使得与其它电路层相比，为了安装芯片而需要具有相对较高密度的衬底的最外层电路层可以更细 形成。

公开(公告)号：US20090266588A1

公开(公告)日：2009-10-29

申请号：US12488299

申请日：2009-06-19

Applicant: Yasushi Inagaki ,  Katsuyuki Sano

Inventor： Yasushi Inagaki ,  Katsuyuki Sano

IPC: H05K1/03 ,  H05K1/16 ,  H05K1/11

CPC classification number: H05K1/0237 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5383 ,  H01L23/66 ,  H01L24/81 ,  H01L2223/6616 ,  H01L2223/6622 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/0224 ,  H05K1/0263 ,  H05K1/0265 ,  H05K1/111 ,  H05K1/115 ,  H05K1/144 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/0352 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09736 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A multilayer printed wiring board has a core substrate, an interlayer insulation layer formed over the core substrate, conductive layers formed over the core substrate, and a via hole for providing electrical connection between the conductive layers. The conductive layers include a conductive layer formed on the core substrate, and the conductive layer formed on the core substrate has a side face in a form of rounded taper tapering toward the core substrate.

Abstract translation: 多层印刷电路板具有芯基板，在芯基板上形成的层间绝缘层，形成在芯基板上的导电层，以及用于在导电层之间提供电连接的通孔。 导电层包括形成在芯基板上的导电层，并且形成在芯基板上的导电层具有朝向芯基板渐缩的圆锥形的侧面。