公开(公告)号：US20060131730A1

公开(公告)日：2006-06-22

申请号：US11304868

申请日：2005-12-14

Applicant: Junichi Nakamura

Inventor： Junichi Nakamura

IPC: H01L23/12

CPC classification number: H05K3/4007 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15159 ,  H05K3/205 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2201/09045 ,  H05K2201/09481 ,  H05K2203/1536 ,  H01L2224/05552

Abstract: A semiconductor package and a fabrication method thereof are disclosed, whereby an environmental problem is solved by using external connection terminals or semiconductor element-mounting terminals containing a smaller amount of lead, while at the same time achieving a fine pitch of the terminals. The semiconductor package includes a board (20) including a plurality of insulating resin layers, semiconductor element-mounting terminals (18) formed on the uppermost surface of the board, and external connection terminals (12) formed on the bottom surface thereof. Each external connection terminal (12) is formed as a bump projected downward from the bottom surface of the package, and each bump is filled with the insulating resin (14) while the surface thereof is covered by a metal (16). Wiring (24), (26) including a conductor via (26a) electrically connect the metal of the metal layer 16 and the semiconductor element-mounting terminals (18).

Abstract translation: 公开了一种半导体封装及其制造方法，通过使用包含较少量的引线的外部连接端子或半导体元件安装端子，同时实现端子的精细间距来解决环境问题。 半导体封装包括：多个绝缘树脂层的基板（20），形成在基板的最上表面上的半导体元件安装端子（18）和形成在其底面上的外部连接端子（12）。 每个外部连接端子（12）形成为从封装的底表面向下突出的凸起，并且每个凸起都填充有绝缘树脂（14），同时其表面被金属（16）覆盖。 包括导体通孔（26a）的布线（24），（26）将金属层16的金属与半导体元件安装端子（18）电连接。

公开(公告)号：US07018705B2

公开(公告)日：2006-03-28

申请号：US10842900

申请日：2004-05-10

Applicant: Yasuhiro Nakatani ,  Hideki Higashitani ,  Tadashi Nakamura ,  Fumio Echigo

Inventor： Yasuhiro Nakatani ,  Hideki Higashitani ,  Tadashi Nakamura ,  Fumio Echigo

IPC: B32B3/00 ,  H01R9/09

CPC classification number: H05K3/4614 ,  H05K1/113 ,  H05K3/4069 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/09045 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/068 ,  H05K2203/1461 ,  Y10S428/901 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T428/24917

Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.

公开(公告)号：US07001658B2

公开(公告)日：2006-02-21

申请号：US10424666

申请日：2003-04-28

Applicant: Robert P. Bourdelais ,  Cheryl J. Kaminsky ,  John M. Pochan ,  James F. Elman

Inventor： Robert P. Bourdelais ,  Cheryl J. Kaminsky ,  John M. Pochan ,  James F. Elman

IPC: B32B3/20 ,  H01B13/00 ,  H02G3/04

CPC classification number: H05K3/107 ,  H05K2201/0129 ,  H05K2201/0329 ,  H05K2201/09045 ,  H05K2201/091 ,  H05K2203/0108 ,  H05K2203/0143 ,  Y10T428/24174 ,  Y10T428/24744

Abstract: Disclosed is an article comprising first areas of electrically conductive material and second areas of electrically conductive material raised relative to the first areas and substantially electrically isolated from the first areas, said conductive materials exhibiting a resistivity that averages less than 800 ohm/square.

Abstract translation: 公开了一种物品，其包括导电材料的第一区域和相对于第一区域凸起的第二导电材料区域，并且与第一区域基本上电隔离，所述导电材料具有平均小于800欧姆/平方的电阻率。

公开(公告)号：US06964749B2

公开(公告)日：2005-11-15

申请号：US10162027

申请日：2002-06-04

Applicant: Jerry Zucker ,  Nick Mark Carter

Inventor： Jerry Zucker ,  Nick Mark Carter

IPC: C08J5/04 ,  B29B15/12 ,  B29C70/12 ,  B29C70/16 ,  B29C70/36 ,  B29C70/50 ,  B32B5/24 ,  D04H1/46 ,  D04H1/48 ,  D04H3/10 ,  D04H5/02 ,  D04H13/00 ,  H05K1/00 ,  H05K1/02 ,  H05K1/03 ,  H05K3/00 ,  H05K3/10 ,  B32B27/04

CPC classification number: H05K1/0366 ,  B29C70/12 ,  B29C70/16 ,  B29C70/50 ,  B29L2031/3425 ,  D04H1/48 ,  D04H1/49 ,  D04H1/495 ,  D04H3/11 ,  D04H5/02 ,  D04H5/03 ,  H05K1/0254 ,  H05K1/0271 ,  H05K1/0272 ,  H05K1/0393 ,  H05K3/0052 ,  H05K3/107 ,  H05K2201/0129 ,  H05K2201/0278 ,  H05K2201/0284 ,  H05K2201/0293 ,  H05K2201/09045 ,  H05K2201/09127 ,  H05K2201/2009 ,  H05K2201/2036 ,  H05K2203/065 ,  Y10T442/259 ,  Y10T442/689

Abstract: The present invention relates to a nonwoven substrate, and specifically to a nonwoven substrate imparted with a three-dimensional image, wherein the three-dimensional nonwoven substrate is particularly suited as a support substrate for a PCB (Printed Circuit Board) and similar application.By the utilization of a hydroentangled, three-dimensionally imaged support substrate impregnated with a durable resinous matrix, PCB's, and similar applications, can be imparted with unique and useful performance properties, to improve structural performance.

Abstract translation: 本发明涉及非织造基材，特别涉及赋予三维图像的非织造基材，其中三维非织造基材特别适用于PCB（印刷电路板）的支撑基板和类似应用。 通过利用浸渍有耐用的树脂基质，PCB和类似应用的水刺，三维成像的支撑基底，可以赋予独特且有用的性能特性，以改善结构性能。

公开(公告)号：US20050151269A1

公开(公告)日：2005-07-14

申请号：US11012294

申请日：2004-12-16

Applicant: Hoon Song ,  Dong-sik Shim

Inventor： Hoon Song ,  Dong-sik Shim

IPC: H01L21/60 ,  H01L23/13 ,  H01L23/485 ,  H01L29/06 ,  H05K1/11 ,  H05K3/34 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/13 ,  H01L23/13 ,  H01L24/03 ,  H01L24/05 ,  H01L24/16 ,  H01L24/81 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/05551 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05578 ,  H01L2224/05599 ,  H01L2224/10145 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/81365 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10157 ,  H01L2924/15151 ,  H01L2924/15787 ,  H01L2924/381 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A flip-chip package for implementing a fine solder ball, and a flip-chip packaging method using the same. The flip-chip package includes a first wafer having a first electrode and a first under bump metal (UBM) formed on the first electrode and electrically connected to the first electrode; and second wafer opposing the first wafer and having a second electrode located in a position corresponding to the first electrode, and a second UBM formed on the second electrode and electrically connected to the second electrode. The first wafer has a depression formed on one or more areas adjacent to the first UBM, which depression partly receives a solder ball that connects the first and the second UBMs upon flip-chip bonding of the first and second wafers. Since the UBM is formed as an embossing pattern, a fine solder ball can be implemented. Additionally, the reliability of the package can be improved.

Abstract translation: 一种用于实现精细焊球的倒装芯片封装以及使用其的倒装芯片封装方法。 倒装芯片封装包括具有形成在第一电极上并电连接到第一电极的第一电极和第一下凸块金属（UBM）的第一晶片; 以及与所述第一晶片相对并且具有位于对应于所述第一电极的位置的第二电极的第二晶片，以及形成在所述第二电极上并电连接到所述第二电极的第二UBM。 第一晶片具有形成在与第一UBM相邻的一个或多个区域上的凹陷部，该凹陷部分地接收在第一和第二晶片倒装芯片接合时连接第一和第二UBM的焊球。 由于UBM形成为压花图案，因此可以实现精细的焊球。 此外，可以提高包装的可靠性。

公开(公告)号：US06899025B2

公开(公告)日：2005-05-31

申请号：US10784692

申请日：2004-02-23

Applicant: John M. Michiels ,  Darryl M. Stansbury

Inventor： John M. Michiels ,  Darryl M. Stansbury

IPC: B41M1/12 ,  B41M1/34 ,  B41M3/00 ,  H01C1/00 ,  H01J9/02 ,  H05K1/09 ,  H05K1/18 ,  H05K3/12 ,  H05K3/24 ,  H05K3/46

CPC classification number: B41M1/12 ,  B41M1/34 ,  B41M3/006 ,  H01J29/92 ,  H01L51/0004 ,  H05K1/092 ,  H05K1/181 ,  H05K3/1233 ,  H05K3/248 ,  H05K3/4664 ,  H05K2201/035 ,  H05K2201/09045 ,  H05K2201/09981 ,  H05K2203/0264

Abstract: Method for screen printing a continuous structure on a substrate wherein the screen printed structure extends from at least a first level to at least a second level. The disclosed method is particularly suitable for the fabrication of microelectronic devices and components thereof including the fabrication of field emission display devices. Preferably, a print screen of a preferred thickness having a preconfigured print pattern formed therethrough, in combination with a squeegee having a hardness within a preferred range, are used to force a screen printable substance onto a substrate while maintaining a portion of the print screen within a preferred reference angle. The resulting screen printed structure extends from at least one lower level to at least one upper level in a continuous “uphill” manner.

公开(公告)号：US06856017B2

公开(公告)日：2005-02-15

申请号：US09442038

申请日：1999-11-17

Applicant: Yoshiyuki Yoneda ,  Kazuto Tsuji ,  Seiichi Orimo ,  Hideharu Sakoda ,  Ryuji Nomoto ,  Masanori Onodera ,  Junichi Kasai

Inventor： Yoshiyuki Yoneda ,  Kazuto Tsuji ,  Seiichi Orimo ,  Hideharu Sakoda ,  Ryuji Nomoto ,  Masanori Onodera ,  Junichi Kasai

IPC: H01L21/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/68 ,  H01L21/683 ,  H01L23/31 ,  H01L25/10 ,  H01L29/06 ,  H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H01L23/04

CPC classification number: H01L21/4832 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/67138 ,  H01L21/6833 ,  H01L23/3107 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L24/97 ,  H01L25/105 ,  H01L29/0657 ,  H01L2224/05554 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/4848 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/7865 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85664 ,  H01L2224/85986 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/3011 ,  H05K1/181 ,  H05K3/303 ,  H05K3/305 ,  H05K3/3436 ,  H05K3/3442 ,  H05K2201/09045 ,  H05K2201/10727 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.

Abstract translation: 一种包括芯片的装置和密封芯片的树脂封装，树脂封装具有位于树脂封装的安装侧表面上的树脂突起。 金属膜分别设置在树脂突起上。 连接部件电连接芯片的电极焊盘和金属膜。

公开(公告)号：US20040251527A1

公开(公告)日：2004-12-16

申请号：US10489592

申请日：2004-03-15

Inventor： Jozef Van Puymbroeck ,  Marcel Heerman

IPC: H01L023/02

CPC classification number: H01L23/13 ,  H01L2924/0002 ,  H05K1/119 ,  H05K3/3436 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2203/046 ,  Y02P70/613 ,  H01L2924/00

Abstract: The invention relates to an intermediate support for electronic components, for example a semiconductor, comprising a plastic substrate with contact bumps (2) in one-piece, covered with a metallic layer, which is electrically connected to at least one conducting path of said substrate (1). Said contact bumps (2) each comprise a well wettable path, extending from the tips to the base thereof and each leading to the corresponding contact bump (2) base in a solder receiving region with suction (11). Therefore, by soldering said contact bumps, excess solder can be sucked off, such that short circuits can be avoided even without the use of a solder resist. By solder contacting said intermediate support, the solder can thus be applied over a large surface on a circuit support and sucked off the cavities between the contact points by reflow soldering.

Abstract translation: 本发明涉及一种用于电子部件（例如半导体）的中间支撑件，其包括具有接触凸块（2）的塑料基板，该接触凸块一体成型，覆盖有金属层，该金属层电连接到所述基板的至少一个导电路径 （1）。 所述接触凸块（2）各自包括良好的可润湿路径，其从尖端延伸到其底部，并且每个通过吸力（11）引导到具有焊料接收区域的相应的接触凸块（2）的底部。 因此，通过焊接所述接触凸块，可以吸收多余的焊料，从而即使不使用阻焊剂也可以避免短路。 通过焊接接触所述中间支撑件，焊料可以被施加在电路支架上的大表面上，并通过回流焊接吸出接触点之间的空腔。

公开(公告)号：US20040219719A1

公开(公告)日：2004-11-04

申请号：US10856777

申请日：2004-06-01

Applicant: Fujitsu Limited

Inventor： Yoshiyuki Yoneda ,  Kazuto Tsuji ,  Seiichi Orimo ,  Hideharu Sakoda ,  Ryuji Nomoto ,  Masanori Onodera ,  Junichi Kasai

IPC: H01L021/44

CPC classification number: H01L21/4832 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/67138 ,  H01L21/6833 ,  H01L23/3107 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L24/97 ,  H01L25/105 ,  H01L29/0657 ,  H01L2224/05554 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/4848 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/7865 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85664 ,  H01L2224/85986 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/3011 ,  H05K1/181 ,  H05K3/303 ,  H05K3/305 ,  H05K3/3436 ,  H05K3/3442 ,  H05K2201/09045 ,  H05K2201/10727 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.

Abstract translation: 一种包括芯片的装置和密封芯片的树脂封装，树脂封装具有位于树脂封装的安装侧表面上的树脂突起。 金属膜分别设置在树脂突起上。 连接部件电连接芯片的电极焊盘和金属膜。

公开(公告)号：US06736058B2

公开(公告)日：2004-05-18

申请号：US10152257

申请日：2002-05-21

Applicant: John M. Michiels ,  Darryl M. Stansbury

Inventor： John M. Michiels ,  Darryl M. Stansbury

IPC: B41M112

CPC classification number: B41M1/12 ,  B41M1/34 ,  B41M3/006 ,  H01J29/92 ,  H01L51/0004 ,  H05K1/092 ,  H05K1/181 ,  H05K3/1233 ,  H05K3/248 ,  H05K3/4664 ,  H05K2201/035 ,  H05K2201/09045 ,  H05K2201/09981 ,  H05K2203/0264

Abstract: Method for screen printing a continuous structure on a substrate wherein the screen printed structure extends from at least a first level to at least a second level. The disclosed method is particularly suitable for the fabrication of microelectronic devices and components thereof including the fabrication of field emission display devices. Preferably, a print screen of a preferred thickness having a preconfigured print pattern formed therethrough, in combination with a squeegee having a hardness within a preferred range, are used to force a screen printable substance onto a substrate while maintaining a portion of the print screen within a preferred reference angle. The resulting screen printed structure extends from at least one lower level to at least one upper level in a continuous “uphill” manner. The disclosed method is particularly suitable for forming continuous electrically conductive structures or circuit traces extending from a lower level of a substrate, such as an anode plate of an FED device, up onto at least one second surface vertically distanced from the substrate. The electrically conductive structure may optionally terminate into a specifically configured contact pad for accommodating complementary contacting structures located on a mating component, such as a cathode plate of an FED device.

Abstract translation: 在基板上丝网印刷连续结构的方法，其中丝网印刷结构从至少第一层延伸到至少第二层。 所公开的方法特别适用于制造微电子器件及其组件，包括制造场致发射显示器件。 优选地，使用具有通过其形成的预配置印刷图案的优选厚度的印刷丝网与具有优选范围内的硬度的刮板组合，以将丝网印刷物质强制在基材上，同时将印刷丝网的一部分保持在 优选的参考角度。 所得到的丝网印刷结构以连续的“上坡”方式从至少一个下层延伸到至少一个上层。 所公开的方法特别适用于形成从底层（例如FED装置的阳极板）的下层延伸到连续离开衬底的至少一个第二表面上的连续导电结构或电路迹线。 导电结构可以可选地端接到具体配置的接触焊盘中，用于容纳位于配合部件（例如FED装置的阴极板）上的互补接触结构。