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    SINTERED AND NANOPORE ELECTRIC CAPACITOR, ELECTROCHEMICAL CAPACITOR AND BATTERY AND METHOD OF MAKING THE SAME
    72.
    发明申请
    SINTERED AND NANOPORE ELECTRIC CAPACITOR, ELECTROCHEMICAL CAPACITOR AND BATTERY AND METHOD OF MAKING THE SAME 审中-公开
    烧结和纳米电气电容器，电化学电容器和电池及其制造方法

    公开(公告)号：US20110310530A1

    公开(公告)日：2011-12-22

    申请号：US13148918

    申请日：2010-02-11

    Applicant: Herzel Laor

    Inventor： Herzel Laor

    IPC: H01G4/06 ,  H05K13/00

    CPC classification number: B01J37/0238 ,  B01J23/40 ,  H01G4/33 ,  H01G9/0032 ,  H01G9/07 ,  H01G9/15 ,  H01M4/0428 ,  H01M4/64 ,  H05K1/092 ,  H05K1/162 ,  H05K2201/0116 ,  H05K2201/0179 ,  H05K2201/09763 ,  H05K2203/1131 ,  Y10T29/49002

    Abstract: The present invention relates generally to the field of sequential surface chemistry. More specifically, it relates to products and methods for manufacturing products using Atomic Layer Deposition (“ALD”) to depose one or more materials onto a surface. ALD has the capability for high-quality defect free film deposition with few molecular layers. The present invention includes, in varying embodiments, methods of manufacturing electric components such as batteries, capacitors and electrochemical capacitors by ALD, and the products manufactured by those methods.

    Abstract translation: 本发明一般涉及顺序表面化学领域。 更具体地说，本发明涉及使用原子层沉积（“ALD”）制造产品以将一种或多种材料沉积到表面上的产品和方法。 ALD具有几乎没有分子层的高质量无缺陷膜沉积的能力。 本发明在不同的实施例中包括通过ALD制造诸如电池，电容器和电化学电容器的电气部件的方法，以及由这些方法制造的产品。

    Enhanced localized distributive capacitance for circuit boards
    73.
    发明授权
    Enhanced localized distributive capacitance for circuit boards 有权
    增强电路板的局部分配电容

    公开(公告)号：US08059423B2

    公开(公告)日：2011-11-15

    申请号：US11672035

    申请日：2007-02-06

    Applicant: Nicholas Biunno

    Inventor： Nicholas Biunno

    IPC: H05K1/18

    CPC classification number: H05K1/162 ,  H05K2201/09309 ,  H05K2201/09763 ,  H05K2201/10689 ,  H05K2201/10734 ,  Y10T29/4913

    Abstract: A multi-layered circuit board is provided having a buried capacitive layer and a device-specific embedded, localized, non-discrete, and distributive capacitive element. A printed circuit board is provided including (1) a first dielectric layer, (2) a first conductive layer coupled to a first surface of the first dielectric layer, (3) a second conductive layer coupled to a second surface of the first dielectric layer, and (4) a localized distributive non-discrete capacitive element adjacent the first conductive layer, wherein the capacitive element occupies a region that approximately coincides with a location over which a device to be coupled to the capacitive element is to be mounted. The embedded, localized, non-discrete, and distributive capacitive element may provide device-specific capacitance to suppress voltage/current noise for a particular device.

    Abstract translation: 提供了一种多层电路板，其具有埋入的电容层和特定于器件的嵌入式，局部的，非分立的和分布的电容元件。 提供了一种印刷电路板，包括：（1）第一介电层，（2）耦合到第一介电层的第一表面的第一导电层，（3）耦合到第一介电层的第二表面的第二导电层 和（4）与第一导电层相邻的局部分布非离散电容元件，其中电容元件占据与要耦合到电容元件的器件将被安装的位置大致重合的区域。 嵌入的，局部的，非离散的和分布的电容元件可以提供器件专用电容来抑制特定器件的电压/电流噪声。

    ELECTRONIC CIRCUIT
    75.
    发明申请
    ELECTRONIC CIRCUIT 有权
    电子电路

    公开(公告)号：US20110115101A1

    公开(公告)日：2011-05-19

    申请号：US12994170

    申请日：2009-05-29

    Applicant: Alexander Knobloch ,  Walter Fix

    Inventor： Alexander Knobloch ,  Walter Fix

    IPC: H01L23/28

    CPC classification number: H01L27/283 ,  H01L51/0018 ,  H05K1/0393 ,  H05K1/16 ,  H05K1/162 ,  H05K3/28 ,  H05K2201/09763 ,  H05K2201/09909

    Abstract: An electronic circuit includes at least two organic components interconnected by conductor tracks and having a common carrier substrate. The components and the conductor tracks are formed from layer portions. An uppermost layer portion, remote from the carrier substrate, of the electronic circuit is of a patterned configuration comprising an electrically conducting material. The patterned uppermost layer portion on its side remote from the carrier substrate is provided with at least one protective layer arranged in congruent relationship with the uppermost layer portion. The at least two organic components include at least one first component of a first component type and at least one second component of a second component type different therefrom. Components of the same component type are respectively protected by a protective layer of the same composition and/or the same structure corresponding to that component type and differing from one another according to the corresponding component type.

    Abstract translation: 电子电路包括至少两个由导体轨道互连并具有公共载体衬底的有机部件。 部件和导体轨道由层部分形成。 远离电子电路的载体衬底的最上层部分是包括导电材料的图案化构造。 远离载体基板的图案化的最上层部分设置有与最上层部分一致布置的至少一个保护层。 所述至少两种有机组分包括至少一种第一组分类型的第一组分和与其不同的第二组分类型的至少一种第二组分。 相同组件类型的组件分别由与该组件类型对应的相同组成和/或相同结构的保护层保护，并且根据相应的组件类型彼此不同。

    PACKAGE SUBSTRATE HAVING EMBEDDED CAPACITOR
    77.
    发明申请
    PACKAGE SUBSTRATE HAVING EMBEDDED CAPACITOR 审中-公开
    具有嵌入式电容器的封装衬底

    公开(公告)号：US20100319973A1

    公开(公告)日：2010-12-23

    申请号：US12851803

    申请日：2010-08-06

    Applicant: Chih-Peng Fan

    Inventor： Chih-Peng Fan

    IPC: H05K1/16

    CPC classification number: H05K1/162 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4644 ,  H05K2201/0355 ,  H05K2201/09536 ,  H05K2201/09763

    Abstract: A package substrate having embedded capacitor is provided. The package substrate includes a first core circuit board, at least one embedded capacitor, a second core circuit board and a dielectric layer. The first core circuit board has at least one metal layer, and the first core circuit board has at least one first conductive through hole connected to the metal layer. At least one embedded capacitor is embedded in the first core circuit board and connected to the metal layer. The second core circuit board has at least one wiring layer, and the second core circuit board has at least one second conductive through hole connected to the wiring layer. The dielectric layer is laminated between the first core circuit board and the second core circuit board.

    Abstract translation: 提供具有嵌入式电容器的封装基板。 封装衬底包括第一核心电路板，至少一个嵌入式电容器，第二核心电路板和电介质层。 第一核心电路板具有至少一个金属层，并且第一核心电路板具有连接到金属层的至少一个第一导电通孔。 至少一个嵌入式电容器被嵌入在第一核心电路板中并连接到金属层。 第二核心电路板具有至少一个布线层，并且第二核心电路板具有连接到布线层的至少一个第二导电通孔。 电介质层层压在第一芯电路板和第二芯电路板之间。

    Power core devices
    79.
    发明授权
    Power core devices 有权
    电源核心器件

    公开(公告)号：US07701052B2

    公开(公告)日：2010-04-20

    申请号：US11514094

    申请日：2006-08-31

    Applicant: William J. Borland ,  Saul Ferguson

    Inventor： William J. Borland ,  Saul Ferguson

    IPC: H01L23/538 ,  H01L23/12 ,  H01L23/053

    CPC classification number: H01L23/50 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/113 ,  H05K1/162 ,  H05K2201/09309 ,  H05K2201/09763 ,  H05K2201/10734

    Abstract: A device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor wherein said embedded singulated capacitor comprises at least a first electrode and a second electrode and wherein said embedded singulated capacitor is positioned on the outer layer of the power core with both first and second electrodes of the capacitor on the outer layer of the power core so that at least one Vcc (power) terminal and at least one Vss (ground) terminal of a semiconductor device can be directly connected to at least one first and at least one second electrode, respectively.

    Abstract translation: 一种包括功率核心的器件，其中所述功率核心包括：至少一个嵌入的单个电容器层，其包含至少一个嵌入的单个电容器，其中所述嵌入式单电容器包括至少第一电极和第二电极，并且其中所述嵌入式单个电容器位于 功率核心的外层，电源芯的外层上的电容器的第一和第二电极都具有电源核心的外层，使得半导体器件的至少一个Vcc（功率）端子和至少一个Vss（接地）端子可以直接 分别连接到至少一个第一和至少一个第二电极。

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