公开(公告)号：US20100175250A1

公开(公告)日：2010-07-15

申请号：US12659712

申请日：2010-03-18

Applicant: Hiroki Kamiya ,  Motoki Shimizu ,  Satoshi Takeuchi

Inventor： Hiroki Kamiya ,  Motoki Shimizu ,  Satoshi Takeuchi

IPC: H05K3/10

CPC classification number: H05K1/186 ,  H05K1/183 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/4632 ,  H05K2201/0129 ,  H05K2201/091 ,  H05K2201/09781 ,  H05K2201/09909 ,  H05K2201/1059 ,  H05K2201/10636 ,  H05K2201/2036 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: A multilayer substrate includes an insulating base member having a plurality of resin films, an electric element embedded in the insulating base member, and a spacer. The resin films are made of a thermoplastic resin and stacked and attached to each other. At least one resin film has a through hole for inserting the electric element. The one resin film further has a plurality of protruding members. One protruding member opposes to another one protruding member so that the one and the another one contact and sandwich the electric element. The spacer is arranged between the one resin film and an adjacent resin film and is disposed at a base portion of one of the protruding members.

公开(公告)号：US07754599B2

公开(公告)日：2010-07-13

申请号：US12379223

申请日：2009-02-17

Applicant: Yung-Yu Hsu ,  Rong-Chang Feng ,  Ra-Min Tain ,  Shyi-Ching Liau ,  Ji-Cheng Lin ,  Shan-Pu Yu ,  Shou-Lung Chen ,  Chih-Yuan Cheng

Inventor： Yung-Yu Hsu ,  Rong-Chang Feng ,  Ra-Min Tain ,  Shyi-Ching Liau ,  Ji-Cheng Lin ,  Shan-Pu Yu ,  Shou-Lung Chen ,  Chih-Yuan Cheng

IPC: H01L21/44

CPC classification number: H05K1/115 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/0271 ,  H05K3/4644 ,  H05K2201/068 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2201/09909 ,  H01L2924/00

Abstract: A structure for reducing stress for vias and a fabricating method thereof are provided. One or more wires or vias in the thickness direction are enframed with the use of a stress block in a lattice structure to be isolated from being directly contacted with the major portion of insulating materials with a high coefficient of thermal expansion. Thus, the shear stress resulting from temperature loading can be blocked or absorbed by the stress block.

Abstract translation: 提供一种用于减小通孔应力的结构及其制造方法。 使用栅格结构中的应力块与绝缘材料的主要部分直接接触，具有高的热膨胀系数，使厚度方向上的一个或多个导线或通孔被固定。 因此，由温度加载引起的剪切应力可以被应力块阻挡或吸收。

公开(公告)号：US20100142163A1

公开(公告)日：2010-06-10

申请号：US12630749

申请日：2009-12-03

Applicant: Tsunehito UEMURA ,  Hiroshi UENO

Inventor： Tsunehito UEMURA ,  Hiroshi UENO

IPC: H05K5/00

CPC classification number: H05K9/0039 ,  H05K1/02 ,  H05K7/142 ,  H05K2201/09063 ,  H05K2201/09909 ,  H05K2201/10409 ,  H05K2201/10598

Abstract: A circuit board is fixed to a housing including a boss-like fixing part by being fastened by a fixing tool. The circuit board includes a printed portion formed in a region that the circuit board contacts with the housing. The printed portion includes a lattice printed portion formed by silk screening on a periphery of a fixing hole through which the fixing tool is inserted, and a ring printed portion formed by silk screening on a periphery of the lattice printed portion. The lattice printed portion includes a non-printed region, and the ring printed portion includes no non-printed region.

Abstract translation: 电路板通过固定工具固定而固定在包括凸起状固定部分的壳体上。 电路板包括形成在电路板与壳体接触的区域中的印刷部分。 打印部分包括通过丝网印刷形成的格子印刷部分，该丝网印刷部分在固定孔的外周插入固定工具，以及环形印刷部分，其通过丝网印刷形成在格子印刷部分的周围。 格子印刷部分包括非印刷区域，并且环形印刷部分不包括非印刷区域。

公开(公告)号：US20100052825A1

公开(公告)日：2010-03-04

申请号：US12517328

申请日：2007-06-19

Applicant: Per Ligander

Inventor： Per Ligander

IPC: H01P3/16

CPC classification number: H01P5/107 ,  H01P1/207 ,  H01P11/00 ,  H05K1/0243 ,  H05K3/3452 ,  H05K2201/09072 ,  H05K2201/09909

Abstract: A surface-mountable waveguide arrangement comprising a dielectric carrier material having a first main side and a second main side, the second side comprising a ground plane, and the first side being arranged to form a microwave circuit layout by means of metallization patterns on the respective sides. The microwave circuit layout comprises a footprint for a surface-mountable waveguide part, the waveguide part comprising an open side, a part of the footprint constituting a closing wall arranged for closing the open side. The waveguide part is arranged for being mounted to a footprint solder area comprised in the footprint, having an outer contour and corresponding to a solderable contact area on the waveguide part. A solderstop line is formed on the footprint, at least partly defining a border between the closing wall and the footprint solder area. The present invention also relates to a dielectric carrier.

Abstract translation: 一种表面可安装的波导装置，包括具有第一主侧和第二主侧的电介质载体材料，第二侧包括接地平面，第一侧被布置成通过相应的金属化图案形成微波电路布局 边。 微波电路布局包括用于表面安装的波导部分的覆盖区，波导部分包括开口侧，部分占地面积构成用于封闭开放侧的封闭壁。 波导部件布置成安装到包括在占地面积中的覆盖区焊料区域，具有外轮廓并且对应于波导部件上的可焊接接触区域。 阻焊线形成在覆盖区上，至少部分地限定封闭壁和焊接区域之间的边界。 本发明还涉及电介质载体。

公开(公告)号：US20090250810A1

公开(公告)日：2009-10-08

申请号：US12412303

申请日：2009-03-26

Applicant: Rajendra D. Pendse

Inventor： Rajendra D. Pendse

IPC: H01L23/00 ,  H01L21/52 ,  H01L21/56

CPC classification number: H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2924/01027 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19105 ,  H05K1/0271 ,  H05K2201/09136 ,  H05K2201/09909 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of manufacture of an integrated circuit packaging system is provided including: providing a substrate; and placing a patterned layer over the substrate for substantially removing crying warpage from the substrate.

Abstract translation: 提供了一种制造集成电路封装系统的方法，包括：提供衬底; 并将图案化层放置在衬底上，以从衬底基本上去除哭泣翘曲。

公开(公告)号：US20090230174A1

公开(公告)日：2009-09-17

申请号：US12358152

申请日：2009-01-22

Applicant: Samuel Kim ,  Ehsan Saeedi ,  Babak Amirparviz

Inventor： Samuel Kim ,  Ehsan Saeedi ,  Babak Amirparviz

IPC: B23K31/02

CPC classification number: B23K1/0016 ,  H01L24/95 ,  H01L2224/95085 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01322 ,  H01L2924/15788 ,  H05K1/189 ,  H05K3/303 ,  H05K3/3442 ,  H05K2201/09909 ,  H05K2201/10106 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/0776 ,  H05K2203/167 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00

Abstract: A self-assembly process is disclosed for integrating free standing microcomponents onto a template having a plurality of binding sites, an interconnect network, and trapping structures disposed downstream of the binding sites. The self-assembly is accomplished by flowing a fluid medium containing the microcomponents over the template such that some of the microcomponents are trapped at binding sites. The template may be simultaneously (or subsequently) heated to melt a binder such as a solder spot at each of the binding sites, and then cooled to connect the trapped microcomponents to the interconnect network. In one embodiment, removable blocking elements are disposed upstream of some of the binding sites, for example formed from photoresist. After assembling a first set of microcomponents, the blocking elements are removed, and a second set of microcomponents in a fluid medium are flowed over the template for assembly into the newly unblocked binding sites.

Abstract translation: 公开了一种自组装过程，用于将独立的微组件整合到具有多个结合位点的模板上，互连网络和布置在结合位点下游的捕获结构。 通过将含有微量组分的流体介质流过模板来实现自组装，使得一些微组分被捕获在结合位点。 模板可以同时（或随后）加热以熔化粘合剂，例如在每个结合位点处的焊点，然后冷却以将捕获的微组件连接到互连网络。 在一个实施例中，可移除的阻挡元件设置在例如由光致抗蚀剂形成的一些结合位点的上游。 在组装第一组微组件之后，去除阻挡元件，并且将流体介质中的第二组微组件流过模板以用于组装到新的未阻塞的结合位点。

公开(公告)号：US20090077798A1

公开(公告)日：2009-03-26

申请号：US12206800

申请日：2008-09-09

Applicant: Toshimitsu HIRAI ,  Tsuyoshi SHINTATE ,  Jun YAMADA

Inventor： Toshimitsu HIRAI ,  Tsuyoshi SHINTATE ,  Jun YAMADA

IPC: H05K3/00 ,  H01R43/16

CPC classification number: H05K3/4069 ,  H05K1/092 ,  H05K3/125 ,  H05K3/4664 ,  H05K3/4679 ,  H05K2201/09909 ,  H05K2203/013 ,  H05K2203/1131 ,  H05K2203/1173 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49206

Abstract: A method for forming a conductive post include: a) forming a liquid repellent portion having a thickness of 100 nm or less by disposing a liquid repellent material in a conductive post forming region on a conductive layer; b) forming an insulation layer having an opening in a region overlapping with the conductive post forming region by disposing a liquid including an insulation layer forming material on the conductive layer having the liquid repellent portion formed thereon and polymerizing the insulation layer forming material; c) disposing metal particulates in the opening; and d) heating the metal particulates at a fusing temperature of the metal particulates or higher so as to fusion bond the metal particulates to each other in order to form the conductive post, and to fusion bond the metal particulates and the conductive layer in order to couple the conductive post with the conductive layer.

Abstract translation: 形成导电柱的方法包括：a）通过在导电层上的导电柱形成区域中设置疏液材料，形成厚度为100nm以下的疏液部分; b）通过在其上形成有疏液部分的导电层上设置包括绝缘层形成材料的液体来形成在与导电柱形成区域重叠的区域中具有开口的绝缘层，并使绝缘层形成材料聚合; c）在开口处设置金属微粒; 以及d）在所述金属微粒的熔融温度以上加热所述金属微粒以将所述金属微粒彼此熔合以形成所述导电柱，并将所述金属微粒和所述导电层熔合，以便 将导电柱与导电层耦合。

公开(公告)号：US20090050678A1

公开(公告)日：2009-02-26

申请号：US12194330

申请日：2008-08-19

Applicant: Naoyuki YAMAMOTO

Inventor： Naoyuki YAMAMOTO

IPC: B23K31/02

CPC classification number: B23K1/0016 ,  B23K3/087 ,  H05K3/303 ,  H05K3/3442 ,  H05K2201/09909 ,  H05K2201/10636 ,  H05K2201/10727 ,  H05K2201/2036 ,  Y02P70/611 ,  Y02P70/613

Abstract: When a surface-mount electronic part, which includes at least two mounting electrodes on an external underside thereof, is bonded to circuit terminals on a wiring board using solder, a protrusion, which is thicker than the circuit terminal, is provided on a surface of the wiring board facing the outer bottom surface of the electronic part to have the clearance between the mounting electrode and the circuit terminal that is not smaller than a predetermined value, so that the thickness of the solder between the mounting electrode and the circuit terminal is maintained to be large.

Abstract translation: 当在其外部的下侧包括至少两个安装电极的表面贴装电子部件使用焊料接合到布线板上的电路端子时，在电路端子的表面上设置有比电路端子厚的突起 所述布线板面向所述电子部件的所述外底面，以使得所述安装电极与所述电路端子之间的间隙不小于预定值，从而保持所述安装电极和所述电路端子之间的焊料的厚度 要大

公开(公告)号：US20090039495A1

公开(公告)日：2009-02-12

申请号：US12089059

申请日：2006-06-13

Applicant: Kenichi Yamashita ,  Yoshiki Nakatani ,  Tetsuya Aita

Inventor： Kenichi Yamashita ,  Yoshiki Nakatani ,  Tetsuya Aita

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L24/81 ,  G02F1/1345 ,  G02F2202/28 ,  H01L23/49838 ,  H01L23/5387 ,  H01L24/12 ,  H01L24/17 ,  H01L24/28 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/10135 ,  H01L2224/10155 ,  H01L2224/10165 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/26145 ,  H01L2224/26152 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/8114 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83051 ,  H01L2224/83139 ,  H01L2224/8314 ,  H01L2224/83141 ,  H01L2224/83385 ,  H01L2224/83851 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3511 ,  H05K3/303 ,  H05K3/323 ,  H05K2201/09709 ,  H05K2201/09909 ,  H05K2201/10674 ,  H05K2201/2036 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2224/2919 ,  H01L2924/00 ,  H01L2224/29099

Abstract: An active matrix substrate includes a first substrate and a driving integrated circuit chip mounted on the first substrate. A support member is provided between the active matrix substrate and the driving IC chip so as to be in contact with both the active matrix substrate and the driving IC chip.

Abstract translation: 有源矩阵基板包括安装在第一基板上的第一基板和驱动集成电路芯片。 在有源矩阵基板和驱动IC芯片之间设置有与有源矩阵基板和驱动IC芯片接触的支撑部件。

公开(公告)号：US20080285241A1

公开(公告)日：2008-11-20

申请号：US11960656

申请日：2007-12-19

Applicant: NING HOU ,  SHING-TZA LIOU

Inventor： NING HOU ,  SHING-TZA LIOU

IPC: H05K1/00 ,  H01R12/00

CPC classification number: H05K1/0281 ,  H05K2201/09263 ,  H05K2201/09781 ,  H05K2201/09909 ,  H05K2201/2009

Abstract: A flexible printed circuit board includes a flexible base, a working trace region, and at least one reinforcement trace. The working trace region and the at least one reinforcement trace are formed on the flexible base. The working trace is formed by a number of working traces. In the flexible base, the at least one reinforcement trace is disposed at a periphery of the working trace region.

Abstract translation: 柔性印刷电路板包括柔性基座，工作迹线区域和至少一个加强迹线。 工作轨迹区域和至少一个加强迹线形成在柔性基座上。 工作痕迹由多条工作痕迹组成。 在柔性基座中，至少一个加强迹线设置在工作轨迹区域的周边。