公开(公告)号：US20230361030A1

公开(公告)日：2023-11-09

申请号：US17738715

申请日：2022-05-06

Applicant: Yangtze Memory Technologies Co., Ltd.

Inventor： Yuancheng Yang ,  Dongxue Zhao ,  Tao Yang ,  Lei Liu ,  Di Wang ,  Kun Zhang ,  Wenxi Zhou ,  Zhiliang Xia ,  Zongliang Huo

IPC: H01L23/528 ,  H01L27/11578 ,  H01L27/11551

CPC classification number: H01L23/5283 ,  H01L27/11578 ,  H01L27/11551

Abstract: Embodiments of three-dimensional memory devices and fabricating methods thereof are disclosed. One disclosed method for forming a memory structure comprises: forming a bottom conductive layer on a substrate; forming a memory stack on the bottom conductive layer, the memory stack comprising a plurality of alternatively arranged dielectric layers and conductive layers; forming an opening penetrating the memory stack and exposing the bottom conductive layer; forming a cap layer on a bottom of the opening; forming a cylindrical body and a top contact on the cap layer and in the opening; and forming a plurality of interconnection structures to electrically connect the bottom conductive layer, the plurality of conductive layers of the memory stack, and the top contact.

公开(公告)号：US11751394B2

公开(公告)日：2023-09-05

申请号：US17544814

申请日：2021-12-07

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Linchun Wu ,  Shan Li ,  Zhiliang Xia ,  Kun Zhang ,  Wenxi Zhou ,  Zongliang Huo

IPC: H10B43/27 ,  H01L21/8234 ,  H01L29/417

CPC classification number: H10B43/27 ,  H01L21/823487 ,  H01L29/41741

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a doped region of a substrate. The doped region includes dopants of a first type. The 3D memory device also includes a semiconductor layer on the doped region. The semiconductor layer includes dopants of a second type. The first type and the second type are different from each other. The 3D memory device also includes a memory stack having interleaved conductive layers and dielectric layers on the semiconductor layer. The 3D memory device further includes a channel structure extending vertically through the memory stack and the semiconductor layer into the doped region, a semiconductor plug extending vertically into the doped region, the semiconductor plug comprising dopants of the second type, and a source contact structure extending vertically through the memory stack to be in contact with the semiconductor plug.

公开(公告)号：US11695000B2

公开(公告)日：2023-07-04

申请号：US17461280

申请日：2021-08-30

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Kun Zhang

IPC: H01L25/18 ,  G11C16/14 ,  G11C16/04 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L25/18 ,  G11C16/0483 ,  G11C16/14 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/50 ,  H10B41/27 ,  H10B43/27 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: In certain aspects, a three-dimensional (3D) memory device includes a memory stack including interleaved conductive layers and dielectric layers, a plurality of channel structures each extending vertically through the memory stack, a conductive layer in contact with source ends of the plurality of channel structures, a first source contact electrically connected to the channel structures, and a second source contact electrically connected to the channel structures.

公开(公告)号：US20230209828A1

公开(公告)日：2023-06-29

申请号：US18118006

申请日：2023-03-06

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Kun Zhang ,  Wenxi Zhou ,  Zhiliang Xia ,  Zongliang Huo

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/30 ,  H10B41/35 ,  H10B41/40 ,  H10B43/30 ,  H10B43/35 ,  H10B43/40

CPC classification number: H10B43/27 ,  H10B41/27 ,  H10B41/30 ,  H10B41/35 ,  H10B41/40 ,  H10B43/30 ,  H10B43/35 ,  H10B43/40

Abstract: Embodiments of three-dimensional (3D) memory devices and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device comprises forming a channel structure extending vertically through a memory stack into a semiconductor layer on a substrate. The memory stack comprises interleaved stack conductive layers and stack dielectric layers. The method further comprises forming an insulating structure in an opening extending vertically through the memory stack and at a distance away from the channel structure, and comprising a dielectric layer doped with at least one of hydrogen or an isotope of hydrogen.

公开(公告)号：US20230115194A1

公开(公告)日：2023-04-13

申请号：US18081172

申请日：2022-12-14

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Kun Zhang ,  Wenxi Zhou ,  Zhiliang Xia ,  Zongliang Huo

IPC: H01L29/76

Abstract: A three-dimensional (3D) memory device is disclosed. The 3D memory device includes a memory stack, a semiconductor layer above the memory stack, a plurality of channel structures each extending vertically through the memory stack, and a source contact above the memory stack and in contact with the semiconductor layer. A semiconductor plug, in contact with the semiconductor layer, surrounds an end of one of the channel structures. The source contact is electrically connected with the one of the channel structures. At least a portion of the source contact is buried within the semiconductor layer.

公开(公告)号：US11600633B2

公开(公告)日：2023-03-07

申请号：US16862368

申请日：2020-04-29

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Jianzhong Wu ,  Kun Zhang ,  Tingting Zhao ,  Rui Su ,  Zhongwang Sun ,  Wenxi Zhou ,  Zhiliang Xia

IPC: H01L27/115 ,  H01L27/11582 ,  H01L21/768 ,  H01L23/535 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack, a channel structure, a channel local contact, and a slit structure. The memory stack includes interleaved conductive layers and dielectric layers above the substrate. The channel structure extends vertically through the memory stack. The channel local contact is above and in contact with the channel structure. The slit structure extends vertically through the memory stack. The slit structure includes a contact including a first contact portion and a second contact portion above the first contact portion and having a different material of the first contact portion. An upper end of the second contact portion of the slit structure is flush with an upper end of the channel local contact.

公开(公告)号：US11562945B2

公开(公告)日：2023-01-24

申请号：US17020473

申请日：2020-09-14

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Linchun Wu ,  Kun Zhang ,  Zhong Zhang ,  Wenxi Zhou ,  Zhiliang Xia

IPC: H01L23/48 ,  H01L21/48 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582

Abstract: Embodiments of methods for forming contact structures and semiconductor devices thereof are disclosed. In an example, a semiconductor device includes an insulating layer, a conductive layer over the insulating layer, and a spacer structure in the conductive layer and in contact with the insulating layer. The semiconductor device also includes a first contact structure in the spacer structure and extending vertically through the insulating layer. The first contact structure includes a first contact portion and a second contact portion in contact with each other. An upper surface of the second contact portion is coplanar with an upper surface of the conductive layer.

公开(公告)号：US11557570B2

公开(公告)日：2023-01-17

申请号：US16913649

申请日：2020-06-26

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Kun Zhang ,  Wenxi Zhou ,  Zhiliang Xia ,  Zongliang Huo

IPC: H01L27/11582 ,  H01L25/065 ,  H01L23/00 ,  H01L25/18 ,  H01L25/00 ,  H01L27/1157 ,  H01L27/11573

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A sacrificial layer on a substrate, an N-type doped semiconductor layer on the sacrificial layer, and a dielectric stack on the N-type doped semiconductor layer are subsequently formed. A channel structure extending vertically through the dielectric stack and the N-type doped semiconductor layer is formed. The dielectric stack is replaced with a memory stack, such that the channel structure extends vertically through the memory stack and the N-type doped semiconductor layer. The substrate and the sacrificial layer are removed to expose an end of the channel structure. Part of the channel structure abutting the N-type doped semiconductor layer is replaced with a semiconductor plug.

公开(公告)号：US11508750B2

公开(公告)日：2022-11-22

申请号：US16920201

申请日：2020-07-02

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Kun Zhang ,  Di Wang ,  Lei Liu ,  Wenxi Zhou ,  Zhiliang Xia

IPC: H01L27/11582 ,  H01L23/00 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a peripheral circuit on the substrate, a memory stack including interleaved conductive layers and dielectric layers above the peripheral circuit, a first semiconductor layer above the memory stack, a second semiconductor layer above and in contact with the first semiconductor layer, a plurality of channel structures each extending vertically through the memory stack and the first semiconductor layer, and an insulating structure extending vertically through the memory stack, the first semiconductor layer, and the second semiconductor layer.

公开(公告)号：US11462560B2

公开(公告)日：2022-10-04

申请号：US16913677

申请日：2020-06-26

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Kun Zhang

IPC: H01L27/11582 ,  H01L23/522 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11573

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A sacrificial layer on a substrate, a P-type doped semiconductor layer having an N-well on the sacrificial layer, and a dielectric stack on the P-type doped semiconductor layer are subsequently formed. A channel structure extending vertically through the dielectric stack and the P-type doped semiconductor layer is formed. The dielectric stack is replaced with a memory stack, such that the channel structure extends vertically through the memory stack and the P-type doped semiconductor layer. The substrate and the sacrificial layer are removed to expose an end of the channel structure. Part of the channel structure abutting the P-type doped semiconductor layer is replaced with a semiconductor plug.