公开(公告)号：US6124665A

公开(公告)日：2000-09-26

申请号：US345112

申请日：1999-07-06

Applicant: Ammar Derraa

Inventor： Ammar Derraa

IPC: H01J3/02 ,  H01J9/02 ,  H01J1/02

CPC classification number: H01J9/025 ,  H01J3/022 ,  H01J2329/00

Abstract: A method of fabricating row lines over a field emission array. The method employs only two mask steps to define row lines and pixel openings through selected regions of each of the row lines. In accordance with the method of the resent invention, a layer of conductive material is disposed over a substantially planarized surface of a grid of semiconductive material. A layer of passivation material is then disposed over the layer of conductive material. In one embodiment of the method, a first mask may be employed to remove passivation material and conductive material from between adjacent rows of pixels and from substantially above each of the pixels of the field emission array. A second mask is employed to remove semiconductive material from between the adjacent rows of pixels. In another embodiment of the method, a first mask is employed to facilitate removal of passivation material, conductive material, and semiconductive material from between adjacent rows of pixels of the field emission array. A second mask is employed to facilitate the removal of passivation material and conductive material from the desired areas of pixel openings. The present invention also includes field emission arrays having a semiconductive grid and a relatively thin passivation layer exposed between adjacent row lines.

Abstract translation: 一种在场发射阵列上制造行线的方法。 该方法仅采用两个掩模步骤来通过每条行线的选定区域来定义行线和像素开口。 根据本发明的方法，将导电材料层设置在半导体材料格栅的基本上平坦化的表面上。 然后将一层钝化材料设置在导电材料层上。 在该方法的一个实施例中，可以使用第一掩模来从相邻的像素行之间以及从场发射阵列的每个像素的大致上方去除钝化材料和导电材料。 采用第二掩模从相邻的像素行之间移除半导体材料。 在该方法的另一个实施例中，使用第一掩模以便于从场致发射阵列的相邻行像素之间移除钝化材料，导电材料和半导体材料。 使用第二掩模来促进从像素开口的期望区域去除钝化材料和导电材料。 本发明还包括具有半导电栅格的场发射阵列和暴露在相邻行线之间的相对薄的钝化层。

公开(公告)号：US6107728A

公开(公告)日：2000-08-22

申请号：US71465

申请日：1998-04-30

Applicant: Christopher J. Spindt ,  John E. Field ,  Theodore S. Fahlen

Inventor： Christopher J. Spindt ,  John E. Field ,  Theodore S. Fahlen

IPC: H01J9/42 ,  H01J1/304 ,  H01J3/02 ,  H01J3/18 ,  H01J29/04 ,  H01J31/12 ,  H01J1/30 ,  H01J1/02

CPC classification number: H01J3/022 ,  H01J2329/00

Abstract: An electrode (12 or 30) of an electron-emitting device has a plurality of openings (16 or 60) spaced laterally apart from one another. The openings can be used, as needed, in selectively separating one or more parts of the electrode from the remainder of the electrode during corrective test directed towards repairing any short-circuit defects that may exist between the electrode and other overlying or underlying electrodes. When the electrode with the openings is an emitter electrode (12), each opening (16) normally extends fully across an overlying control electrode (30). When the electrode with the openings is a control electrode (30), each opening (60) normally extends fully across an underlying emitter electrode (12). The short-circuit repair procedure typically entails directing light energy on appropriate portions of the electrode with the openings.

Abstract translation: 电子发射器件的电极（12或30）具有彼此横向间隔开的多个开口（16或60）。 根据需要，可以在校正试验期间选择性地将电极的一个或多个部分与电极的其余部分分离开来，以修复可能存在于电极和其它上覆或下面的电极之间的任何短路缺陷。 当具有开口的电极是发射电极（12）时，每个开口（16）通常完全穿过覆盖的控制电极（30）延伸。 当具有开口的电极是控制电极（30）时，每个开口（60）通常完全穿过下面的发射电极（12）延伸。 短路修复程序通常需要将光能引导到具有开口的电极的适当部分上。

公开(公告)号：US6091188A

公开(公告)日：2000-07-18

申请号：US50636

申请日：1998-03-27

Applicant: Yoshinori Tomihari ,  Fumihiko Matsuno

Inventor： Yoshinori Tomihari ,  Fumihiko Matsuno

IPC: H01J1/304 ,  H01J3/02 ,  H01J1/30

CPC classification number: H01J3/022 ,  H01J2201/30403

Abstract: There is provided a field emission cold cathode including a semiconductor substrate, an insulating layer formed on the semiconductor substrate, an electrically conductive gate electrode layer formed on the insulating layer, a plurality of cavities being formed throughout both the insulating layer and the gate electrode layer, a conical emitter formed on the semiconductor substrate in each one of the cavities, and an insulating wall formed at least in the semiconductor substrate so that the insulating wall surrounds each one of the cavities. The insulating wall partitions the semiconductor substrate into a first group of blocks located at a marginal end of the semiconductor substrate and a second group of blocks located within the first group of blocks. Each one of the first group of blocks is designed to have a greater area than an area of each one of the second group of blocks. The field emission cold cathode makes it possible to uniformize an emission current in all of the blocks to thereby provide uniform brightness to images in a display area.

Abstract translation: 提供一种场致发射冷阴极，包括半导体衬底，形成在半导体衬底上的绝缘层，形成在绝缘层上的导电栅电极层，在绝缘层和栅电极层两端形成的多个空腔 ，形成在每个空腔中的半导体衬底上的锥形发射体，以及至少在半导体衬底中形成的绝缘壁，使得绝缘壁围绕每个空腔。 绝缘壁将半导体衬底分隔成位于半导体衬底的边缘端的第一组块和位于第一组块内的第二组块。 第一组块中的每一个被设计成具有比第二组块中的每个块的区域更大的面积。 场致发射冷阴极使得可以使所有块中的发射电流均匀化，从而为显示区域中的图像提供均匀的亮度。

公开(公告)号：US6064149A

公开(公告)日：2000-05-16

申请号：US027528

申请日：1998-02-23

Applicant: Kanwal K. Raina

Inventor： Kanwal K. Raina

IPC: H01J3/02 ,  H01J9/02 ,  H01J31/12 ,  H01J19/00

CPC classification number: H01J3/022 ,  H01J31/127 ,  H01J9/025

Abstract: A field emission device having a gate electrode structure in which a nanocrystalline or microcrystalline silicon layer is positioned over a silicon dioxide dielectric layer. Also disclosed are methods for forming the field emission device. The nanocrystalline or microcrystalline silicon layer forms a bond with the dielectric layer that is sufficiently strong to prevent delamination during a chemical-mechanical planarization operation that is conducted during formation of the field emission device. The nanocrystalline or microcrystalline silicon layer is deposited by PECVD in an atmosphere that contains silane and hydrogen at a ratio in a range from about 1:15 to about 1:40. Multiple field emission devices may be formed and included in a flat panel display for computer monitors telecommunications devices, and the like.

Abstract translation: 一种场致发射器件，具有其中纳米晶体或微晶硅层位于二氧化硅电介质层上方的栅电极结构。 还公开了形成场发射装置的方法。 纳米晶体或微晶硅层与电介质层形成结合，其足够强以防止在形成场致发射器件期间进行的化学 - 机械平面化操作期间的分层。 纳米晶体或微晶硅层通过PECVD在含有硅烷和氢气的气氛中以约1:15至约1:40的比例沉积。 可以形成多个场致发射器件并将其包括在用于计算机监视器电信设备的平板显示器等中。

公开(公告)号：US6037708A

公开(公告)日：2000-03-14

申请号：US263636

申请日：1999-03-05

Applicant: Michael D. Potter

Inventor： Michael D. Potter

IPC: H01J3/02 ,  H01J9/02 ,  H01J21/04 ,  H01J21/10 ,  H01J31/12 ,  H01J1/16 ,  H01J19/24

CPC classification number: H01J21/04 ,  H01J21/105 ,  H01J3/022 ,  H01J31/127 ,  H01J9/025

Abstract: A lateral-emitter field emission device has a thin-film emitter cathode 50 which has thickness of not more than several hundred angstroms and has an edge or tip 110 having a small radius of curvature. To form a novel display cell structure, a cathodoluminescent phosphor anode 60 is positioned below the plane of the thin-film lateral-emitter cathode 50, allowing a large portion of the phosphor anode's top surface to emit light in the desired direction. An anode contact layer contacts the phosphor anode 60 from below to form a buried anode contact 90 which does not interfere with light emission. The anode phosphor is precisely spaced apart from the cathode edge or tip and receives electrons emitted by field emission from the edge or tip of the lateral-emitter cathode, when a small bias voltage is applied. The device may be configured as a diode, triode, or tetrode, etc. having one or more control electrodes 140 and/or 170 positioned to allow control of current from the emitter to the phosphor anode by an electrical signal applied to the control electrode. In a particularly simple embodiment, a single control electrode 140 is positioned in a plane below the emitter edge or tip 110 and automatically aligned to that edge. The display cell structure may be repeated many times in an array, and the display cell structure of the invention lends itself to novel array structures which are also disclosed. A fabrication process is disclosed using subprocess steps S1-S19 similar to those of semiconductor integrated circuit fabrication to produce the novel display cell structures and their arrays. Various embodiments of the fabrication process allow the use of conductive or insulating substrates 20 and allow fabrication of devices having various functions and complexity.

Abstract translation: 横向发射极场发射器件具有薄膜发射极阴极50，薄膜发射极阴极50具有不超过几百埃的厚度，并具有具有小曲率半径的边缘或尖端110。 为了形成新颖的显示单元结构，阴极发光磷光体阳极60位于薄膜侧向发射极阴极50的平面的下方，允许荧光体阳极的顶表面的大部分在期望的方向上发光。 阳极接触层从下方接触荧光体阳极60，以形成不干扰光发射的掩埋阳极接触90。 当施加小的偏置电压时，阳极磷光体与阴极边缘或尖端精确地间隔开并且接收从侧向发射极阴极的边缘或尖端的场发射发射的电子。 该器件可以被配置为具有一个或多个控制电极140和/或170的二极管，三极管或四极管等，其被定位成允许通过施加到控制电极的电信号来控制从发射极到磷光体阳极的电流。 在特别简单的实施例中，单个控制电极140定位在发射器边缘或尖端110下方的平面中并自动对准该边缘。 显示单元结构可以在阵列中重复多次，并且本发明的显示单元结构本身也被公开了新颖的阵列结构。 使用类似于半导体集成电路制造的子过程步骤S1-S19来公开制造工艺以产生新的显示单元结构及其阵列。 制造工艺的各种实施例允许使用导电或绝缘基板20并且允许制造具有各种功能和复杂性的装置。

公开(公告)号：US6008576A

公开(公告)日：1999-12-28

申请号：US879133

申请日：1997-06-19

Applicant: Tadashi Nakatani ,  Keiichi Betsui

Inventor： Tadashi Nakatani ,  Keiichi Betsui

IPC: H01J9/02 ,  H01J3/02 ,  H01J29/04 ,  H01J29/94 ,  H01J31/12

CPC classification number: H01J3/022 ,  H01J29/94 ,  H01J31/127

Abstract: A flat display is provided, which includes: a cathode plate including emitter electrode lines each having emitter tips provided in pixel areas, and gate electrode lines crossing the emitter electrode lines at the pixel areas; and an anode plate spaced a predetermined distance from the cathode plate in an opposed relation and having an anode conductive layer and fluorescent layers formed on the anode conductive layer in the respective pixel areas; the emitter electrode lines and the gate electrode lines each having transparent portions formed of a transparent conductive film at least in the pixel areas so that light emission from the fluorescent layers can be viewed through the transparent portions.

Abstract translation: 提供一种平板显示器，其包括：阴极板，包括各自具有设置在像素区域中的发射极尖端的发射极电极线以及在像素区域处与发射极电极线交叉的栅电极线; 以及与相对的阴极板隔开预定距离的阳极板，并且在相应像素区域中具有形成在阳极导电层上的阳极导电层和荧光层; 所述发射极电极线和栅极电极线至少在像素区域中具有由透明导电膜形成的透明部分，使得可以通过透明部分观察来自荧光层的发光。

公开(公告)号：US5990612A

公开(公告)日：1999-11-23

申请号：US937656

申请日：1997-09-24

Applicant: Kazuo Konuma

Inventor： Kazuo Konuma

IPC: H01J9/02 ,  G09G3/22 ,  H01J1/02 ,  H01J1/304 ,  H01J3/02 ,  H01J29/08 ,  H01J1/30 ,  H01J19/24

CPC classification number: H01J29/085 ,  H01J1/02 ,  H01J3/022

Abstract: A field emitter array comprises a plurality of cathode electrodes and an anode electrode disposed opposite to the plurality of cathode electrodes. And the anode electrode is provided with a plurality of protrusions having a cap material disposed on the tip of each protrusion. A voltage below a designated value is applied between a gate electrode and the cathode electrodes, and electrons are released only from a cathode electrode with a low emission start voltage. When the electrons are emitted to the cap material provided on the protrusions, the cap material is sputtering-evaporated and is affixed to the cathode electrode. Then a cap is disposed on the each of the cathode electrodes. Then, the emission properties between each cathode electrode are consequently rendered uniform, thereby increasing the emission start voltage and maximum applied voltage of the overall field emitter array.

Abstract translation: 场发射器阵列包括多个阴极电极和与多个阴极电极相对设置的阳极电极。 并且阳极电极设置有多个突起，其具有设置在每个突起的尖端上的盖材料。 在栅电极和阴极之间施加低于指定值的电压，并且仅从具有低发射起始电压的阴极释放电子。 当电子被发射到设置在突起上的盖材料时，盖材料被溅射蒸发并且固定到阴极电极。 然后在每个阴极上设置盖。 然后，各阴极之间的发射特性因此变得均匀，从而增加了整个场发射极阵列的发射开始电压和最大施加电压。

公开(公告)号：US5990603A

公开(公告)日：1999-11-23

申请号：US889156

申请日：1997-07-07

Applicant: Chang-seob Kim ,  Bong-uk Jeong

Inventor： Chang-seob Kim ,  Bong-uk Jeong

IPC: H01J3/02 ,  H01J29/04 ,  H01J29/48 ,  H01J1/30 ,  H01J19/22

CPC classification number: H01J3/022 ,  H01J29/04 ,  H01J29/485

Abstract: A cathode structure of an electron gun for a cathode ray tube includes: a substrate (51); cathode electrode layers (52) formed on the substrate (51) and spaced apart from each other at predetermined intervals; a plurality of metal tips (53); an insulating layer (54) formed on the cathode electrode layers (52) and the substrate (51) to isolate each of the metal tips (53) from each other; a gate electrode layer having a first gate electrode portion (56) having a gate through which the metal tips (53) are exposed and formed on top of the insulating layer (54), and a second gate electrode portion (57) extending horizontally from said first gate portion (56) and divided into several parts by a plurality of gaps (60) for reducing the capacitance between the cathode electrode layers (52) and the second gate electrode portion (57).

Abstract translation: 阴极射线管用电子枪的阴极结构包括：基板（51）; 形成在所述基板（51）上并以预定间隔彼此间隔开的阴极电极层（52） 多个金属尖端（53）; 形成在所述阴极电极层（52）和所述基板（51）上的绝缘层（54），以将所述金属端头（53）彼此隔离; 栅电极层，具有第一栅电极部分（56），所述第一栅电极部分（56）具有栅极，所述金属尖端（53）暴露并形成在所述绝缘层（54）的顶部上;以及第二栅极电极部分（57） 所述第一栅极部分（56）被多个间隙（60）分成若干部分，用于减小阴极电极层（52）和第二栅电极部分（57）之间的电容。

公开(公告)号：US5965977A

公开(公告)日：1999-10-12

申请号：US828836

申请日：1997-03-24

Applicant: Hideo Makishima

Inventor： Hideo Makishima

IPC: H01J3/18 ,  H01J1/304 ,  H01J3/02 ,  H01J63/02 ,  H01J63/06 ,  H01J1/30

CPC classification number: H01J3/022 ,  H01J1/304 ,  H01J63/02 ,  H01J2201/30403 ,  H01J2201/30426

Abstract: There is provided a cold cathode including a substrate, a plurality of electron emitting electrodes formed on the substrate, a first insulating layer formed on the substrate and formed with a plurality of first cavities in which the electron emitting electrodes are disposed, a gate electrode formed on the first insulating layer and formed with a plurality of first openings which are in communication with the first cavities, a second insulating layer formed on the gate electrode and formed with a plurality of second cavities which are in communication with the first openings, and a focusing electrode formed on the second insulating layer and formed with a plurality of second openings which are in communication with the second cavities. At least one of central axes of the second openings and central axes of the first openings is eccentric with central axes of the electron emitting electrodes. Eccentricity between at least one of the central axes of the second openings and the central axes of the first openings, and the central axes of the electron emitting electrodes is oriented outwardly, and a degree of the eccentricity is set greater at a location more remote from a centrally located electron emitting electrode.

Abstract translation: 提供了一种冷阴极，其包括基板，形成在基板上的多个电子发射电极，形成在基板上并形成有多个第一空腔的第一绝缘层，其中设置有电子发射电极，形成栅电极 在所述第一绝缘层上形成有与所述第一空腔连通的多个第一开口，形成在所述栅电极上并形成有与所述第一开口连通的多个第二空腔的第二绝缘层，以及 聚焦电极形成在第二绝缘层上并且形成有与第二空腔连通的多个第二开口。 第二开口的中心轴线和第一开口的中心轴线的至少一个与电子发射电极的中心轴偏心。 第二开口的至少一个中心轴线与第一开口的中心轴线和电子发射电极的中心轴线之间的偏心度向外取向，偏心度在远离 中心位置的电子发射电极。

公开(公告)号：US5955849A

公开(公告)日：1999-09-21

申请号：US201963

申请日：1994-02-25

Applicant: Cha-Mei Tang ,  Antonio C. Ting ,  Thomas A. Swyden

Inventor： Cha-Mei Tang ,  Antonio C. Ting ,  Thomas A. Swyden

IPC: G21K1/087 ,  H01J3/02 ,  H01J3/26 ,  H01J23/06 ,  H01J29/48 ,  H01J35/06 ,  H03F3/56 ,  G09G1/04 ,  H01J29/70

CPC classification number: G21K1/087 ,  H01J23/06 ,  H01J29/481 ,  H01J3/022 ,  H01J3/26 ,  H01J35/065 ,  H03F3/56

Abstract: A field emitter for producing an electron beam includes at least one cold cathode unit. Each of the cold cathode units includes an emitter cone having an emitter tip and a gate spaced apart from the emitter tip for extracting electrons from the emitter tip in a propagation direction upon application of a positive dc voltage on the gate with respect to the emitter tip. The gate forms a gate cavity for propagation of the extracted electrons therethrough. Each of the cold cathode units further includes at least one lens electrode disposed further in the propagation direction from the emitter tip than the gate, the at least one lens electrode forming at least one lens cavity for propagation of the extracted electrons therethrough. The at least one lens electrode is for focusing the extracted electrons in part of the gate cavity, part of the at least one lens cavity, and part of the region therebetween.

Abstract translation: 用于产生电子束的场致发射体包括至少一个冷阴极单元。 每个冷阴极单元包括发射极锥体，发射极尖端和与发射极尖端间隔开的栅极，用于在栅极上相对于发射极尖端施加正直流电压时沿传播方向从发射极尖端提取电子 。 栅极形成用于通过其提取的电子的传播的栅极腔。 每个冷阴极单元还包括至少一个透镜电极，该透镜电极在发射极尖端的传播方向上比栅极进一步设置，所述至少一个透镜电极形成至少一个透镜腔，用于传播所提取的电子。 所述至少一个透镜电极用于将提取的电子聚焦在所述栅极空腔的一部分中，所述至少一个透镜腔的一部分以及其间的区域的一部分。