Test system for bumped semiconductor components
    81.
    发明授权
    Test system for bumped semiconductor components 失效
    碰撞半导体元件的测试系统

    公开(公告)号:US07002362B2

    公开(公告)日:2006-02-21

    申请号:US10832483

    申请日:2004-04-26

    Abstract: An interconnect for testing semiconductor components includes a substrate, and contacts on the substrate for making temporary electrical connections with bumped contacts on the components. Each contact includes a recess and a pattern of leads cantilevered over the recess configured to electrically engage a bumped contact. The leads are adapted to move in a z-direction within the recess to accommodate variations in the height and planarity of the bumped contacts. In addition, the leads can include projections for penetrating the bumped contacts, a non-bonding outer layer for preventing bonding to the bumped contacts, and a curved shape which matches a topography of the bumped contacts. The leads can be formed by forming a patterned metal layer on the substrate, by attaching a polymer substrate with the leads thereon to the substrate, or be etching the substrate to form conductive beams.

    Abstract translation: 用于测试半导体部件的互连件包括基板和基板上的触点,用于与部件上的凸起触点进行临时电连接。 每个接触件包括一个凹部和悬在该凹部上的引线图案,其构造成电接合凸起的触点。 引线适于在凹部内在z方向上移动以适应凸起接触件的高度和平面度的变化。 此外,引线可以包括用于穿透凸起的触点的突起,用于防止与凸起的触点接合的非结合外层以及与凸起的触点的形状相匹配的弯曲形状。 可以通过在基板上形成图案化的金属层,通过将聚合物基板与其上的引线附接到基板上,或者蚀刻基板以形成导电梁来形成引线。

    Wired circuit board and connection structure of wired circuit board
    82.
    发明申请
    Wired circuit board and connection structure of wired circuit board 有权
    有线电路板和有线电路板的连接结构

    公开(公告)号:US20050272276A1

    公开(公告)日:2005-12-08

    申请号:US11135511

    申请日:2005-05-24

    Inventor: Yasunari Ooyabu

    Abstract: In order to provide a wired circuit board in which electrical continuity inspection can be omitted and a connection structure of the wired circuit board, in connection between a first wired circuit board 1 and a second wired circuit board 2, a first connection terminal 13 and a second connection terminal 14 are abutted against each other in the direction in which they are opposed along the respective longitudinal direction of the wired circuit boards, and are arranged in line with each other, and a solder bump 15 is provided so as to continuously extend over surfaces of the first connection terminal 13 and the second connection terminal 14. Consequently, the solder bump 15 is not interposed between opposed surfaces of the first connection terminal 13 and the second connection terminal 14, thereby allowing electrical connection by the solder bump 15 between the first connection terminal 13 and the second connection terminal 14 to be confirmed from the appearance by visual observation.

    Abstract translation: 为了提供可以省略电连续性检查的布线电路板和布线电路板的连接结构,在第一布线电路板1和第二布线电路板2之间连接第一连接端子13和 第二连接端子14沿着与布线电路板的纵向方向相对的方向彼此抵接,并且彼此排成一列,并且设置焊料凸块15,以连续地延伸越过 第一连接端子13和第二连接端子14的表面。 因此,焊料凸块15不插入在第一连接端子13和第二连接端子14的相对的表面之间,从而允许由第一连接端子13和第二连接端子14之间的焊料凸块15进行电连接以从 通过目视观察外观。

    Liquid crystal polymers for flexible circuits
    85.
    发明授权
    Liquid crystal polymers for flexible circuits 失效
    用于柔性电路的液晶聚合物

    公开(公告)号:US06923919B2

    公开(公告)日:2005-08-02

    申请号:US09947082

    申请日:2001-09-04

    Abstract: A process for providing a metal-seeded liquid crystal polymer comprising the steps of providing a liquid crystal polymer substrate to be treated by applying an aqueous solution comprising an alkali metal hydroxide and a solubilizer as an etchant composition for the liquid crystal polymer substrate. Further treatment of the etched liquid crystal polymer substrate involves depositing an adherent metal layer on the etched liquid crystal polymer substrate. An adherent metal layer may be deposited using either electroless metal plating or vacuum deposition of metal such as by sputtering.When using electroless metal plating, a tin(II) solution applied to the liquid crystal polymer provides a treated liquid crystal polymer substrate to which the application of a palladium(II) solution provides the metal-seeded liquid crystal polymer. The etchant composition comprises a solution in water of from 35 wt. % to 55 wt. % of an alkali metal salt, and from 10 wt. % to 35 wt. % of a solubilizer dissolved in the solution to provide the etchant composition suitable for etching the liquid crystal polymer at a temperature from 50° C. to 120° C. A flexible circuit comprising a liquid crystal polymer film having through-holes and related shaped voids may be formed using etchant compositions as previously described.

    Abstract translation: 一种提供金属种子液晶聚合物的方法,包括以下步骤:通过施加包含碱金属氢氧化物和增溶剂的水溶液作为液晶聚合物基材的蚀刻剂组合物来提供待处理的液晶聚合物基材。 蚀刻的液晶聚合物基板的进一步处理包括在蚀刻的液晶聚合物基板上沉积粘附金属层。 可以使用化学镀金属或真空沉积金属例如溅射来沉积粘附金属层。 当使用化学镀金属时,施加到液晶聚合物上的锡(II)溶液提供处理过的液晶聚合物基质,其中施加钯(II)溶液提供金属种子液晶聚合物。 蚀刻剂组合物包含在35重量%的水中的溶液。 %至55重量% %的碱金属盐和10wt。 %〜35重量% 溶解在溶液中的%的增溶剂以提供适于在50℃至120℃的温度下蚀刻液晶聚合物的蚀刻剂组合物。包括具有通孔和相关形状空隙的液晶聚合物膜的柔性电路 可以使用如前所述的蚀刻剂组合物形成。

    Tape substrate and method for fabricating the same
    87.
    发明申请
    Tape substrate and method for fabricating the same 失效
    胶带基材及其制造方法

    公开(公告)号:US20050109631A1

    公开(公告)日:2005-05-26

    申请号:US11023162

    申请日:2004-12-28

    Abstract: A tape substrate including an insulating film, a copper foil pattern formed on the insulating film at one side of the insulating film, and provided with a connecting area where an electronic element is to be mounted, a barrier layer plated on the copper foil pattern at the connecting area, and formed with a plurality of pores, and a tin layer plated on the barrier layer, and alloyed with a portion of the copper foil pattern corresponding to the connecting area, through the pores. A method for fabricating the tape substrate is also disclosed. In accordance with the invention, it is possible to reduce the time taken for the copper foil pattern to come into contact with the electroless tin plating solution used in the tin plating process, thereby preventing the copper component of the copper foil pattern from being eluted. Accordingly, there is no open-circuit fault caused by formation of pores. The barrier layer makes it possible to obtain an improved plating efficiency and to reduce the thickness of the alloy layer. In addition, the barrier layer serves to reduce internal stress generated at the interface between the tin layer and the copper foil pattern, thereby suppressing formation of voids. Accordingly, there is an effect of preventing a short circuit caused by the growth of whiskers.

    Abstract translation: 一种带状基板,包括绝缘膜,在绝缘膜的一侧上的绝缘膜上形成的铜箔图案,并且设置有要安装电子元件的连接区域,镀在铜箔图案上的阻挡层 连接区域,并且形成有多个孔,以及镀在阻挡层上的锡层,并且与对应于连接区域的铜箔图案的一部分合金化。 还公开了一种用于制造带基材的方法。 根据本发明,可以减少铜箔图案与镀锡工艺中使用的化学镀锡溶液接触所花费的时间,从而防止铜箔图案的铜成分被洗脱。 因此,没有由孔形成引起的开路故障。 阻挡层可以获得提高的电镀效率并减小合金层的厚度。 此外,阻挡层用于减少在锡层和铜箔图案之间的界面处产生的内应力,从而抑制空隙的形成。 因此,存在防止晶须生长引起的短路的效果。

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