公开(公告)号：US20150279749A1

公开(公告)日：2015-10-01

申请号：US14436033

申请日：2013-12-31

Applicant: CSMC TECHNOLOGIES FABI CO., LTD.

Inventor： Anna Zhang ,  Xiaoming Li

IPC: H01L21/66 ,  H01L21/3065 ,  H01L21/308

CPC classification number: H01L22/12 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3083 ,  H01L22/20

Abstract: A critical dimension compensating method of a deep trench etching process includes: obtaining an etching critical dimension difference; compensating an masking layer layout for wafer etching according to a distance between an etching position and the center position of the wafer, and the etching critical dimension difference; and performing a deep trench etching to the wafer according to the compensated masking layer layout. The dimension of the etching patterns of the masking layer layout is compensated by using half of the critical dimension difference as the compensation value, such that the etch rate difference and the etching dimension difference caused by uneven distribution of the critical dimension at different wafer locations during the deep trench etching process are improved, thus greatly improving the uniformity of the critical dimension of the deep trench etching structure.

Abstract translation: 深沟槽蚀刻工艺的关键尺寸补偿方法包括：获得蚀刻临界尺寸差; 根据蚀刻位置和晶片的中心位置之间的距离和蚀刻临界尺寸差补偿用于晶片蚀刻的掩模层布局; 以及根据补偿的掩模层布局对晶片执行深沟槽蚀刻。 通过使用临界尺寸差的一半作为补偿值来补偿掩模层布局的蚀刻图案的尺寸，使得由不同晶片位置的临界尺寸不均匀分布引起的蚀刻速率差和蚀刻尺寸差异 深沟槽蚀刻工艺得到改善，从而大大提高了深沟槽蚀刻结构的临界尺寸的均匀性。

公开(公告)号：US20170010164A1

公开(公告)日：2017-01-12

申请号：US15119311

申请日：2015-05-06

Applicant: CSMC TECHNOLOGIES FABI CO., LTD.

Inventor： Dongbiao QIAN

IPC: G01L1/24 ,  G01L1/04

CPC classification number: G01L1/242 ,  G01L1/04 ,  G01L7/086

Abstract: A pressure sensor (10) comprising: a detection film (200) which is arranged on a silicon substrate (100) and is used for detecting a pressure which is applied to the surface of the detection film and generating a bulge deformation which adapts to the size of the pressure; an optical transmitter (300) and an optical detector (400) which are arranged on the silicon substrate (100), are located on a plane which is parallel to a plane where the detection film (200) is located, and are oppositely arranged at two sides of the detection film (200); and a pressure calculation module which is connected to the optical detector (400) and is used for acquiring detected light intensity data, and calculating a pressure value according to the light intensity data.

Abstract translation: 一种压力传感器（10），包括：检测膜（200），其设置在硅基板（100）上，用于检测施加到所述检测膜的表面的压力，并产生适应于 压力大小; 布置在硅基板（100）上的光发射器（300）和光检测器（400）位于与检测膜（200）所在的平面平行的平面上，并且相对地布置在 检测膜（200）的两侧; 以及压力计算模块，其连接到光学检测器（400），并用于获取检测到的光强度数据，并根据光强度数据计算压力值。

公开(公告)号：US20160229691A1

公开(公告)日：2016-08-11

申请号：US15023057

申请日：2014-12-04

Applicant: CSMC TECHNOLOGIES FABI CO., LTD.

Inventor： Errong JING

IPC: B81C1/00

CPC classification number: B81C1/00142 ,  B81C2201/0108 ,  B81C2201/0109 ,  B81C2201/013

Abstract: A method for manufacturing a film support beam includes: providing a substrate having opposed first and second surfaces; coating a sacrificial layer on the first surface of the substrate, and patterning the sacrificial layer; depositing a dielectric film on the sacrificial layer to form a dielectric film layer, and depositing a metal film on the dielectric film layer to form a metal film layer; patterning the metal film layer, and dividing a patterned area of the metal film layer into a metal film pattern of a support beam portion and a metal film pattern of a non-support beam portion, wherein a width of the metal film pattern of the support beam portion is greater than a width of a final support beam pattern, and a width of the metal film pattern of the non-support beam portion is equal to a width of a width of a final non-support beam pattern at the moment; photoetching and etching on the metal film layer and the dielectric film layer to obtain the final support beam pattern, the final non-support beam pattern and a final dielectric film layer, wherein the final dielectric film layer serves as a support film of the final support beam pattern and the final non-support beam pattern; and removing the sacrificial layer.

Abstract translation: 制造薄膜支撑梁的方法包括：提供具有相对的第一和第二表面的基底; 在衬底的第一表面上涂覆牺牲层，并对牺牲层进行构图; 在所述牺牲层上沉积介电膜以形成电介质膜层，并在所述电介质膜层上沉积金属膜以形成金属膜层; 图案化金属膜层，并将金属膜层的图案区域划分成支撑梁部分的金属膜图案和非支撑梁部分的金属膜图案，其中支撑件的金属膜图案的宽度 光束部分大于最终支撑光束图案的宽度，并且非支撑光束部分的金属膜图案的宽度等于此时的最终非支撑光束图案的宽度的宽度; 在金属膜层和电介质膜层上进行光蚀刻和蚀刻，以获得最终的支撑束图案，最终的非支撑束图案和最终的电介质膜层，其中最终的电介质膜层用作最终支撑体的支撑膜 光束图案和最终的非支撑光束图案; 并去除牺牲层。

公开(公告)号：US20160372591A1

公开(公告)日：2016-12-22

申请号：US14902261

申请日：2014-08-15

Applicant: CSMC TECHNOLOGIES FABI CO., LTD.

Inventor： Feng Huang ,  GuIPENG Sun ,  Guangtao Han

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/7816 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4238 ,  H01L29/66659 ,  H01L29/7835

Abstract: A lateral double diffused metal oxide semiconductor field-effect transistor, comprising: semiconductor substrates (400, 500), body regions (401, 501) positioned in the semiconductor substrates, drift regions (404, 504) positioned in the semiconductor substrates (400, 500), source regions (405, 505) and a body leading-out region (402) which are positioned in the body regions (401, 501) and spaced from the drift regions (404, 504), a field region (508) and drain regions (406, 506) which are positioned in the drift regions (404, 504), and gates (407, 507) positioned on the surfaces of the semiconductor substrates (400, 500) to partially cover the body regions (401, 501), the drift regions (404, 504) and the field region (508), wherein the field region (508) is of a finger-like structure and comprises a plurality of strip field regions which extend from the source regions (405, 505) to the drain regions (406, 506) and are isolated by the active regions; and the strip field regions provided with strip gate extending regions extending from the gates (407, 507). The lateral double diffused metal oxide semiconductor field-effect transistor, with the strip gates on the strip field regions to deplete the whole drift regions (404, 504), can realize relatively high off-state breakdown voltage; and the impurity concentration of the whole drift regions (404, 504) is improved in the presence of a plurality of active regions, so that the turn-on resistance is reduced.

Abstract translation: 一种横向双扩散金属氧化物半导体场效应晶体管，包括：半导体衬底（400,500），位于所述半导体衬底中的体区（401,501），位于所述半导体衬底中的漂移区（404,504） 500），位于体区（401,501）中并与漂移区（404,504）间隔开的源区（405,505）和体引出区（402），场区（508） 以及位于所述漂移区域（404,504）中的漏极区域（406,506）以及位于所述半导体衬底（400,500）的表面上以部分地覆盖所述体区域（401,504）的栅极（407,507） 501），漂移区域（404,504）和场区域（508），其中场区域（508）是手指状结构，并且包括从源区域（405,450）延伸的多个条带区域， 505）连接到漏极区（406,506）并被有源区隔离; 并且带状区域设置有从栅极（407,507）延伸的带状栅极延伸区域。 横向双扩散金属氧化物半导体场效应晶体管，在带场区域上的带栅极消耗整个漂移区（404,504），可以实现相对高的截止击穿电压; 并且在存在多个有源区的情况下整个漂移区（404,504）的杂质浓度得到改善，使得导通电阻降低。

公开(公告)号：US20160233840A1

公开(公告)日：2016-08-11

申请号：US15022674

申请日：2014-12-01

Applicant: CSMC TECHNOLOGIES FABI CO., LTD.

Inventor： Xueyan Wang ,  Weiyan Zhang

IPC: H03F3/00 ,  G01P15/08 ,  G01P15/12 ,  H03F3/387 ,  H03G1/00

CPC classification number: H03F3/005 ,  G01P15/0802 ,  G01P15/123 ,  H03F3/387 ,  H03F3/45475 ,  H03F2200/165 ,  H03F2200/261 ,  H03F2200/264 ,  H03F2203/45138 ,  H03F2203/45514 ,  H03G1/0094 ,  H03H7/075

Abstract: A sensor control circuit comprises a sensor (201), a filtering circuit (202), a buffering circuit (203), and an amplifying circuit (204). An output end of the sensor (201) is connected to an input end of the filtering circuit (202), an output end of the filtering circuit (202) is connected to an input end of the buffering circuit (203), and an output end of the buffering circuit (203) is connected to an input end of the amplifying circuit (204). Because the buffering circuit (203) is disposed between the filtering circuit (202) and the amplifying circuit (204), the sensor circuit has an advantage of full sampling. Further provided is an electronic apparatus using the sensor control circuit.

Abstract translation: 传感器控制电路包括传感器（201），滤波电路（202），缓冲电路（203）和放大电路（204）。 传感器（201）的输出端连接到滤波电路（202）的输入端，滤波电路（202）的输出端连接到缓冲电路（203）的输入端，输出端 缓冲电路（203）的端部连接到放大电路（204）的输入端。 由于缓冲电路（203）设置在滤波电路（202）和放大电路（204）之间，传感器电路具有全采样的优点。 还提供了使用传感器控制电路的电子设备。