公开(公告)号：US20170323863A1

公开(公告)日：2017-11-09

申请号：US15150342

申请日：2016-05-09

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Tae Yong Lee ,  Min Chul Shin ,  Se Man Oh

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L21/4846 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1111 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16012 ,  H01L2224/16013 ,  H01L2224/16057 ,  H01L2224/16104 ,  H01L2224/16238 ,  H01L2224/81203 ,  H01L2224/81224 ,  H01L2224/81359 ,  H01L2224/81379 ,  H01L2224/81385 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device, and a method of manufacturing thereof, that comprises a substrate including a dielectric layer, at least one conductive trace and conductive bump pad formed on one surface of the dielectric layer, and a protection layer covering the at least one conductive trace and conductive bump pad, the at least one conductive bump pad having one end exposed through the protection layer, and a semiconductor die electrically connected to the conductive bump pad of the substrate.

公开(公告)号：US20170294412A1

公开(公告)日：2017-10-12

申请号：US15297365

申请日：2016-10-19

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Tae Yong Lee ,  Min Chul Shin ,  Se Man Oh

IPC: H01L25/065 ,  H01L21/48 ,  H01L23/00 ,  H01L25/00 ,  H01L23/538 ,  H01L23/31 ,  H01L21/768 ,  H01L21/56

CPC classification number: H01L23/5384 ,  H01L23/15 ,  H01L23/31 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/48227 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Provided are a semiconductor package and a manufacturing method thereof for securing a space for mounting a semiconductor device by etching a temporary metal plate to form a plurality of conductive posts.

公开(公告)号：US09633932B2

公开(公告)日：2017-04-25

申请号：US14722110

申请日：2015-05-26

Applicant: AMKOR TECHNOLOGY, INC.

Inventor： Kyoung Yeon Lee ,  Byong Jin Kim ,  Kyung Su Kim ,  Hyung Il Jeon ,  Jae Doo Kwon

IPC: H01L23/495 ,  H01L23/043 ,  H01L23/31 ,  H01L21/50 ,  H01L23/498

CPC classification number: H01L23/49541 ,  H01L21/50 ,  H01L23/043 ,  H01L23/3157 ,  H01L23/49503 ,  H01L23/49861 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic package structure includes a substrate having a plurality of conductive leads. A discharge hole is disposed to extend through the substrate. An electronic chip is electrically connected to the plurality of conductive leads. A case is connected to the substrate and defines a cavity between the substrate and an upper of the case. The discharge hole and the electronic chip are disposed within the cavity, and the discharge hole is open to the outside in the electronic package structure. The discharge hole is configured to discharge air pressure that forms during the assembly process thereby improving the reliability of the electronic package structure.

公开(公告)号：US20140042605A1

公开(公告)日：2014-02-13

申请号：US13949186

申请日：2013-07-23

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Byong Jin Kim ,  Kyung Su Kim ,  Hyung Il Jeon ,  Jae Doo Kwon

IPC: H01L23/495 ,  H01L21/50

CPC classification number: H01L23/49541 ,  H01L21/50 ,  H01L23/043 ,  H01L23/3157 ,  H01L23/49503 ,  H01L23/49861 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In one embodiment, a lead frame package structure includes a lead frame having sides that surround a die paddle and on which a plurality of leads are formed. An electronic chip is attached to the die paddle and a case is attached to the lead frame to seal the leads and the electronic chip. One or more discharge holes are formed on and extending through one or more specific leads and/or on and extending through a predetermined position of the die paddle. The discharge holes are configured to discharge air pressure that forms during the assembly process thereby improving the reliability of the packaged electronic chip.

Abstract translation: 在一个实施例中，引线框架封装结构包括引线框架，引线框架具有围绕管芯焊盘的侧面并且在其上形成有多个引线。 将电子芯片安装在芯片上，并且将壳体附接到引线框架以密封引线和电子芯片。 一个或多个排出孔形成在一个或多个特定的引线上并且延伸穿过一个或多个特定的引线和/或延伸穿过管芯的预定位置。 排出孔被构造成排出在组装过程中形成的空气压力，从而提高封装的电子芯片的可靠性。

公开(公告)号：US11018079B2

公开(公告)日：2021-05-25

申请号：US15823737

申请日：2017-11-28

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Byong Jin Kim ,  Jae Min Bae ,  Hyung Il Jeon ,  Gi Jeong Kim ,  Ji Young Chung

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L21/48 ,  H01L21/60 ,  H01L23/00

Abstract: A semiconductor package structure includes a substrate comprising a land structure. The land structure includes a first land section having a first height in a cross-sectional view and a second land section having a second height in the cross-sectional view that is different than the first height. A mold encapsulant is disposed adjacent a lateral portion of the first land section and is disposed below a bottom portion of the second land section. A semiconductor die is attached to the substrate, and includes a first major surface, a second major surface opposing the first major surface, and an outer perimeter. The semiconductor die further includes a bonding structure disposed adjacent the first major surface, which is coupled to the second land section such that the first land section is disposed outside the perimeter of the semiconductor die A mold member encapsulates at least portions of the semiconductor die.

公开(公告)号：US10020263B2

公开(公告)日：2018-07-10

申请号：US15297365

申请日：2016-10-19

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Tae Yong Lee ,  Min Chul Shin ,  Se Man Oh

IPC: H01L21/44 ,  H01L29/40 ,  H01L23/538 ,  H01L23/15 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/5384 ,  H01L23/15 ,  H01L23/31 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/48227 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Provided are a semiconductor package and a manufacturing method thereof for securing a space for mounting a semiconductor device by etching a temporary metal plate to form a plurality of conductive posts.

公开(公告)号：US20180082932A1

公开(公告)日：2018-03-22

申请号：US15823737

申请日：2017-11-28

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Byong Jin Kim ,  Jae Min Bae ,  Hyung Il Jeon ,  Gi Jeong Kim ,  Ji Young Chung

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/60

CPC classification number: H01L23/49548 ,  H01L21/4828 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49861 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L2021/60007 ,  H01L2224/13101 ,  H01L2224/16245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014

Abstract: A semiconductor package structure includes a substrate comprising a land structure. The land structure includes a first land section having a first height in a cross-sectional view and a second land section having a second height in the cross-sectional view that is different than the first height. A mold encapsulant is disposed adjacent a lateral portion of the first land section and is disposed below a bottom portion of the second land section. A semiconductor die is attached to the substrate, and includes a first major surface, a second major surface opposing the first major surface, and an outer perimeter. The semiconductor die further includes a bonding structure disposed adjacent the first major surface, which is coupled to the second land section such that the first land section is disposed outside the perimeter of the semiconductor die A mold member encapsulates at least portions of the semiconductor die.

公开(公告)号：US09911685B2

公开(公告)日：2018-03-06

申请号：US15043572

申请日：2016-02-14

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Byong Jin Kim ,  Jae Min Bae ,  Hyung Il Jeon ,  Gi Jeong Kim ,  Ji Young Chung

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/31 ,  H01L21/56 ,  H01L23/498 ,  H01L21/60

CPC classification number: H01L23/49548 ,  H01L21/4828 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49861 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L2021/60007 ,  H01L2224/13101 ,  H01L2224/16245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014

Abstract: In one embodiment, a method for forming a package substrate includes selectively removing portions of a lead frame to form cavities and filling the cavities with a resin layer to define an adhesion pad and a land structure. Top portions of the lead frame are selectively removed to isolate the adhesion pad and the land structure from each other, to expose a top surface of the resin layer, and to form at least one land having a part with a relatively greater size than the size of a respective lower part.

公开(公告)号：US20150279767A1

公开(公告)日：2015-10-01

申请号：US14722110

申请日：2015-05-26

Applicant: AMKOR TECHNOLOGY, INC.

Inventor： Kyoung Yeon Lee ,  Byong Jin Kim ,  Kyung Su Kim ,  Hyung Il Jeon ,  Jae Doo Kwon

IPC: H01L23/495 ,  H01L23/043 ,  H01L23/31

CPC classification number: H01L23/49541 ,  H01L21/50 ,  H01L23/043 ,  H01L23/3157 ,  H01L23/49503 ,  H01L23/49861 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In one embodiment, a lead frame package structure includes a lead frame having sides that surround a die paddle and on which a plurality of leads are formed. An electronic chip is attached to the die paddle and a case is attached to the lead frame to seal the leads and the electronic chip. One or more discharge holes are formed on and extending through one or more specific leads and/or on and extending through a predetermined position of the die paddle. The discharge holes are configured to discharge air pressure that forms during the assembly process thereby improving the reliability of the packaged electronic chip.

Abstract translation: 在一个实施例中，引线框架封装结构包括引线框架，引线框架具有围绕管芯焊盘的侧面并且在其上形成有多个引线。 将电子芯片安装在芯片上，并且将壳体附接到引线框架以密封引线和电子芯片。 一个或多个排出孔形成在一个或多个特定的引线上并且延伸穿过一个或多个特定的引线和/或延伸穿过管芯的预定位置。 排出孔被构造成排出在组装过程中形成的空气压力，从而提高封装的电子芯片的可靠性。

公开(公告)号：US09129975B2

公开(公告)日：2015-09-08

申请号：US13750022

申请日：2013-01-25

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Byong Jin Kim ,  Gi Jeong Kim

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L29/06 ,  H01L23/31

CPC classification number: H01L23/49541 ,  H01L21/4832 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/495 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L29/0657 ,  H01L2224/05599 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/85439 ,  H01L2224/85455 ,  H01L2924/00014 ,  H01L2924/10155 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: In one embodiment, a method for forming an electronic package structure includes providing a single unit leadframe having first terminals on a first or top surface. An electronic device is attached to the single unit leadframe and electrically connected to the first terminals. The leadframe, first terminals, and the electronic device are encapsulated with an encapsulating material. Second terminals are then formed by removing portions of a second or bottom surface of the leadframe. In one embodiment, the method can be used to fabricate a thin substrate chip scale package (“tsCSP”) type structure.

Abstract translation: 在一个实施例中，一种用于形成电子封装结构的方法包括提供在第一或顶表面上具有第一端子的单个单元引线框架。 电子设备连接到单个单元引线框架并电连接到第一端子。 引线框，第一端子和电子器件用封装材料封装。 然后通过去除引线框架的第二或下表面的部分来形成第二端子。 在一个实施例中，该方法可用于制造薄的衬底芯片级封装（“tsCSP”）型结构。