公开(公告)号：US20150173177A1

公开(公告)日：2015-06-18

申请号：US14629181

申请日：2015-02-23

Applicant: Cisco Technology, Inc.

Inventor： Mohan R. Nagar ,  Kuo-Chuan Liu ,  Mudasir Ahmad ,  Bangalore J. Shanker ,  Jie Xue

IPC: H05K1/02 ,  H05K1/18

CPC classification number: H05K1/0271 ,  H01L21/563 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49144 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A printed circuit board assembly and method of assembly in which underfill is placed between a chip and substrate to support the chip. A trench is formed in the upper layer of the printed circuit board to limit the flow of the underfill and in particular to limit the underfill from contact with adjacent components so that the underfill does not interfere with adjacent components on the printed circuit board assembly.

Abstract translation: 一种印刷电路板组件和组装方法，其中将底部填充物放置在芯片和基板之间以支撑芯片。 沟槽形成在印刷电路板的上层中以限制底部填充物的流动，特别是限制底部填充物与相邻部件接触，使得底部填充物不会干扰印刷电路板组件上的相邻部件。

公开(公告)号：US09320183B1

公开(公告)日：2016-04-19

申请号：US14052708

申请日：2013-10-12

Applicant: Cisco Technology, Inc.

Inventor： Mohan R. Nagar

IPC: H05K9/00 ,  H01J5/00 ,  H01J15/00 ,  H05K5/06 ,  H01L27/148 ,  H01L23/552 ,  B21D39/00 ,  G06F1/18 ,  H01R13/648 ,  H05K3/30 ,  G03B15/03 ,  H01R13/516

CPC classification number: H05K9/0007 ,  G03B15/03 ,  G06F1/181 ,  G06F1/182 ,  G06F1/20 ,  G06F1/203 ,  H01L23/10 ,  H01L23/552 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/73253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/16251 ,  H01L2924/163 ,  H01L2924/3025 ,  H01R13/516 ,  H01R13/648 ,  H05K1/0243 ,  H05K3/30 ,  H05K3/305 ,  H05K3/321 ,  H05K9/00 ,  H05K9/0009 ,  H05K9/0028 ,  H05K2201/10371 ,  H05K2201/10734

Abstract: An apparatus for grounding a chip may be provided. The apparatus may comprise a ground lid, a ground trace, a first substance, and a second substance. The first substance may be configured adhere the ground lid to the ground trace. The second substance may be configured to provide electrical conduction between the ground lid and the ground trace.

Abstract translation: 可以提供用于接地芯片的装置。 该设备可包括接地盖，接地痕迹，第一物质和第二物质。 第一种物质可以被配置为将地盖粘附到地面迹线上。 第二物质可以被配置为在接地盖和接地迹线之间提供电传导。

公开(公告)号：US20160064320A1

公开(公告)日：2016-03-03

申请号：US14470670

申请日：2014-08-27

Applicant: Cisco Technology, Inc.

Inventor： Li Li ,  Mohan R. Nagar ,  Jovica Savic

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/49838 ,  H01L23/49833 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0655 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/01014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/2064 ,  H01L2924/20641

Abstract: An integrated circuit chip stack and a method for forming the same in which bond pads of an interposer are directly bonded to bond pads of a package substrate using only pre-solder. The interposer can have a bond pad pitch of less than 150 micrometers. The interposer can be an organic interposer. The pro-solder can be melted to make contact with the bond pads of the package substrate and the interposer. After solidifying, the pre-solder can form an electrical connection between a bond pad of the interposer and a bond pad of the package substrate.

Abstract translation: 集成电路芯片堆叠及其形成方法，其中内插器的接合焊盘仅使用预焊接直接接合到封装衬底的焊盘。 插入器可以具有小于150微米的焊盘间距。 插入器可以是有机插入器。 原焊料可以熔化以与封装基板和插入件的接合焊盘接触。 在固化之后，预焊料可以在插入件的接合焊盘和封装衬底的焊盘之间形成电连接。