公开(公告)号：US20240387643A1

公开(公告)日：2024-11-21

申请号：US18787102

申请日：2024-07-29

Applicant: FLOSFIA INC.

Inventor： Mutsumi OKA ,  Atsushi TERAI ,  Hidetaka SHIBATA

IPC: H01L29/24 ,  H01L29/04 ,  H01L29/872

Abstract: Provided a multilayer structure including at least: a semiconductor layer containing a crystalline oxide semiconductor as a major component; and a conductive substrate layered on the semiconductor layer, wherein the multilayer structure has a first direction in a plane perpendicular to a layering direction of the multilayer structure and a second direction perpendicular or substantially perpendicular to the first direction, and a first coefficient of linear expansion being a coefficient of linear expansion in the first direction of the conductive substrate is smaller than a second coefficient of linear expansion being a coefficient of linear expansion in the second direction of the conductive substrate, and a third coefficient of linear expansion being a coefficient of linear expansion in the first direction of the semiconductor layer is smaller than a fourth coefficient of linear expansion being a coefficient of linear expansion in the second direction of the semiconductor layer.

公开(公告)号：US20220393015A1

公开(公告)日：2022-12-08

申请号：US17834089

申请日：2022-06-07

Applicant: FLOSFIA INC.

Inventor： Mitsuru OKIGAWA ,  Fujio OKUI ,  Yasushi HIGUCHI ,  Koji AMAZUTSUMI ,  Hidetaka SHIBATA ,  Yuji KATO ,  Atsushi TERAI

IPC: H01L29/47 ,  H01L29/06

Abstract: Provided is a semiconductor device in which a leakage current is reduced, the semiconductor device which is particularly useful for power devices. A semiconductor device including at least: an n+-type semiconductor layer, which contains a crystalline oxide semiconductor as a major component; an n−-type semiconductor layer that is placed on the n+-type semiconductor layer, the n−-type semiconductor layer containing a crystalline oxide semiconductor as a major component; a high-resistance layer with at least a part thereof being embedded in the n−-type semiconductor layer, the high-resistance layer having a bottom surface located at a distance of less than 1.5 μm from an upper surface of the n+-type semiconductor layer; and a Schottky electrode that forms a Schottky junction with the n−-type semiconductor layer, the Schottky electrode having an edge located on the high-resistance layer.

公开(公告)号：US20240387319A1

公开(公告)日：2024-11-21

申请号：US18787094

申请日：2024-07-29

Applicant: FLOSFIA INC.

Inventor： Mutsumi OKA ,  Atsushi TERAI ,  Hidetaka SHIBATA

IPC: H01L23/373 ,  H01L23/00 ,  H01L29/24

Abstract: Provided is a multilayer structure including at least: a semiconductor layer containing a crystalline oxide semiconductor as a major component; and a conductive substrate layered on the semiconductor layer, wherein the conductive substrate includes at least a first metal and a second metal different from the first metal, the conductive substrate has a first direction and a second direction perpendicular or substantially perpendicular to the first direction in a plane, and a first coefficient of linear expansion being a coefficient of linear expansion in the first direction of the conductive substrate and a second coefficient of linear expansion being a coefficient of linear expansion in the second direction are identical or substantially identical.

公开(公告)号：US20220393037A1

公开(公告)日：2022-12-08

申请号：US17834129

申请日：2022-06-07

Applicant: FLOSFIA INC.

Inventor： Mitsuru OKIGAWA ,  Fujio OKUI ,  Yasushi HIGUCHI ,  Koji AMAZUTSUMI ,  Hidetaka SHIBATA ,  Yuji KATO ,  Atsushi TERAI

IPC: H01L29/872 ,  H01L29/24

Abstract: Provided is a semiconductor device in which a leakage current is reduced, the semiconductor device which is particularly useful for power devices. A semiconductor device including at least: an n+-type semiconductor layer, which contains a crystalline oxide semiconductor as a major component; an n−-type semiconductor layer that is placed on the n+-type semiconductor layer, the n−-type semiconductor layer containing a crystalline oxide semiconductor as a major component; a high-resistance layer with at least a part thereof being embedded in the n−-type semiconductor layer, a depth d (μm) of the part embedded in the n−-type semiconductor layer satisfying d≥1.4; and a Schottky electrode that forms a Schottky junction with the n−-type semiconductor layer, the Schottky electrode having an edge located on the high-resistance layer.