公开(公告)号：US20240072636A1

公开(公告)日：2024-02-29

申请号：US18383972

申请日：2023-10-26

Applicant: FLOSFIA INC.

Inventor： Masahiro SUGIMOTO ,  Shinpei MATSUDA

IPC: H02M1/08 ,  H03K17/08

CPC classification number: H02M1/08 ,  H03K17/08 ,  H02M7/48

Abstract: Provided is a power conversion circuit, including: a first switching element and a second switching element connected in parallel to each other; and a control unit configured to control turn-on/off of each of the switching elements, wherein a current value at a cross point of current-voltage characteristics when a forward current flows through the first switching element and current-voltage characteristics when a current flows through the second switching element is greater than a rated current value of the power conversion circuit.

公开(公告)号：US20240055471A1

公开(公告)日：2024-02-15

申请号：US18384031

申请日：2023-10-26

Applicant: FLOSFIA INC.

Inventor： Masahiro SUGIMOTO ,  Shinpei MATSUDA ,  Yasushi HIGUCHI ,  Kazuyoshi NORIMATSU

IPC: H01L29/04 ,  H01L29/78 ,  H01L21/02

CPC classification number: H01L29/04 ,  H01L29/7813 ,  H01L21/02565

Abstract: Provided a semiconductor device includes at least: a crystalline oxide semiconductor layer including a channel layer and a drift layer; and a gate electrode arranged over the channel layer across a gate insulating film, and has a current blocking layer between the channel layer and the drift layer. The semiconductor device is characterized in that the drift layer contains a first crystalline oxide as a major component, the current blocking layer contains a second crystalline oxide as a major component, and the first crystalline oxide and the second crystalline oxide have different compositions.

公开(公告)号：US20240055510A1

公开(公告)日：2024-02-15

申请号：US18384121

申请日：2023-10-26

Applicant: FLOSFIA INC.

Inventor： Masahiro SUGIMOTO ,  Shinpei MATSUDA ,  Yasushi HIGUCHI ,  Kazuyoshi NORIMATSU

IPC: H01L29/78 ,  H01L29/24 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/7802 ,  H01L29/24 ,  H01L21/02565 ,  H01L21/0262 ,  H01L29/66969 ,  H02P27/06

Abstract: Provided a semiconductor device includes at least: a crystalline oxide semiconductor layer including a channel layer, a drift layer, and a source region; a gate electrode arranged over the channel layer across a gate insulating film; a current blocking region arranged between the channel layer and the drift layer; and a source electrode provided on the source region. The current blocking region is composed of a high-resistance layer. The source electrode forms a contact with the current blocking region.

公开(公告)号：US20230253462A1

公开(公告)日：2023-08-10

申请号：US18107684

申请日：2023-02-09

Applicant: FLOSFIA INC. ,  MIRISE Technologies Corporation ,  DENSO CORPORATION

Inventor： Takashi SHINOHE ,  Hiroyuki ANDO ,  Yasushi HIGUCHI ,  Shinpei MATSUDA ,  Kazuya TANIGUCHI ,  Hiroki WATANABE ,  Hideo MATSUKI

IPC: H01L29/24 ,  H01L21/02 ,  H01L29/04 ,  H01L29/78 ,  C01G55/00 ,  C30B29/68 ,  C30B29/24

CPC classification number: H01L29/24 ,  H01L21/02488 ,  H01L21/02513 ,  H01L21/02483 ,  H01L21/02414 ,  H01L21/0242 ,  H01L21/02565 ,  H01L21/02598 ,  H01L21/0262 ,  H01L29/045 ,  H01L21/02609 ,  H01L29/7813 ,  C01G55/002 ,  C30B29/68 ,  C30B29/24 ,  C01P2002/50 ,  C01P2006/40 ,  C01P2006/32 ,  C01P2002/72

Abstract: Provided is a crystalline oxide film including: a plane tilted from a c-plane as a principal plane; gallium; and a metal in Group 9 of the periodic table, the metal in Group 9 of the periodic table among all metallic elements in the film having an atomic ratio of equal to or less than 23%.