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    Sensing field effect transistor devices and method of their manufacture
    1.
    发明授权
    Sensing field effect transistor devices and method of their manufacture 有权
    感应场效应晶体管器件及其制造方法

    公开(公告)号：US09470652B1

    公开(公告)日：2016-10-18

    申请号：US14854265

    申请日：2015-09-15

    Applicant: FREESCALE SEMICONDUCTOR, INC.

    Inventor： Stephen R. Hooper ,  Leo M. Higgins, III ,  Raymond M. Roop

    IPC: H01L21/00 ,  G01N27/414

    CPC classification number: G01N27/4148 ,  G01N27/4145 ,  H01L21/00 ,  H01L21/4885

    Abstract: A sensing device includes a sensor die having a sensing region formed at a first surface of the sensor die. The sensing device further includes an encapsulant covering the sensing die, the encapsulant having a cavity formed therein, wherein the cavity exposes the sensing region. A sensitive membrane material is deposited within the cavity over the sensing region. A method of manufacturing sensing devices entails mounting a plurality of sensing dies to a carrier, encapsulating the dies in an encapsulant, forming cavities in the encapsulant, the cavities exposing a sensing region of each sensor die, and depositing the sensitive membrane material within each of the cavities. The encapsulating and forming operations can be performed simultaneously using a film-assisted molding (FAM) process, and the depositing operation is performed following FAM at an ambient temperature that is lower than the temperature needed to perform FAM.

    Abstract translation: 感测装置包括具有形成在传感器管芯的第一表面处的感测区域的传感器管芯。 感测装置还包括覆盖感测裸片的密封剂，所述密封剂具有形成在其中的空腔，其中所述空腔暴露感测区域。 敏感膜材料沉积在感应区域内的空腔内。 制造感测装置的方法需要将多个感测管芯安装到载体上，将管芯封装在密封剂中，在密封剂中形成空腔，使空腔暴露每个传感器管芯的感测区域，并将敏感膜材料沉积在每个 空腔。 封装和成型操作可以使用薄膜辅助模制（FAM）工艺同时进行，并且在低于执行FAM所需的温度的环境温度下，在FAM之后进行沉积操作。

    Shielding MEMS structures during wafer dicing
    5.
    发明授权
    Shielding MEMS structures during wafer dicing 有权
    晶圆切割期间屏蔽MEMS结构

    公开(公告)号：US09346671B2

    公开(公告)日：2016-05-24

    申请号：US14172479

    申请日：2014-02-04

    Applicant: FREESCALE SEMICONDUCTOR, INC.

    Inventor： Alan J. Magnus ,  Chad S. Dawson ,  Stephen R. Hooper

    IPC: B81B7/00 ,  B81C1/00 ,  H01L21/683

    CPC classification number: B81C1/00896 ,  B81B7/0058 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C1/00865 ,  H01L21/6836

    Abstract: A MEMS wafer (46) includes a front side (52) having a plurality of MEMS structure sites (60) at which MEMS structures (50) are located. A method (40) for protecting the MEMS structures (50) includes applying (44) a non-active feature (66) on the front side of the MEMS wafer in a region that is devoid of the MEMS structures and mounting (76) the front side of the MEMS wafer in a dicing frame (86) such that a back side (74) of the MEMS wafer is exposed. The MEMS wafer is then diced (102) from the back side into a plurality of MEMS dies (48).

    Abstract translation: MEMS晶片（46）包括具有MEMS结构（60）的多个MEMS结构位置（60）的前侧（52），MEMS结构位置位于该结构位置。 用于保护MEMS结构（50）的方法（40）包括在没有MEMS结构的区域中将（44）非MEMS活动特征（66）应用于MEMS晶片的前侧，并且安装（76） 在切割框架（86）中的MEMS晶片的前侧，使得MEMS晶片的背面（74）露出。 然后将MEMS晶片从背面切割（102）到多个MEMS管芯（48）中。

    SHIELDING MEMS STRUCTURES DURING WAFER DICING
    6.
    发明申请
    SHIELDING MEMS STRUCTURES DURING WAFER DICING 有权
    在WAFER DICING期间的屏蔽MEMS结构

    公开(公告)号：US20150217998A1

    公开(公告)日：2015-08-06

    申请号：US14172479

    申请日：2014-02-04

    Applicant: FREESCALE SEMICONDUCTOR, INC.

    Inventor： Alan J. Magnus ,  Chad S. Dawson ,  Stephen R. Hooper

    IPC: B81C1/00 ,  B81B7/00

    CPC classification number: B81C1/00896 ,  B81B7/0058 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C1/00865 ,  H01L21/6836

    Abstract: A MEMS wafer (46) includes a front side (52) having a plurality of MEMS structure sites (60) at which MEMS structures (50) are located. A method (40) for protecting the MEMS structures (50) includes applying (44) a non-active feature (66) on the front side of the MEMS wafer in a region that is devoid of the MEMS structures and mounting (76) the front side of the MEMS wafer in a dicing frame (86) such that a back side (74) of the MEMS wafer is exposed. The MEMS wafer is then diced (102) from the back side into a plurality of MEMS dies (48).

    Abstract translation: MEMS晶片（46）包括具有MEMS结构（60）的多个MEMS结构位置（60）的前侧（52），MEMS结构位置位于该结构位置。 用于保护MEMS结构（50）的方法（40）包括在没有MEMS结构的区域中将（44）非MEMS活动特征（66）应用于MEMS晶片的前侧，并且安装（76） 在切割框架（86）中的MEMS晶片的前侧，使得MEMS晶片的背面（74）露出。 然后将MEMS晶片从背面切割（102）到多个MEMS管芯（48）中。

    Stress isolation for MEMS device
    7.
    发明授权
    Stress isolation for MEMS device 有权
    MEMS器件的应力隔离

    公开(公告)号：US09446940B2

    公开(公告)日：2016-09-20

    申请号：US14506037

    申请日：2014-10-03

    Applicant: FREESCALE SEMICONDUCTOR, INC.

    Inventor： Chad S. Dawson ,  Stephen R. Hooper

    IPC: H04R23/00 ,  B81B7/00 ,  B81C1/00

    CPC classification number: B81B7/0048 ,  B81B7/007 ,  B81B2203/0118 ,  B81C1/00301 ,  B81C1/00325

    Abstract: A microelectromechanical systems (MEMS) die includes a substrate having a recess formed therein and a cantilevered platform structure. The cantilevered platform structure has a platform and an arm extending from the platform, wherein the platform and arm are suspended over the recess. The arm is fixed to the substrate and is a sole attachment point of the platform to the substrate. A MEMS device resides on the platform. Fabrication methodology entails forming the recess in the substrate, with the recess extending inwardly from a surface of the substrate, and attaching a structural layer over the recess and over the surface of the substrate. The MEMS device is formed on the structural layer and the structural layer is removed around a perimeter of the platform and the arm to form the cantilevered platform structure.

    Abstract translation: 微机电系统（MEMS）模具包括其中形成有凹部的基板和悬臂平台结构。 悬臂平台结构具有从平台延伸的平台和臂，其中平台和臂悬挂在凹部上。 臂固定到基底上，并且是平台与基底的唯一附着点。 MEMS设备驻留在平台上。 制造方法需要在衬底中形成凹部，其中凹部从衬底的表面向内延伸，并且将结构层附着在凹部上并在衬底的表面上方。 MEMS器件形成在结构层上，并且围绕平台和臂的周边移除结构层以形成悬臂平台结构。

    Cavity-type semiconductor package and method of packaging same
    8.
    发明授权
    Cavity-type semiconductor package and method of packaging same 有权
    腔式半导体封装及其封装方法

    公开(公告)号：US09227838B2

    公开(公告)日：2016-01-05

    申请号：US14527421

    申请日：2014-10-29

    Applicant: FREESCALE SEMICONDUCTOR, INC.

    Inventor： Stephen R. Hooper ,  Philip H. Bowles

    IPC: H01L23/10 ,  B81B7/00 ,  B81C1/00 ,  H01L23/04 ,  H01L23/053

    CPC classification number: B81B7/0064 ,  B81C1/00269 ,  B81C2203/0109 ,  B81C2203/019 ,  H01L23/04 ,  H01L23/053 ,  H01L23/10 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2924/16152 ,  H01L2924/00014

    Abstract: A method (30) of forming a semiconductor package (20) entails applying (56) an adhesive (64) to a portion (66) of a bonding perimeter (50) of a base (22), with a section (68) of the perimeter (50) being without the adhesive (64). A lid (24) is placed on the base (22) so that a bonding perimeter (62) of the lid (24) abuts the bonding perimeter (50) of the base (22). The lid (24) includes a cavity (25) in which dies (38) mounted to the base (22) are located. A gap (70) is formed without the adhesive (64) at the section (68) between the base (22) and the lid (24). The structure vents from the gap (70) as air inside the cavity (25) expands during heat curing (72). Following heat curing (72), another adhesive (80) is dispensed in the section (68) to close the gap (70) and seal the cavity (25).

    Abstract translation: 形成半导体封装（20）的方法（30）需要将粘合剂（64）施加到基座（22）的接合周边（50）的部分（66）上，其中部分（68）为 周边（50）没有粘合剂（64）。 盖（24）被放置在基座（22）上，使得盖（24）的粘合周边（62）邻接基部（22）的粘合周边（50）。 盖（24）包括一个空腔（25），其中安装在基座（22）上的模具（38）位于该空腔中。 在基部（22）和盖（24）之间的部分（68）处形成没有粘合剂（64）的间隙（70）。 当热固化（72）期间空腔（25）内的空气膨胀时，结构从间隙（70）排出。 在热固化（72）之后，将另一粘合剂（80）分配在部分（68）中以封闭间隙（70）并密封空腔（25）。

    Sensor packaging method and sensor packages
    9.
    发明授权
    Sensor packaging method and sensor packages 有权
    传感器封装方法和传感器封装

    公开(公告)号：US09165886B2

    公开(公告)日：2015-10-20

    申请号：US14151305

    申请日：2014-01-09

    Applicant: FREESCALE SEMICONDUCTOR, INC.

    Inventor： Philip H. Bowles ,  Paige M. Holm ,  Stephen R. Hooper ,  Raymond M. Roop

    IPC: H01L23/528 ,  B81C1/00

    CPC classification number: H01L23/528 ,  B81C1/0023 ,  B81C1/00238 ,  B81C2201/019 ,  B81C2203/0792 ,  H01L2224/48091 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: A method (80) entails providing (82) a structure (117), providing (100) a controller element (102, 24), and bonding (116) the controller element to an outer surface (52, 64) of the structure. The structure includes a sensor wafer (92) and a cap wafer (94) Inner surfaces (34, 36) of the wafers (92, 94) are coupled together, with sensors (30) interposed between the wafers. One wafer (94, 92) includes a substrate portion (40, 76) with bond pads (42) formed on its inner surface (34, 36). The other wafer (94, 92) conceals the substrate portion (40, 76). After bonding, methodology (80) entails forming (120) conductive elements (60) on the element (102, 24), removing (126) material sections (96, 98, 107) from the wafers to expose the bond pads, forming (130) electrical interconnects (56), applying (134) packaging material (64), and singulating (138) to produce sensor packages (20, 70).

    Abstract translation: 方法（80）需要提供（82）结构（117），提供（100）控制器元件（102,24），并将控制器元件（116）结合（116）到结构的外表面（52,64）。 该结构包括传感器晶片（92）和盖晶片（94）晶片（92,94）的内表面（34,36）被耦合在一起，传感器（30）插入晶片之间。 一个晶片（94,92）包括具有形成在其内表面（34,36）上的接合焊盘（42）的衬底部分（40,76）。 另一个晶片（94,92）隐藏基板部分（40,76）。 在结合之后，方法学（80）需要在元件（102,24）上形成（120）导电元件（60），从晶片去除（126）材料部分（96,98,107）以暴露接合焊盘，形成 130）电互连（56），施加（134）包装材料（64）和单分离（138）以产生传感器封装（20,70）。

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