公开(公告)号：US11715532B1

公开(公告)日：2023-08-01

申请号：US17833901

申请日：2022-06-07

Applicant: Hefei Core Storage Electronic Limited

Inventor： Chih-Ling Wang ,  Yue Hu ,  Qin Qin Tao ,  Dong Sheng Rao ,  Shao Feng Yang ,  Yang Chen

IPC: G11C29/00 ,  G11C16/34 ,  G06F12/14

CPC classification number: G11C16/3422 ,  G06F12/1433 ,  G11C16/3431 ,  G11C29/00

Abstract: A risk assessment method based on data priority, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a query command from a host system; in response to the query command, performing a data health detection on a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module stores data with multiple data priorities; generating risk assessment information according to a detection result, wherein the risk assessment information reflects a health degree of data with different data priorities in the rewritable non-volatile memory modules by different risk levels; and transmitting the risk assessment information to the host system.

公开(公告)号：US20230185329A1

公开(公告)日：2023-06-15

申请号：US17572654

申请日：2022-01-11

Applicant: Hefei Core Storage Electronic Limited

Inventor： Yang Chen ,  Yue Hu ,  Dong Sheng Rao ,  Kuai Cao ,  Qin Qin Tao

IPC: G06F1/12 ,  G06F1/08

CPC classification number: G06F1/12 ,  G06F1/08

Abstract: A timer calibration method and an electronic device are disclosed. The method includes: performing a fitting operation according to a clock frequency of a clock device and an output of a timer to generate a fitting function; obtaining a first value output by the timer; and adjusting the first value to be a second value according to the fitting function to calibrate the timer.

公开(公告)号：US20230127512A1

公开(公告)日：2023-04-27

申请号：US17533020

申请日：2021-11-22

Applicant: Hefei Core Storage Electronic Limited

Inventor： Qi-Ao Zhu ,  Jing Zhang ,  Kuai Cao ,  Xin Wang ,  Xu Hui Cheng ,  Dong Sheng Rao

IPC: G06F3/06 ,  G06F13/16 ,  G06F1/3234 ,  G06F1/3287

Abstract: A memory performance optimization method, a memory control circuit unit, and a memory storage device are provided. The method includes the following. An idle time of the memory storage device is counted in an active mode. The memory storage device is instructed to enter a first low electricity consumption mode from the active mode in response to the idle time being greater than an idle threshold. A first waiting time of the memory storage device is counted in the first low electricity consumption mode. The memory storage device is instructed to enter a second low electricity consumption mode from the first low electricity consumption mode in response to the first waiting time being greater than a first waiting threshold. Electricity consumption of the second low electricity consumption mode is lower than electricity consumption of the first low electricity consumption mode.

公开(公告)号：US20250123641A1

公开(公告)日：2025-04-17

申请号：US18504163

申请日：2023-11-08

Applicant: Hefei Core Storage Electronic Limited

Inventor： Chih-Ling Wang ,  Qi-Ao Zhu ,  Dong Sheng Rao

IPC: G05D23/24 ,  G01K7/22

Abstract: A temperature control method and a temperature control system for controlling a temperature of a target device are disclosed. The target device is disposed in a temperature control device. The method includes: controlling an internal temperature of the temperature control device according to a base parameter and a compensation parameter; detecting a temperature of the target device via a temperature sensor during the period that the internal temperature of the temperature control device is controlled according to the base parameter and the compensation parameter; and adjusting the compensation parameter according to the temperature of the target device to change the internal temperature of the temperature control device.

公开(公告)号：US20240289022A1

公开(公告)日：2024-08-29

申请号：US18190055

申请日：2023-03-24

Applicant: Hefei Core Storage Electronic Limited

Inventor： Chih-Ling Wang ,  Yin Ping Gao ,  Qi-Ao Zhu ,  Kuai Cao ,  Dong Sheng Rao

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0659 ,  G06F3/0679

Abstract: A data arrangement method based on file system, a memory storage device and a memory control circuit unit are disclosed. The method includes: analyzing a file system stored in a system region to obtain a plurality of first logical units to which a first file belongs and first distribution information of a plurality of first physical units in a storage region, wherein the first physical units are mapped by the first logical units; determining whether to activate a data arrangement operation on the first file according to the first distribution information; after the data arrangement operation on the first file is activated, reading first data belonging to the first file from the first physical units; and writing, sequentially, the read first data to at least one second physical unit in the storage region.

公开(公告)号：US12242730B2

公开(公告)日：2025-03-04

申请号：US18190055

申请日：2023-03-24

Applicant: Hefei Core Storage Electronic Limited

Inventor： Chih-Ling Wang ,  Yin Ping Gao ,  Qi-Ao Zhu ,  Kuai Cao ,  Dong Sheng Rao

IPC: G06F3/06

Abstract: A data arrangement method based on file system, a memory storage device and a memory control circuit unit are disclosed. The method includes: analyzing a file system stored in a system region to obtain a plurality of first logical units to which a first file belongs and first distribution information of a plurality of first physical units in a storage region, wherein the first physical units are mapped by the first logical units; determining whether to activate a data arrangement operation on the first file according to the first distribution information; after the data arrangement operation on the first file is activated, reading first data belonging to the first file from the first physical units; and writing, sequentially, the read first data to at least one second physical unit in the storage region.

公开(公告)号：US11803208B2

公开(公告)日：2023-10-31

申请号：US17572654

申请日：2022-01-11

Applicant: Hefei Core Storage Electronic Limited

Inventor： Yang Chen ,  Yue Hu ,  Dong Sheng Rao ,  Kuai Cao ,  Qin Qin Tao

IPC: G06F1/12 ,  G06F1/08

CPC classification number: G06F1/12 ,  G06F1/08

Abstract: A timer calibration method and an electronic device are disclosed. The method includes: performing a fitting operation according to a clock frequency of a clock device and an output of a timer to generate a fitting function; obtaining a first value output by the timer; and adjusting the first value to be a second value according to the fitting function to calibrate the timer.

公开(公告)号：US11693567B2

公开(公告)日：2023-07-04

申请号：US17533020

申请日：2021-11-22

Applicant: Hefei Core Storage Electronic Limited

Inventor： Qi-Ao Zhu ,  Jing Zhang ,  Kuai Cao ,  Xin Wang ,  Xu Hui Cheng ,  Dong Sheng Rao

IPC: G06F3/06 ,  G06F1/3287 ,  G06F13/16 ,  G06F1/3234

CPC classification number: G06F3/0625 ,  G06F1/3275 ,  G06F1/3287 ,  G06F3/0634 ,  G06F3/0653 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679 ,  G06F13/1668

Abstract: A memory performance optimization method, a memory control circuit unit, and a memory storage device are provided. The method includes the following. An idle time of the memory storage device is counted in an active mode. The memory storage device is instructed to enter a first low electricity consumption mode from the active mode in response to the idle time being greater than an idle threshold. A first waiting time of the memory storage device is counted in the first low electricity consumption mode. The memory storage device is instructed to enter a second low electricity consumption mode from the first low electricity consumption mode in response to the first waiting time being greater than a first waiting threshold. Electricity consumption of the second low electricity consumption mode is lower than electricity consumption of the first low electricity consumption mode.

公开(公告)号：US20250123752A1

公开(公告)日：2025-04-17

申请号：US18510608

申请日：2023-11-15

Applicant: Hefei Core Storage Electronic Limited

Inventor： Chih-Ling Wang ,  Qi-Ao Zhu ,  Dong Sheng Rao

IPC: G06F3/06

Abstract: Disclosed are a service lifetime monitoring and early warning method, a memory storage device, and a memory control circuit unit. The method includes: reading a history information from a rewritable non-volatile memory module, calculating a remaining lifetime based on the history information and a user habit, generating an early warning signal, and outputting the remaining lifetime and the early warning signal in response to the remaining lifetime being lower than a preset lifetime.

公开(公告)号：US20250123322A1

公开(公告)日：2025-04-17

申请号：US18518599

申请日：2023-11-24

Applicant: Hefei Core Storage Electronic Limited

Inventor： Chih-Ling Wang ,  Qi-Ao Zhu ,  Dong Sheng Rao

IPC: G01R31/28

Abstract: A variable temperature test system and an operation method thereof are provided. The variable temperature test system includes a main control device, multiple test devices, and a variable temperature test platform. The variable temperature test platform is coupled to the main control device and the test devices. The main control device provides an adjustment parameter according to at least one pending test. The variable temperature test platform includes multiple test areas, multiple temperature sensors, and a temperature control module. The test areas are respectively coupled to the test devices. The temperature sensors are respectively disposed in the test areas. The temperature control module is coupled to the test areas. The temperature control module adjusts a temperature of at least one test area according to the adjustment parameter.