公开(公告)号：US20230246888A1

公开(公告)日：2023-08-03

申请号：US18010779

申请日：2020-07-15

Applicant: Intel Corporation

Inventor： Yang Wu ,  Howard Heck ,  Jingbo Li ,  Tao Xu

IPC: H04L25/03

CPC classification number: H04L25/03878

Abstract: Embodiments of the present disclosure may relate to a controller coupled to a re-driver, where the controller has one or more sensor ports to couple with sensor devices, with circuitry coupled with the sensor ports and a re-driver port to receive operational data from the sensor ports, and based on the received operational data identify an indication of a re-driver equalizer setting to be transmitted to the re-driver device. Embodiments are used to increase the stability of the re-driver and maintain link margins a crossed varied operational conditions of the re-driver. Other embodiments may be described and/or claimed.

公开(公告)号：US20250004220A1

公开(公告)日：2025-01-02

申请号：US18346039

申请日：2023-06-30

Applicant: Intel Corporation

Inventor： Sufi R. Ahmed ,  Shan Zhong ,  Eric J. M. Moret ,  Yang Wu

IPC: G02B6/42

Abstract: Photonic integrated circuits and optical couplers with improved process tolerance, and methods of forming the same, are disclosed herein. In one example, an integrated circuit package includes a photonic integrated circuit (PIC) to send or receive optical signals and an optical coupler to optically couple the PIC to one or more optical fibers. The PIC includes a first interface with at least two recesses and one or more grooves positioned between the recesses, and the optical coupler includes a second interface with at least two protrusions and one or more ridges positioned between the protrusions (or vice versa). The protrusions on the optical coupler are mated with the recesses on the PIC, and the ridges on the optical coupler are mated with the grooves on the PIC.

公开(公告)号：US20250102744A1

公开(公告)日：2025-03-27

申请号：US18476089

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Feifei Cheng ,  Kumar Abhishek Singh ,  Peter A. Williams ,  Ziyin Lin ,  Fan Fan ,  Yang Wu ,  Saikumar Jayaraman ,  Baris Bicen ,  Darren Vance ,  Anurag Tripathi ,  Divya Pratap ,  Stephanie J. Arouh

IPC: G02B6/42

Abstract: Technologies for fiber array unit (FAU) lid designs are disclosed. In one embodiment, channels in the lid allow for suction to be applied to fibers that the lid covers, pulling the fibers into place in a V-groove. The suction can hold the fibers in place as the fiber array unit is mated with a photonic integrated circuit (PIC) die. Additionally or alternatively, channels can be on pitch, allowing for pulling the FAU towards a PIC die as well as sensing the position and alignment of the FAU to the PIC die. In another embodiment, a warpage amount of a PIC die is characterized, and a FAU lid with a similar warpage is fabricated, allowing for the FAU to position fibers correctly relative to waveguides in the PIC die. In another embodiment, a FAU has an extended lid, which can provide fiber protection as well as position and parallelism tolerance control.

公开(公告)号：US20240222219A1

公开(公告)日：2024-07-04

申请号：US18090883

申请日：2022-12-29

Applicant: Intel Corporation

Inventor： Gang Duan ,  Srinivas Pietambaram ,  Brandon Marin ,  Suddhasattwa Nad ,  Jeremy Ecton ,  Yang Wu ,  Minglu Liu ,  Yosuke Kanaoka

IPC: H01L23/367 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/42 ,  H01L23/48 ,  H01L23/538 ,  H01L25/18

CPC classification number: H01L23/367 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/42 ,  H01L23/481 ,  H01L23/5381 ,  H01L24/16 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L25/18 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253

Abstract: Microelectronic integrated circuit package structures include a first die and a second die both coupled to a bridge structure at an interface. A first thermally conductive mold material is on a first side of the interface and surrounds the first die and the second die. A second mold material is on a second, opposing side of the interface and surrounds the bridge structure.