公开(公告)号：US20040050708A1

公开(公告)日：2004-03-18

申请号：US10644036

申请日：2003-08-20

Applicant: LG ELECTRONICS INC.

Inventor： Yu-Seock Yang ,  Sung-Gue Lee ,  Yong-Soon Jang ,  Hyung-Kun Kim

IPC: C25D005/02

CPC classification number: C25D5/022 ,  H05K3/0052 ,  H05K3/242 ,  H05K3/243 ,  H05K3/28 ,  H05K3/427 ,  H05K2201/0959 ,  H05K2203/054 ,  H05K2203/1572

Abstract: A plating method for a printed circuit board includes: a first step of providing a substrate having a plurality of connection pads and circuit patterns connected to the connection pads; a second step of using some of the circuit patterns provided on a surface of the substrate as a power connection portion and connecting the power connection portion to an external power source; a third step of covering a surface of the substrate excepting the connection pads with a plating resistance resist to shield it; a fourth step of supplying power to the connection pad through the power connection portion and forming a gold-plated layer on the connection pad; and a fifth step of making the power connection portion and the external power source to be electrically short. With this method, a printed circuit board without a power supply line for gold-plating can be obtained.

Abstract translation: 印刷电路板的电镀方法包括：第一步骤，提供具有连接到连接焊盘的多个连接焊盘和电路图案的衬底; 使用设置在基板的表面上的一些电路图案作为电源连接部分并将电源连接部分连接到外部电源的第二步骤; 第三步骤，用电镀抗蚀剂覆盖除了连接焊盘之外的基板的表面以对其进行屏蔽; 通过电源连接部分向​​连接焊盘供电并在连接焊盘上形成镀金层的第四步骤; 以及使电力连接部分和外部电源电气短路的第五步骤。 通过这种方法，可以获得没有用于镀金的电源线的印刷电路板。

公开(公告)号：US20040200726A1

公开(公告)日：2004-10-14

申请号：US10836219

申请日：2004-05-03

Applicant: LG Electronics Inc.

Inventor： Sung-Gue Lee ,  Yong-Il Kim

IPC: C25D005/02 ,  C25D007/12

CPC classification number: H05K3/243 ,  H05K3/28 ,  H05K2201/09881 ,  H05K2203/0597 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49204

Abstract: A method for forming bonding pads on a printed circuit board (PCB) with circuit patterns is provided. A plurality of copper patterns are formed on the PCB which are electrically connected to the circuit patterns, and a filler is filled between the copper patterns such that an upper surface of the copper pattern is exposed. A plating layer is then applied to the exposed upper surface of the copper patterns. Protrusion of the plating layer at a lower portion of a copper pattern is prevented, thus reducing an interval between the wire bonding pad(s) and potentially increasing the number of bonding pads which may be effectively formed on a given PCB.

Abstract translation: 提供了一种用于在具有电路图案的印刷电路板（PCB）上形成焊盘的方法。 在PCB上形成多个铜图形，其电连接到电路图案，并且填充物填充在铜图案之间，使得铜图案的上表面露出。 然后将镀层施加到铜图案的暴露的上表面。 防止在铜图案的下部的镀层的突出，从而减少引线键合焊盘之间的间隔并且潜在地增加可能在给定PCB上有效形成的焊盘的数量。

公开(公告)号：US20030089521A1

公开(公告)日：2003-05-15

申请号：US10291606

申请日：2002-11-12

Applicant: LG Electronics Inc.

Inventor： Sung-Gue Lee ,  Yong-Il Kim

IPC: H05K001/09 ,  H05K003/10

CPC classification number: H05K3/243 ,  H05K3/28 ,  H05K2201/09881 ,  H05K2203/0597 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49204

Abstract: Bonding pad(s) formed on a printed circuit board with circuit patterns. The bonding pad(s) include a plurality of copper patterns formed on the PCB and electrically connected to the circuit patterns, a filler filled between the copper patterns such that an upper surface of the copper pattern is exposed, and a plating layer applied at an upper surface of the copper patterns. An interval between wire bonding pad(s) is reduced by preventing a nickel plating layer and a gold plating layer from protruding at a lower portion of a copper pattern when they are formed on the copper patterns.

Abstract translation: 在印刷电路板上形成的具有电路图案的接合焊盘。 焊盘包括形成在PCB上并电连接到电路图案的多个铜图案，填充在铜图案之间的填充物，使得铜图案的上表面暴露，并且镀覆层 铜图案的上表面。 通过防止镀镍层和镀金层在铜图案上形成时在铜图案的下部突出，从而降低引线接合焊盘之间的间隔。

公开(公告)号：US20040241904A1

公开(公告)日：2004-12-02

申请号：US10855557

申请日：2004-05-28

Applicant: LG Electronics Inc.

Inventor： Kwang-Tae Lee ,  Sung-Gue Lee ,  Sang-Hyuck Nam ,  Sung-Ho Youn ,  Young-Kyu Lee

IPC: H01L021/44 ,  H05K003/02 ,  G03C001/725

CPC classification number: H05K3/28 ,  H05K3/243 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/025 ,  H05K2203/0577 ,  Y10T29/49155

Abstract: A method for manufacturing a printed circuit board includes: forming inner circuit patterns in an insulating material in multi-layers, forming a plurality of through holes at certain portions of the insulating material, and forming an outer circuit pattern which is electrically connected to the inner circuit pattern, at an inner circumferential surface of the through hole and the surface of the insulating material, and a terminal portion; forming a first photo solder resist layer at an entire surface of the insulating material and an entire surface of the outer circuit pattern, and exposing the terminal portion by removing a specific portion of the first photo solder resist layer; abrading the surface of the first photo solder resist layer; printing a second photo solder resist layer at the surface of the first photo solder resist layer, and exposing the terminal portion to the outside by removing a specific portion of the second photo solder resist layer; and forming a pad portion by plating the surface of the exposed terminal portion with gold, and electrically connecting the pad portion and the terminal portion.

Abstract translation: 印刷电路板的制造方法包括：在多层绝缘材料中形成内部电路图案，在绝缘材料的某些部分形成多个通孔，并形成外部电路图形，该外部电路图形与内部 在通孔的内周面和绝缘材料的表面上形成电路图形，以及端子部分; 在所述绝缘材料的整个表面和所述外部电路图案的整个表面上形成第一光阻焊层，并且通过去除所述第一光阻焊层的特定部分来暴露所述端子部分; 研磨第一光阻焊层的表面; 在第一光阻焊层的表面上印刷第二光阻焊层，并通过去除第二光阻焊层的特定部分将端子部分暴露于外部; 以及通过用暴露的端子部分的表面镀金形成焊盘部分，并且电连接焊盘部分和端子部分。

公开(公告)号：US20040154162A1

公开(公告)日：2004-08-12

申请号：US10769885

申请日：2004-02-03

Applicant: LG Electronics Inc.

Inventor： Sung-Gue Lee ,  Jung-Ho Hwang ,  Joon-Wook Han ,  Sang-Min Lee ,  Tae-Sik Eo ,  Yu-Seock Yang

IPC: H05K003/36 ,  H05K003/20

CPC classification number: H05K3/423 ,  H05K3/0023 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2203/0346 ,  H05K2203/0577 ,  H05K2203/0733 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A method for fabricating a multi-layer printed circuit board can include forming an etching resist layer on a first metal layer having plating grooves that selectively expose the first metal layer, forming a plated layer at the surface of the first metal layer exposed by the plating groove through a plating process to form connection protrusion, removing the etching resist layer, forming an insulation layer at the first metal layer and positioning a second metal layer at the surface of the insulation layer coupled to an end portion of the connection protrusion. By forming the connection protrusion through the plating process, a loss of material can be reduced and a strength of the connection protrusion can be increased. Further, a complexity of the fabrication process is reduced to reduce costs and increase productivity.

Abstract translation: 制造多层印刷电路板的方法可以包括在具有选择性地暴露第一金属层的镀槽的第一金属层上形成抗蚀剂层，在由电镀暴露的第一金属层的表面形成镀层 通过电镀工艺形成连接突起，去除抗蚀剂层，在第一金属层处形成绝缘层，并将第二金属层定位在连接到连接突起的端部的绝缘层的表面处。 通过通过电镀工艺形成连接突起，可以减少材料的损失，并且可以提高连接突起的强度。 此外，减少制造过程的复杂性以降低成本并提高生产率。

公开(公告)号：US20040001914A1

公开(公告)日：2004-01-01

申请号：US10456565

申请日：2003-06-09

Applicant: LG ELECTRONICS INC.

Inventor： Sung-Gue Lee

IPC: B05D005/12

CPC classification number: H05K3/243 ,  C25D5/022 ,  C25D7/12 ,  H05K3/045 ,  H05K3/107 ,  H05K3/28 ,  H05K3/426 ,  H05K2201/0376 ,  H05K2201/09036

Abstract: A circuit pattern fabrication method of a printed circuit board includes: a first step of forming a resin layer at a surface of an insulation material; a second step of selectively removing the resin layer; a third step of forming a metal plated layer at the surface of the resin layer-removed portion of the insulation material to form circuit patterns and a connection pad; and a fourth step of forming a gold plated layer on the connection pad. By doing that, a fine circuit pattern can be easily formed.

Abstract translation: 印刷电路板的电路图案制造方法包括：在绝缘材料的表面形成树脂层的第一步骤; 选择性地除去树脂层的第二步骤; 在绝缘材料的树脂层去除部分的表面上形成金属镀层以形成电路图案和连接焊盘的第三步骤; 以及在连接焊盘上形成镀金层的第四步骤。 通过这样做，可以容易地形成精细的电路图案。