公开(公告)号：US20240234246A1

公开(公告)日：2024-07-11

申请号：US18616351

申请日：2024-03-26

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Seungwon IM ,  Oseob JEON ,  Byoungok LEE ,  Yoonsoo LEE ,  Joonseo SON ,  Dukyong LEE ,  Changyoung PARK

IPC: H01L23/433 ,  H01L23/13 ,  H01L23/24 ,  H01L23/473 ,  H01L23/495 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/433 ,  H01L23/13 ,  H01L23/4334 ,  H01L23/473 ,  H01L23/49568 ,  H01L23/49861 ,  H01L25/0657 ,  H01L23/24 ,  H01L2224/33

Abstract: Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.

公开(公告)号：US20200185305A1

公开(公告)日：2020-06-11

申请号：US16790933

申请日：2020-02-14

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Seungwon IM ,  Oseob JEON ,  Byoungok LEE ,  Yoonsoo LEE ,  Joonseo SON ,  Dukyong LEE ,  Changyoung PARK

IPC: H01L23/433 ,  H01L25/065 ,  H01L23/498 ,  H01L23/13 ,  H01L23/495 ,  H01L23/473

Abstract: Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.

公开(公告)号：US20250105200A1

公开(公告)日：2025-03-27

申请号：US18473998

申请日：2023-09-25

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Seokbong KIM ,  Byoungok LEE ,  Yong LIU

IPC: H01L23/00 ,  H01L25/00 ,  H01L25/07

Abstract: A power module includes a substrate, a plurality of semiconductor dies coupled to the substrate, and a clip substrate member having a first surface and a second surface. The first surface is coupled to the plurality of semiconductor dies. The clip substrate member includes a first conductive clip, and a second conductive clip, and a dielectric material portion disposed between the first conductive clip and the second conductive clip. The second surface includes a first contact region and a second contact region. The first contact region includes a portion of the first conductive clip. The second contact region includes a portion of the second conductive clip.

公开(公告)号：US20220093487A1

公开(公告)日：2022-03-24

申请号：US17457100

申请日：2021-12-01

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Seungwon IM ,  Oseob JEON ,  Byoungok LEE ,  Yoonsoo LEE ,  Joonseo SON ,  Dukyong LEE ,  Changyoung PARK

IPC: H01L23/433 ,  H01L23/13 ,  H01L23/473 ,  H01L23/498 ,  H01L25/065 ,  H01L23/495

Abstract: Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.

公开(公告)号：US20240186211A1

公开(公告)日：2024-06-06

申请号：US18441484

申请日：2024-02-14

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jooyang EOM ,  Inpil YOO ,  Seungwon IM ,  Byoungok LEE

IPC: H01L23/367 ,  H01L21/48

CPC classification number: H01L23/3672 ,  H01L21/4882

Abstract: In a general aspect, an apparatus includes a substrate and a metal layer disposed on a surface of the substrate. The apparatus also includes a first recess and a second recess formed in the metal layer, and a folded cooling fin. A first portion of the folded cooling fin is disposed within the first recess and coupled with the metal layer, and a second portion of the folded cooling fin is disposed in the second recess and coupled with the metal layer.

公开(公告)号：US20240162110A1

公开(公告)日：2024-05-16

申请号：US18054229

申请日：2022-11-10

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Seungwon IM ,  Jeungdae KIM ,  Oseob JEON ,  Byoungok LEE

IPC: H01L23/373 ,  H01L21/56 ,  H01L23/31 ,  H01L23/42 ,  H01L23/495

CPC classification number: H01L23/3735 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/42 ,  H01L23/49503 ,  H01L24/32 ,  H01L2224/32245

Abstract: In a general aspect, a semiconductor device package can include a die attach paddle having a first surface and a second surface that is opposite the first surface; a semiconductor die coupled with the first surface of the die attach paddle, and a direct-bonded-metal (DBM) substrate The DBM substrate can include a ceramic layer having a first surface and a second surface that is opposite the first surface, a first metal layer disposed on the first surface of the ceramic layer and coupled with the second surface of the die attach paddle, a second metal layer disposed on the second surface of the ceramic layer, and a thermally conductive adhesive disposed on the second metal layer, At least a surface of the thermally conductive adhesive can be exposed external to the device package. The thermally conductive adhesive can be configured for coupling the device package with a thermal dissipation appliance.

公开(公告)号：US20180315681A1

公开(公告)日：2018-11-01

申请号：US15714539

申请日：2017-09-25

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Seungwon IM ,  Oseob JEON ,  Byoungok LEE ,  Yoonsoo LEE ,  Joonseo SON ,  Dukyong LEE ,  Changyoung PARK

IPC: H01L23/433 ,  H01L23/24 ,  H01L25/065 ,  H01L23/498 ,  H01L23/13

Abstract: Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.